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tg3: Fix RSS ring refill race condition
The RSS feature in tg3 hardware has only one rx producer ring for all RSS rings. NAPI vector 1 is special and handles the refilling of the rx producer ring on behalf of all RSS rings. There is a race condition between these RSS NAPIs and the NAPI[1]. If NAPI[1] finishes checking for refill and then another RSS ring empties the rx producer ring before NAPI[1] exits NAPI, the chip will be completely out of SKBs in the rx producer ring. We fix this by adding a flag tp->rx_refill and rely on napi_schedule()/ napi_complete() to help synchronize it to close the race condition. Update driver version to 3.123. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -89,10 +89,10 @@ static inline void _tg3_flag_clear(enum TG3_FLAGS flag, unsigned long *bits)
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#define DRV_MODULE_NAME "tg3"
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#define TG3_MAJ_NUM 3
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#define TG3_MIN_NUM 122
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#define TG3_MIN_NUM 123
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#define DRV_MODULE_VERSION \
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__stringify(TG3_MAJ_NUM) "." __stringify(TG3_MIN_NUM)
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#define DRV_MODULE_RELDATE "December 7, 2011"
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#define DRV_MODULE_RELDATE "March 21, 2012"
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#define RESET_KIND_SHUTDOWN 0
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#define RESET_KIND_INIT 1
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@ -5953,8 +5953,10 @@ next_pkt_nopost:
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tpr->rx_std_prod_idx = std_prod_idx & tp->rx_std_ring_mask;
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tpr->rx_jmb_prod_idx = jmb_prod_idx & tp->rx_jmb_ring_mask;
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if (tnapi != &tp->napi[1])
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if (tnapi != &tp->napi[1]) {
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tp->rx_refill = true;
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napi_schedule(&tp->napi[1].napi);
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}
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}
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return received;
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@ -6134,6 +6136,7 @@ static int tg3_poll_work(struct tg3_napi *tnapi, int work_done, int budget)
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u32 std_prod_idx = dpr->rx_std_prod_idx;
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u32 jmb_prod_idx = dpr->rx_jmb_prod_idx;
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tp->rx_refill = false;
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for (i = 1; i < tp->irq_cnt; i++)
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err |= tg3_rx_prodring_xfer(tp, dpr,
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&tp->napi[i].prodring);
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@ -6197,9 +6200,25 @@ static int tg3_poll_msix(struct napi_struct *napi, int budget)
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/* check for RX/TX work to do */
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if (likely(sblk->idx[0].tx_consumer == tnapi->tx_cons &&
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*(tnapi->rx_rcb_prod_idx) == tnapi->rx_rcb_ptr)) {
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/* This test here is not race free, but will reduce
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* the number of interrupts by looping again.
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*/
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if (tnapi == &tp->napi[1] && tp->rx_refill)
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continue;
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napi_complete(napi);
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/* Reenable interrupts. */
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tw32_mailbox(tnapi->int_mbox, tnapi->last_tag << 24);
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/* This test here is synchronized by napi_schedule()
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* and napi_complete() to close the race condition.
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*/
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if (unlikely(tnapi == &tp->napi[1] && tp->rx_refill)) {
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tw32(HOSTCC_MODE, tp->coalesce_mode |
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HOSTCC_MODE_ENABLE |
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tnapi->coal_now);
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}
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mmiowb();
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break;
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}
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@ -3007,6 +3007,7 @@ struct tg3 {
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u32 rx_std_max_post;
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u32 rx_offset;
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u32 rx_pkt_map_sz;
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bool rx_refill;
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/* begin "everything else" cacheline(s) section */
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