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intel_idle: initial C8, C9, C10 support
Allow intel_idle and cpuidle to utilize C8, C9, C10 when they are present on... "Fourth Generation Intel(R) Core(TM) Processors", which are based on Intel(R) microarchitecture code name Haswell. Signed-off-by: Len Brown <len.brown@intel.com>
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@ -273,6 +273,27 @@ static struct cpuidle_state hsw_cstates[CPUIDLE_STATE_MAX] = {
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.exit_latency = 166,
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.target_residency = 500,
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.enter = &intel_idle },
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{
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.name = "C8-HSW",
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.desc = "MWAIT 0x40",
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.flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
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.exit_latency = 300,
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.target_residency = 900,
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.enter = &intel_idle },
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{
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.name = "C9-HSW",
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.desc = "MWAIT 0x50",
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.flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
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.exit_latency = 600,
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.target_residency = 1800,
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.enter = &intel_idle },
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{
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.name = "C10-HSW",
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.desc = "MWAIT 0x60",
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.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
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.exit_latency = 2600,
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.target_residency = 7700,
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.enter = &intel_idle },
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{
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.enter = NULL }
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};
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@ -17,7 +17,7 @@
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#include <linux/completion.h>
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#include <linux/hrtimer.h>
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#define CPUIDLE_STATE_MAX 8
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#define CPUIDLE_STATE_MAX 10
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#define CPUIDLE_NAME_LEN 16
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#define CPUIDLE_DESC_LEN 32
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