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ARM: aspeed: Enable SMP boot
This brings the secondary CPU into Linux. It depends on the setup performed by ASPEED's u-boot. Signed-off-by: Joel Stanley <joel@jms.id.au>
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parent
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commit
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@ -155,6 +155,7 @@ textofs-$(CONFIG_ARCH_AXXIA) := 0x00308000
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machine-$(CONFIG_ARCH_ACTIONS) += actions
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machine-$(CONFIG_ARCH_ALPINE) += alpine
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machine-$(CONFIG_ARCH_ARTPEC) += artpec
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machine-$(CONFIG_ARCH_ASPEED) += aspeed
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machine-$(CONFIG_ARCH_AT91) += at91
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machine-$(CONFIG_ARCH_AXXIA) += axxia
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machine-$(CONFIG_ARCH_BCM) += bcm
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5
arch/arm/mach-aspeed/Makefile
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5
arch/arm/mach-aspeed/Makefile
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@ -0,0 +1,5 @@
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# SPDX-License-Identifier: GPL-2.0-or-later
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# Copyright (C) ASPEED Technology Inc.
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# Copyright IBM Corp.
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obj-$(CONFIG_SMP) += platsmp.o
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61
arch/arm/mach-aspeed/platsmp.c
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61
arch/arm/mach-aspeed/platsmp.c
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@ -0,0 +1,61 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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// Copyright (C) ASPEED Technology Inc.
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// Copyright IBM Corp.
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#include <linux/of_address.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/smp.h>
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#define BOOT_ADDR 0x00
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#define BOOT_SIG 0x04
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static struct device_node *secboot_node;
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static int aspeed_g6_boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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void __iomem *base;
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base = of_iomap(secboot_node, 0);
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if (!base) {
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pr_err("could not map the secondary boot base!");
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return -ENODEV;
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}
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writel_relaxed(0, base + BOOT_ADDR);
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writel_relaxed(__pa_symbol(secondary_startup_arm), base + BOOT_ADDR);
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writel_relaxed((0xABBAAB00 | (cpu & 0xff)), base + BOOT_SIG);
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dsb_sev();
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iounmap(base);
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return 0;
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}
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static void __init aspeed_g6_smp_prepare_cpus(unsigned int max_cpus)
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{
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void __iomem *base;
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secboot_node = of_find_compatible_node(NULL, NULL, "aspeed,ast2600-smpmem");
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if (!secboot_node) {
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pr_err("secboot device node found!!\n");
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return;
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}
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base = of_iomap(secboot_node, 0);
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if (!base) {
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pr_err("could not map the secondary boot base!");
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return;
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}
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__raw_writel(0xBADABABA, base + BOOT_SIG);
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iounmap(base);
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}
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static const struct smp_operations aspeed_smp_ops __initconst = {
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.smp_prepare_cpus = aspeed_g6_smp_prepare_cpus,
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.smp_boot_secondary = aspeed_g6_boot_secondary,
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};
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CPU_METHOD_OF_DECLARE(aspeed_smp, "aspeed,ast2600-smp", &aspeed_smp_ops);
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