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drm/amdgpu: expose the minimum shader/memory clock frequency

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Otherwise, some UMD tools will treate them as 0 at default while
actually they are not.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Evan Quan 2022-12-05 10:09:38 +08:00 committed by Alex Deucher
parent 5cfd978490
commit 88347fa18b
2 changed files with 10 additions and 2 deletions
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10
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
View File

@ -785,9 +785,15 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
if (adev->pm.dpm_enabled) {
dev_info->max_engine_clock = amdgpu_dpm_get_sclk(adev, false) * 10;
dev_info->max_memory_clock = amdgpu_dpm_get_mclk(adev, false) * 10;
dev_info->min_engine_clock = amdgpu_dpm_get_sclk(adev, true) * 10;
dev_info->min_memory_clock = amdgpu_dpm_get_mclk(adev, true) * 10;
} else {
dev_info->max_engine_clock = adev->clock.default_sclk * 10;
dev_info->max_memory_clock = adev->clock.default_mclk * 10;
dev_info->max_engine_clock =
dev_info->min_engine_clock =
adev->clock.default_sclk * 10;
dev_info->max_memory_clock =
dev_info->min_memory_clock =
adev->clock.default_mclk * 10;
}
dev_info->enabled_rb_pipes_mask = adev->gfx.config.backend_enable_mask;
dev_info->num_rb_pipes = adev->gfx.config.max_backends_per_se *

2
include/uapi/drm/amdgpu_drm.h
View File

@ -1111,6 +1111,8 @@ struct drm_amdgpu_info_device {
__u32 pa_sc_tile_steering_override;
/* disabled TCCs */
__u64 tcc_disabled_mask;
__u64 min_engine_clock;
__u64 min_memory_clock;
};
struct drm_amdgpu_info_hw_ip {