mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
synced 2025-01-15 11:57:46 +00:00
Staging driver fixes for 6.13-rc7
Here are some small staging driver fixes that resolve some reported issues and have been in my tree for too long due to the holiday break. They resolve the following issues: - lots of gpib build-time fixes as reported by testers and 0-day - gpib logical fixes - mailmap fix (already in your tree, but git merge should handle it.) All of these have been in linux-next for a while, with no reported issues other than the duplicated change. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCZ4PLTg8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+yknEACfRy/G6h1DvC9/9WqQA9aWIJLKwcgAn03Rz2Pm 86aUV6HmW1Vh7Ypfbsv+ =6dRm -----END PGP SIGNATURE----- Merge tag 'staging-6.13-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging Pull staging driver fixes from Greg KH: "Here are some small staging driver fixes that resolve some reported issues and have been in my tree for too long due to the holiday break. They resolve the following issues: - lots of gpib build-time fixes as reported by testers and 0-day - gpib logical fixes - mailmap fix All of these have been in linux-next for a while, with no reported issues other than the duplicated change" * tag 'staging-6.13-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: staging: gpib: mite: remove unused global functions staging: gpib: refer to correct config symbol in tnt4882 Makefile mailmap: update Bingwu Zhang's email address staging: gpib: fix address space mixup staging: gpib: use ioport_map staging: gpib: fix pcmcia dependencies staging: gpib: add module author and description fields staging: gpib: fix Makefiles staging: gpib: make global 'usec_diff' functions static staging: gpib: Modify mismatched function name staging: gpib: Add lower bound check for secondary address staging: gpib: Fix erroneous removal of blank before newline
This commit is contained in:
commit
91fff6fa94
2
.mailmap
2
.mailmap
@ -121,6 +121,8 @@ Ben Widawsky <bwidawsk@kernel.org> <benjamin.widawsky@intel.com>
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Benjamin Poirier <benjamin.poirier@gmail.com> <bpoirier@suse.de>
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Benjamin Tissoires <bentiss@kernel.org> <benjamin.tissoires@gmail.com>
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Benjamin Tissoires <bentiss@kernel.org> <benjamin.tissoires@redhat.com>
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Bingwu Zhang <xtex@aosc.io> <xtexchooser@duck.com>
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Bingwu Zhang <xtex@aosc.io> <xtex@xtexx.eu.org>
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Bjorn Andersson <andersson@kernel.org> <bjorn@kryo.se>
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Bjorn Andersson <andersson@kernel.org> <bjorn.andersson@linaro.org>
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Bjorn Andersson <andersson@kernel.org> <bjorn.andersson@sonymobile.com>
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@ -65,6 +65,8 @@ config GPIB_NI_PCI_ISA
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depends on ISA_BUS || PCI || PCMCIA
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depends on HAS_IOPORT
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depends on !X86_PAE
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depends on PCMCIA || !PCMCIA
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depends on HAS_IOPORT_MAP
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select GPIB_COMMON
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select GPIB_NEC7210
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help
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@ -89,6 +91,7 @@ config GPIB_CB7210
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depends on HAS_IOPORT
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depends on ISA_BUS || PCI || PCMCIA
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depends on !X86_PAE
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depends on PCMCIA || !PCMCIA
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select GPIB_COMMON
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select GPIB_NEC7210
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help
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@ -177,6 +180,7 @@ config GPIB_HP82341
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config GPIB_INES
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tristate "INES"
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depends on PCI || ISA_BUS || PCMCIA
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depends on PCMCIA || !PCMCIA
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depends on HAS_IOPORT
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depends on !X86_PAE
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select GPIB_COMMON
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@ -199,8 +203,8 @@ config GPIB_INES
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called cb7210.
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config GPIB_PCMCIA
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bool "PCMCIA/Cardbus support for NI MC and Ines boards"
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depends on PCCARD && (GPIB_NI_PCI_ISA || GPIB_CB7210 || GPIB_INES)
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def_bool y
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depends on PCMCIA && (GPIB_NI_PCI_ISA || GPIB_CB7210 || GPIB_INES)
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help
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Enable PCMCIA/CArdbus support for National Instruments,
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measurement computing boards and Ines boards.
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@ -1,2 +1,2 @@
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obj-m += agilent_82350b.o
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obj-$(CONFIG_GPIB_AGILENT_82350B) += agilent_82350b.o
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@ -700,7 +700,7 @@ static int agilent_82350b_generic_attach(gpib_board_t *board, const gpib_board_c
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GPIB_82350A_REGION));
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dev_dbg(board->gpib_dev, "%s: gpib base address remapped to 0x%p\n",
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driver_name, a_priv->gpib_base);
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tms_priv->iobase = a_priv->gpib_base + TMS9914_BASE_REG;
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tms_priv->mmiobase = a_priv->gpib_base + TMS9914_BASE_REG;
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a_priv->sram_base = ioremap(pci_resource_start(a_priv->pci_device,
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SRAM_82350A_REGION),
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pci_resource_len(a_priv->pci_device,
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@ -724,7 +724,7 @@ static int agilent_82350b_generic_attach(gpib_board_t *board, const gpib_board_c
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pci_resource_len(a_priv->pci_device, GPIB_REGION));
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dev_dbg(board->gpib_dev, "%s: gpib base address remapped to 0x%p\n",
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driver_name, a_priv->gpib_base);
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tms_priv->iobase = a_priv->gpib_base + TMS9914_BASE_REG;
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tms_priv->mmiobase = a_priv->gpib_base + TMS9914_BASE_REG;
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a_priv->sram_base = ioremap(pci_resource_start(a_priv->pci_device, SRAM_REGION),
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pci_resource_len(a_priv->pci_device, SRAM_REGION));
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dev_dbg(board->gpib_dev, "%s: sram base address remapped to 0x%p\n",
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@ -1,4 +1,4 @@
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obj-m += agilent_82357a.o
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obj-$(CONFIG_GPIB_AGILENT_82357A) += agilent_82357a.o
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@ -1,4 +1,4 @@
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ccflags-$(CONFIG_GPIB_PCMCIA) := -DGPIB_PCMCIA
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obj-m += cb7210.o
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obj-$(CONFIG_GPIB_CB7210) += cb7210.o
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@ -971,12 +971,12 @@ int cb_pci_attach(gpib_board_t *board, const gpib_board_config_t *config)
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switch (cb_priv->pci_chip) {
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case PCI_CHIP_AMCC_S5933:
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cb_priv->amcc_iobase = pci_resource_start(cb_priv->pci_device, 0);
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nec_priv->iobase = (void *)(pci_resource_start(cb_priv->pci_device, 1));
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nec_priv->iobase = pci_resource_start(cb_priv->pci_device, 1);
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cb_priv->fifo_iobase = pci_resource_start(cb_priv->pci_device, 2);
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break;
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case PCI_CHIP_QUANCOM:
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nec_priv->iobase = (void *)(pci_resource_start(cb_priv->pci_device, 0));
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cb_priv->fifo_iobase = (unsigned long)nec_priv->iobase;
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nec_priv->iobase = pci_resource_start(cb_priv->pci_device, 0);
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cb_priv->fifo_iobase = nec_priv->iobase;
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break;
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default:
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pr_err("cb7210: bug! unhandled pci_chip=%i\n", cb_priv->pci_chip);
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@ -1040,8 +1040,8 @@ int cb_isa_attach(gpib_board_t *board, const gpib_board_config_t *config)
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return retval;
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cb_priv = board->private_data;
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nec_priv = &cb_priv->nec7210_priv;
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if (request_region((unsigned long)config->ibbase, cb7210_iosize, "cb7210") == 0) {
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pr_err("gpib: ioports starting at 0x%p are already in use\n", config->ibbase);
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if (request_region(config->ibbase, cb7210_iosize, "cb7210") == 0) {
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pr_err("gpib: ioports starting at 0x%u are already in use\n", config->ibbase);
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return -EIO;
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}
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nec_priv->iobase = config->ibbase;
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@ -1471,7 +1471,7 @@ int cb_pcmcia_attach(gpib_board_t *board, const gpib_board_config_t *config)
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(unsigned long)curr_dev->resource[0]->start);
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return -EIO;
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}
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nec_priv->iobase = (void *)(unsigned long)curr_dev->resource[0]->start;
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nec_priv->iobase = curr_dev->resource[0]->start;
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cb_priv->fifo_iobase = curr_dev->resource[0]->start;
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if (request_irq(curr_dev->irq, cb7210_interrupt, IRQF_SHARED,
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@ -113,9 +113,9 @@ enum hs_regs {
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HS_STATUS = 0x8, /* HS_STATUS register */
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};
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static inline unsigned long nec7210_iobase(const struct cb7210_priv *cb_priv)
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static inline u32 nec7210_iobase(const struct cb7210_priv *cb_priv)
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{
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return (unsigned long)(cb_priv->nec7210_priv.iobase);
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return cb_priv->nec7210_priv.iobase;
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}
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static inline int cb7210_page_in_bits(unsigned int page)
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@ -1,3 +1,3 @@
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obj-m += cec_gpib.o
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obj-$(CONFIG_GPIB_CEC_PCI) += cec_gpib.o
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@ -297,8 +297,8 @@ int cec_pci_attach(gpib_board_t *board, const gpib_board_config_t *config)
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cec_priv->plx_iobase = pci_resource_start(cec_priv->pci_device, 1);
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pr_info(" plx9050 base address 0x%lx\n", cec_priv->plx_iobase);
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nec_priv->iobase = (void *)(pci_resource_start(cec_priv->pci_device, 3));
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pr_info(" nec7210 base address 0x%p\n", nec_priv->iobase);
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nec_priv->iobase = pci_resource_start(cec_priv->pci_device, 3);
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pr_info(" nec7210 base address 0x%x\n", nec_priv->iobase);
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isr_flags |= IRQF_SHARED;
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if (request_irq(cec_priv->pci_device->irq, cec_interrupt, isr_flags, "pci-gpib", board)) {
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@ -116,56 +116,6 @@ int io_timed_out(gpib_board_t *board)
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return 0;
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}
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void writeb_wrapper(unsigned int value, void *address)
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{
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writeb(value, address);
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};
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EXPORT_SYMBOL(writeb_wrapper);
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void writew_wrapper(unsigned int value, void *address)
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{
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writew(value, address);
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};
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EXPORT_SYMBOL(writew_wrapper);
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unsigned int readb_wrapper(void *address)
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{
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return readb(address);
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};
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EXPORT_SYMBOL(readb_wrapper);
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unsigned int readw_wrapper(void *address)
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{
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return readw(address);
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};
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EXPORT_SYMBOL(readw_wrapper);
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#ifdef CONFIG_HAS_IOPORT
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void outb_wrapper(unsigned int value, void *address)
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{
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outb(value, (unsigned long)(address));
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};
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EXPORT_SYMBOL(outb_wrapper);
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void outw_wrapper(unsigned int value, void *address)
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{
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outw(value, (unsigned long)(address));
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};
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EXPORT_SYMBOL(outw_wrapper);
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unsigned int inb_wrapper(void *address)
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{
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return inb((unsigned long)(address));
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};
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EXPORT_SYMBOL(inb_wrapper);
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unsigned int inw_wrapper(void *address)
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{
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return inw((unsigned long)(address));
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};
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EXPORT_SYMBOL(inw_wrapper);
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#endif
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/* this is a function instead of a constant because of Suse
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* defining HZ to be a function call to get_hz()
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*/
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@ -536,7 +486,7 @@ int dvrsp(gpib_board_t *board, unsigned int pad, int sad,
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return -1;
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}
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if (pad > MAX_GPIB_PRIMARY_ADDRESS || sad > MAX_GPIB_SECONDARY_ADDRESS) {
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if (pad > MAX_GPIB_PRIMARY_ADDRESS || sad > MAX_GPIB_SECONDARY_ADDRESS || sad < -1) {
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pr_err("gpib: bad address for serial poll");
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return -1;
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}
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@ -1623,7 +1573,7 @@ static int iobase_ioctl(gpib_board_config_t *config, unsigned long arg)
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if (WARN_ON_ONCE(sizeof(void *) > sizeof(base_addr)))
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return -EFAULT;
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config->ibbase = (void *)(unsigned long)(base_addr);
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config->ibbase = base_addr;
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return 0;
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}
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@ -1,3 +1,3 @@
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obj-m += fluke_gpib.o
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obj-$(CONFIG_GPIB_FLUKE) += fluke_gpib.o
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@ -1011,12 +1011,12 @@ static int fluke_attach_impl(gpib_board_t *board, const gpib_board_config_t *con
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}
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e_priv->gpib_iomem_res = res;
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nec_priv->iobase = ioremap(e_priv->gpib_iomem_res->start,
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nec_priv->mmiobase = ioremap(e_priv->gpib_iomem_res->start,
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resource_size(e_priv->gpib_iomem_res));
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pr_info("gpib: iobase %lx remapped to %p, length=%d\n",
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(unsigned long)e_priv->gpib_iomem_res->start,
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nec_priv->iobase, (int)resource_size(e_priv->gpib_iomem_res));
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if (!nec_priv->iobase) {
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pr_info("gpib: mmiobase %llx remapped to %p, length=%d\n",
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(u64)e_priv->gpib_iomem_res->start,
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nec_priv->mmiobase, (int)resource_size(e_priv->gpib_iomem_res));
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if (!nec_priv->mmiobase) {
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dev_err(&fluke_gpib_pdev->dev, "Could not map I/O memory\n");
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return -ENOMEM;
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}
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@ -1107,7 +1107,7 @@ void fluke_detach(gpib_board_t *board)
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gpib_free_pseudo_irq(board);
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nec_priv = &e_priv->nec7210_priv;
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if (nec_priv->iobase) {
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if (nec_priv->mmiobase) {
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fluke_paged_write_byte(e_priv, 0, ISR0_IMR0, ISR0_IMR0_PAGE);
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nec7210_board_reset(nec_priv, board);
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}
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|
@ -72,7 +72,7 @@ static inline uint8_t fluke_read_byte_nolock(struct nec7210_priv *nec_priv,
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{
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u8 retval;
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retval = readl(nec_priv->iobase + register_num * nec_priv->offset);
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retval = readl(nec_priv->mmiobase + register_num * nec_priv->offset);
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return retval;
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}
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@ -80,7 +80,7 @@ static inline uint8_t fluke_read_byte_nolock(struct nec7210_priv *nec_priv,
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static inline void fluke_write_byte_nolock(struct nec7210_priv *nec_priv, uint8_t data,
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int register_num)
|
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{
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writel(data, nec_priv->iobase + register_num * nec_priv->offset);
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writel(data, nec_priv->mmiobase + register_num * nec_priv->offset);
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}
|
||||
|
||||
static inline uint8_t fluke_paged_read_byte(struct fluke_priv *e_priv,
|
||||
|
@ -24,6 +24,8 @@
|
||||
#include <linux/slab.h>
|
||||
|
||||
MODULE_LICENSE("GPL");
|
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MODULE_DESCRIPTION("GPIB Driver for fmh_gpib_core");
|
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MODULE_AUTHOR("Frank Mori Hess <fmh6jj@gmail.com>");
|
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|
||||
static irqreturn_t fmh_gpib_interrupt(int irq, void *arg);
|
||||
static int fmh_gpib_attach_holdoff_all(gpib_board_t *board, const gpib_board_config_t *config);
|
||||
@ -1419,15 +1421,14 @@ static int fmh_gpib_attach_impl(gpib_board_t *board, const gpib_board_config_t *
|
||||
}
|
||||
e_priv->gpib_iomem_res = res;
|
||||
|
||||
nec_priv->iobase = ioremap(e_priv->gpib_iomem_res->start,
|
||||
nec_priv->mmiobase = ioremap(e_priv->gpib_iomem_res->start,
|
||||
resource_size(e_priv->gpib_iomem_res));
|
||||
if (!nec_priv->iobase) {
|
||||
if (!nec_priv->mmiobase) {
|
||||
dev_err(board->dev, "Could not map I/O memory for gpib\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
dev_info(board->dev, "iobase 0x%lx remapped to %p, length=%ld\n",
|
||||
(unsigned long)e_priv->gpib_iomem_res->start,
|
||||
nec_priv->iobase, (unsigned long)resource_size(e_priv->gpib_iomem_res));
|
||||
dev_info(board->dev, "iobase %pr remapped to %p\n",
|
||||
e_priv->gpib_iomem_res, nec_priv->mmiobase);
|
||||
|
||||
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma_fifos");
|
||||
if (!res) {
|
||||
@ -1507,14 +1508,14 @@ void fmh_gpib_detach(gpib_board_t *board)
|
||||
free_irq(e_priv->irq, board);
|
||||
if (e_priv->fifo_base)
|
||||
fifos_write(e_priv, 0, FIFO_CONTROL_STATUS_REG);
|
||||
if (nec_priv->iobase) {
|
||||
if (nec_priv->mmiobase) {
|
||||
write_byte(nec_priv, 0, ISR0_IMR0_REG);
|
||||
nec7210_board_reset(nec_priv, board);
|
||||
}
|
||||
if (e_priv->fifo_base)
|
||||
iounmap(e_priv->fifo_base);
|
||||
if (nec_priv->iobase)
|
||||
iounmap(nec_priv->iobase);
|
||||
if (nec_priv->mmiobase)
|
||||
iounmap(nec_priv->mmiobase);
|
||||
if (e_priv->dma_port_res) {
|
||||
release_mem_region(e_priv->dma_port_res->start,
|
||||
resource_size(e_priv->dma_port_res));
|
||||
@ -1564,12 +1565,12 @@ static int fmh_gpib_pci_attach_impl(gpib_board_t *board, const gpib_board_config
|
||||
e_priv->gpib_iomem_res = &pci_device->resource[gpib_control_status_pci_resource_index];
|
||||
e_priv->dma_port_res = &pci_device->resource[gpib_fifo_pci_resource_index];
|
||||
|
||||
nec_priv->iobase = ioremap(pci_resource_start(pci_device,
|
||||
nec_priv->mmiobase = ioremap(pci_resource_start(pci_device,
|
||||
gpib_control_status_pci_resource_index),
|
||||
pci_resource_len(pci_device,
|
||||
gpib_control_status_pci_resource_index));
|
||||
dev_info(board->dev, "base address for gpib control/status registers remapped to 0x%p\n",
|
||||
nec_priv->iobase);
|
||||
nec_priv->mmiobase);
|
||||
|
||||
if (e_priv->dma_port_res->flags & IORESOURCE_MEM) {
|
||||
e_priv->fifo_base = ioremap(pci_resource_start(pci_device,
|
||||
@ -1632,14 +1633,14 @@ void fmh_gpib_pci_detach(gpib_board_t *board)
|
||||
free_irq(e_priv->irq, board);
|
||||
if (e_priv->fifo_base)
|
||||
fifos_write(e_priv, 0, FIFO_CONTROL_STATUS_REG);
|
||||
if (nec_priv->iobase) {
|
||||
if (nec_priv->mmiobase) {
|
||||
write_byte(nec_priv, 0, ISR0_IMR0_REG);
|
||||
nec7210_board_reset(nec_priv, board);
|
||||
}
|
||||
if (e_priv->fifo_base)
|
||||
iounmap(e_priv->fifo_base);
|
||||
if (nec_priv->iobase)
|
||||
iounmap(nec_priv->iobase);
|
||||
if (nec_priv->mmiobase)
|
||||
iounmap(nec_priv->mmiobase);
|
||||
if (e_priv->dma_port_res || e_priv->gpib_iomem_res)
|
||||
pci_release_regions(to_pci_dev(board->dev));
|
||||
if (board->dev)
|
||||
|
@ -127,13 +127,13 @@ static const unsigned int fifo_max_burst_length_mask = 0x00ff;
|
||||
static inline uint8_t gpib_cs_read_byte(struct nec7210_priv *nec_priv,
|
||||
unsigned int register_num)
|
||||
{
|
||||
return readb(nec_priv->iobase + register_num * nec_priv->offset);
|
||||
return readb(nec_priv->mmiobase + register_num * nec_priv->offset);
|
||||
}
|
||||
|
||||
static inline void gpib_cs_write_byte(struct nec7210_priv *nec_priv, uint8_t data,
|
||||
unsigned int register_num)
|
||||
{
|
||||
writeb(data, nec_priv->iobase + register_num * nec_priv->offset);
|
||||
writeb(data, nec_priv->mmiobase + register_num * nec_priv->offset);
|
||||
}
|
||||
|
||||
static inline uint16_t fifos_read(struct fmh_priv *fmh_priv, int register_num)
|
||||
|
@ -1,4 +1,4 @@
|
||||
|
||||
obj-m += gpib_bitbang.o
|
||||
obj-$(CONFIG_GPIB_GPIO) += gpib_bitbang.o
|
||||
|
||||
|
||||
|
@ -315,7 +315,7 @@ struct bb_priv {
|
||||
enum listener_function_state listener_state;
|
||||
};
|
||||
|
||||
inline long usec_diff(struct timespec64 *a, struct timespec64 *b);
|
||||
static inline long usec_diff(struct timespec64 *a, struct timespec64 *b);
|
||||
static void bb_buffer_print(unsigned char *buffer, size_t length, int cmd, int eoi);
|
||||
static void set_data_lines(u8 byte);
|
||||
static u8 get_data_lines(void);
|
||||
|
@ -1,4 +1,4 @@
|
||||
|
||||
obj-m += hp82335.o
|
||||
obj-$(CONFIG_GPIB_HP82335) += hp82335.o
|
||||
|
||||
|
||||
|
@ -9,6 +9,7 @@
|
||||
*/
|
||||
|
||||
#include "hp82335.h"
|
||||
#include <linux/io.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/module.h>
|
||||
@ -233,7 +234,7 @@ static void hp82335_clear_interrupt(struct hp82335_priv *hp_priv)
|
||||
{
|
||||
struct tms9914_priv *tms_priv = &hp_priv->tms9914_priv;
|
||||
|
||||
writeb(0, tms_priv->iobase + HPREG_INTR_CLEAR);
|
||||
writeb(0, tms_priv->mmiobase + HPREG_INTR_CLEAR);
|
||||
}
|
||||
|
||||
int hp82335_attach(gpib_board_t *board, const gpib_board_config_t *config)
|
||||
@ -241,7 +242,7 @@ int hp82335_attach(gpib_board_t *board, const gpib_board_config_t *config)
|
||||
struct hp82335_priv *hp_priv;
|
||||
struct tms9914_priv *tms_priv;
|
||||
int retval;
|
||||
const unsigned long upper_iomem_base = (unsigned long)config->ibbase + hp82335_rom_size;
|
||||
const unsigned long upper_iomem_base = config->ibbase + hp82335_rom_size;
|
||||
|
||||
board->status = 0;
|
||||
|
||||
@ -253,7 +254,7 @@ int hp82335_attach(gpib_board_t *board, const gpib_board_config_t *config)
|
||||
tms_priv->write_byte = hp82335_write_byte;
|
||||
tms_priv->offset = 1;
|
||||
|
||||
switch ((unsigned long)(config->ibbase)) {
|
||||
switch (config->ibbase) {
|
||||
case 0xc4000:
|
||||
case 0xc8000:
|
||||
case 0xcc000:
|
||||
@ -271,7 +272,7 @@ int hp82335_attach(gpib_board_t *board, const gpib_board_config_t *config)
|
||||
case 0xfc000:
|
||||
break;
|
||||
default:
|
||||
pr_err("hp82335: invalid base io address 0x%p\n", config->ibbase);
|
||||
pr_err("hp82335: invalid base io address 0x%u\n", config->ibbase);
|
||||
return -EINVAL;
|
||||
}
|
||||
if (!request_mem_region(upper_iomem_base, hp82335_upper_iomem_size, "hp82335")) {
|
||||
@ -280,9 +281,9 @@ int hp82335_attach(gpib_board_t *board, const gpib_board_config_t *config)
|
||||
return -EBUSY;
|
||||
}
|
||||
hp_priv->raw_iobase = upper_iomem_base;
|
||||
tms_priv->iobase = ioremap(upper_iomem_base, hp82335_upper_iomem_size);
|
||||
tms_priv->mmiobase = ioremap(upper_iomem_base, hp82335_upper_iomem_size);
|
||||
pr_info("hp82335: upper half of 82335 iomem region 0x%lx remapped to 0x%p\n",
|
||||
hp_priv->raw_iobase, tms_priv->iobase);
|
||||
hp_priv->raw_iobase, tms_priv->mmiobase);
|
||||
|
||||
retval = request_irq(config->ibirq, hp82335_interrupt, 0, "hp82335", board);
|
||||
if (retval) {
|
||||
@ -296,7 +297,7 @@ int hp82335_attach(gpib_board_t *board, const gpib_board_config_t *config)
|
||||
|
||||
hp82335_clear_interrupt(hp_priv);
|
||||
|
||||
writeb(INTR_ENABLE, tms_priv->iobase + HPREG_CCR);
|
||||
writeb(INTR_ENABLE, tms_priv->mmiobase + HPREG_CCR);
|
||||
|
||||
tms9914_online(board, tms_priv);
|
||||
|
||||
@ -312,10 +313,10 @@ void hp82335_detach(gpib_board_t *board)
|
||||
tms_priv = &hp_priv->tms9914_priv;
|
||||
if (hp_priv->irq)
|
||||
free_irq(hp_priv->irq, board);
|
||||
if (tms_priv->iobase) {
|
||||
writeb(0, tms_priv->iobase + HPREG_CCR);
|
||||
if (tms_priv->mmiobase) {
|
||||
writeb(0, tms_priv->mmiobase + HPREG_CCR);
|
||||
tms9914_board_reset(tms_priv);
|
||||
iounmap((void *)tms_priv->iobase);
|
||||
iounmap(tms_priv->mmiobase);
|
||||
}
|
||||
if (hp_priv->raw_iobase)
|
||||
release_mem_region(hp_priv->raw_iobase, hp82335_upper_iomem_size);
|
||||
|
@ -1,2 +1,2 @@
|
||||
|
||||
obj-m += hp_82341.o
|
||||
obj-$(CONFIG_GPIB_HP82341) += hp_82341.o
|
||||
|
@ -473,12 +473,12 @@ void hp_82341_free_private(gpib_board_t *board)
|
||||
|
||||
static uint8_t hp_82341_read_byte(struct tms9914_priv *priv, unsigned int register_num)
|
||||
{
|
||||
return inb((unsigned long)(priv->iobase) + register_num);
|
||||
return inb(priv->iobase + register_num);
|
||||
}
|
||||
|
||||
static void hp_82341_write_byte(struct tms9914_priv *priv, uint8_t data, unsigned int register_num)
|
||||
{
|
||||
outb(data, (unsigned long)(priv->iobase) + register_num);
|
||||
outb(data, priv->iobase + register_num);
|
||||
}
|
||||
|
||||
static int hp_82341_find_isapnp_board(struct pnp_dev **dev)
|
||||
@ -682,8 +682,8 @@ int hp_82341_attach(gpib_board_t *board, const gpib_board_config_t *config)
|
||||
{
|
||||
struct hp_82341_priv *hp_priv;
|
||||
struct tms9914_priv *tms_priv;
|
||||
unsigned long start_addr;
|
||||
void *iobase;
|
||||
u32 start_addr;
|
||||
u32 iobase;
|
||||
int irq;
|
||||
int i;
|
||||
int retval;
|
||||
@ -704,7 +704,7 @@ int hp_82341_attach(gpib_board_t *board, const gpib_board_config_t *config)
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
hp_priv->pnp_dev = dev;
|
||||
iobase = (void *)(pnp_port_start(dev, 0));
|
||||
iobase = pnp_port_start(dev, 0);
|
||||
irq = pnp_irq(dev, 0);
|
||||
hp_priv->hw_version = HW_VERSION_82341D;
|
||||
hp_priv->io_region_offset = 0x8;
|
||||
@ -714,9 +714,9 @@ int hp_82341_attach(gpib_board_t *board, const gpib_board_config_t *config)
|
||||
hp_priv->hw_version = HW_VERSION_82341C;
|
||||
hp_priv->io_region_offset = 0x400;
|
||||
}
|
||||
pr_info("hp_82341: base io 0x%p\n", iobase);
|
||||
pr_info("hp_82341: base io 0x%u\n", iobase);
|
||||
for (i = 0; i < hp_82341_num_io_regions; ++i) {
|
||||
start_addr = (unsigned long)(iobase) + i * hp_priv->io_region_offset;
|
||||
start_addr = iobase + i * hp_priv->io_region_offset;
|
||||
if (!request_region(start_addr, hp_82341_region_iosize, "hp_82341")) {
|
||||
pr_err("hp_82341: failed to allocate io ports 0x%lx-0x%lx\n",
|
||||
start_addr,
|
||||
@ -725,7 +725,7 @@ int hp_82341_attach(gpib_board_t *board, const gpib_board_config_t *config)
|
||||
}
|
||||
hp_priv->iobase[i] = start_addr;
|
||||
}
|
||||
tms_priv->iobase = (void *)(hp_priv->iobase[2]);
|
||||
tms_priv->iobase = hp_priv->iobase[2];
|
||||
if (hp_priv->hw_version == HW_VERSION_82341D) {
|
||||
retval = isapnp_cfg_begin(hp_priv->pnp_dev->card->number,
|
||||
hp_priv->pnp_dev->number);
|
||||
|
@ -16,6 +16,7 @@
|
||||
|
||||
#include <linux/fs.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
void gpib_register_driver(gpib_interface_t *interface, struct module *mod);
|
||||
void gpib_unregister_driver(gpib_interface_t *interface);
|
||||
@ -35,16 +36,5 @@ extern gpib_board_t board_array[GPIB_MAX_NUM_BOARDS];
|
||||
|
||||
extern struct list_head registered_drivers;
|
||||
|
||||
#include <linux/io.h>
|
||||
|
||||
void writeb_wrapper(unsigned int value, void *address);
|
||||
unsigned int readb_wrapper(void *address);
|
||||
void outb_wrapper(unsigned int value, void *address);
|
||||
unsigned int inb_wrapper(void *address);
|
||||
void writew_wrapper(unsigned int value, void *address);
|
||||
unsigned int readw_wrapper(void *address);
|
||||
void outw_wrapper(unsigned int value, void *address);
|
||||
unsigned int inw_wrapper(void *address);
|
||||
|
||||
#endif // _GPIB_P_H
|
||||
|
||||
|
@ -31,7 +31,8 @@ typedef struct {
|
||||
void *init_data;
|
||||
int init_data_length;
|
||||
/* IO base address to use for non-pnp cards (set by core, driver should make local copy) */
|
||||
void *ibbase;
|
||||
u32 ibbase;
|
||||
void __iomem *mmibbase;
|
||||
/* IRQ to use for non-pnp cards (set by core, driver should make local copy) */
|
||||
unsigned int ibirq;
|
||||
/* dma channel to use for non-pnp cards (set by core, driver should make local copy) */
|
||||
|
@ -18,7 +18,10 @@
|
||||
|
||||
/* struct used to provide variables local to a nec7210 chip */
|
||||
struct nec7210_priv {
|
||||
void *iobase;
|
||||
#ifdef CONFIG_HAS_IOPORT
|
||||
u32 iobase;
|
||||
#endif
|
||||
void __iomem *mmiobase;
|
||||
unsigned int offset; // offset between successive nec7210 io addresses
|
||||
unsigned int dma_channel;
|
||||
u8 *dma_buffer;
|
||||
|
@ -20,7 +20,10 @@ enum tms9914_holdoff_mode {
|
||||
|
||||
/* struct used to provide variables local to a tms9914 chip */
|
||||
struct tms9914_priv {
|
||||
void *iobase;
|
||||
#ifdef CONFIG_HAS_IOPORT
|
||||
u32 iobase;
|
||||
#endif
|
||||
void __iomem *mmiobase;
|
||||
unsigned int offset; // offset between successive tms9914 io addresses
|
||||
unsigned int dma_channel;
|
||||
// software copy of bits written to interrupt mask registers
|
||||
|
@ -1,4 +1,4 @@
|
||||
ccflags-$(CONFIG_GPIB_PCMCIA) := -DGPIB_PCMCIA
|
||||
obj-m += ines_gpib.o
|
||||
obj-$(CONFIG_GPIB_INES) += ines_gpib.o
|
||||
|
||||
|
||||
|
@ -83,14 +83,14 @@ void ines_set_xfer_counter(struct ines_priv *priv, unsigned int count);
|
||||
/* inb/outb wrappers */
|
||||
static inline unsigned int ines_inb(struct ines_priv *priv, unsigned int register_number)
|
||||
{
|
||||
return inb((unsigned long)(priv->nec7210_priv.iobase) +
|
||||
return inb(priv->nec7210_priv.iobase +
|
||||
register_number * priv->nec7210_priv.offset);
|
||||
}
|
||||
|
||||
static inline void ines_outb(struct ines_priv *priv, unsigned int value,
|
||||
unsigned int register_number)
|
||||
{
|
||||
outb(value, (unsigned long)(priv->nec7210_priv.iobase) +
|
||||
outb(value, priv->nec7210_priv.iobase +
|
||||
register_number * priv->nec7210_priv.offset);
|
||||
}
|
||||
|
||||
|
@ -273,10 +273,10 @@ irqreturn_t ines_pci_interrupt(int irq, void *arg)
|
||||
struct nec7210_priv *nec_priv = &priv->nec7210_priv;
|
||||
|
||||
if (priv->pci_chip_type == PCI_CHIP_QUANCOM) {
|
||||
if ((inb((unsigned long)nec_priv->iobase +
|
||||
if ((inb(nec_priv->iobase +
|
||||
QUANCOM_IRQ_CONTROL_STATUS_REG) &
|
||||
QUANCOM_IRQ_ASSERTED_BIT))
|
||||
outb(QUANCOM_IRQ_ENABLE_BIT, (unsigned long)(nec_priv->iobase) +
|
||||
outb(QUANCOM_IRQ_ENABLE_BIT, nec_priv->iobase +
|
||||
QUANCOM_IRQ_CONTROL_STATUS_REG);
|
||||
}
|
||||
|
||||
@ -780,8 +780,8 @@ static int ines_common_pci_attach(gpib_board_t *board, const gpib_board_config_t
|
||||
|
||||
if (pci_request_regions(ines_priv->pci_device, "ines-gpib"))
|
||||
return -1;
|
||||
nec_priv->iobase = (void *)(pci_resource_start(ines_priv->pci_device,
|
||||
found_id.gpib_region));
|
||||
nec_priv->iobase = pci_resource_start(ines_priv->pci_device,
|
||||
found_id.gpib_region);
|
||||
|
||||
ines_priv->pci_chip_type = found_id.pci_chip_type;
|
||||
nec_priv->offset = found_id.io_offset;
|
||||
@ -840,7 +840,7 @@ static int ines_common_pci_attach(gpib_board_t *board, const gpib_board_config_t
|
||||
}
|
||||
break;
|
||||
case PCI_CHIP_QUANCOM:
|
||||
outb(QUANCOM_IRQ_ENABLE_BIT, (unsigned long)(nec_priv->iobase) +
|
||||
outb(QUANCOM_IRQ_ENABLE_BIT, nec_priv->iobase +
|
||||
QUANCOM_IRQ_CONTROL_STATUS_REG);
|
||||
break;
|
||||
case PCI_CHIP_QUICKLOGIC5030:
|
||||
@ -899,8 +899,8 @@ int ines_isa_attach(gpib_board_t *board, const gpib_board_config_t *config)
|
||||
ines_priv = board->private_data;
|
||||
nec_priv = &ines_priv->nec7210_priv;
|
||||
|
||||
if (!request_region((unsigned long)config->ibbase, ines_isa_iosize, "ines_gpib")) {
|
||||
pr_err("ines_gpib: ioports at 0x%p already in use\n", config->ibbase);
|
||||
if (!request_region(config->ibbase, ines_isa_iosize, "ines_gpib")) {
|
||||
pr_err("ines_gpib: ioports at 0x%x already in use\n", config->ibbase);
|
||||
return -1;
|
||||
}
|
||||
nec_priv->iobase = config->ibbase;
|
||||
@ -931,7 +931,7 @@ void ines_pci_detach(gpib_board_t *board)
|
||||
break;
|
||||
case PCI_CHIP_QUANCOM:
|
||||
if (nec_priv->iobase)
|
||||
outb(0, (unsigned long)(nec_priv->iobase) +
|
||||
outb(0, nec_priv->iobase +
|
||||
QUANCOM_IRQ_CONTROL_STATUS_REG);
|
||||
break;
|
||||
default:
|
||||
@ -960,7 +960,7 @@ void ines_isa_detach(gpib_board_t *board)
|
||||
free_irq(ines_priv->irq, board);
|
||||
if (nec_priv->iobase) {
|
||||
nec7210_board_reset(nec_priv, board);
|
||||
release_region((unsigned long)(nec_priv->iobase), ines_isa_iosize);
|
||||
release_region(nec_priv->iobase, ines_isa_iosize);
|
||||
}
|
||||
}
|
||||
ines_free_private(board);
|
||||
@ -1355,7 +1355,7 @@ int ines_common_pcmcia_attach(gpib_board_t *board)
|
||||
return -1;
|
||||
}
|
||||
|
||||
nec_priv->iobase = (void *)(unsigned long)curr_dev->resource[0]->start;
|
||||
nec_priv->iobase = curr_dev->resource[0]->start;
|
||||
|
||||
nec7210_board_reset(nec_priv, board);
|
||||
|
||||
@ -1410,7 +1410,7 @@ void ines_pcmcia_detach(gpib_board_t *board)
|
||||
free_irq(ines_priv->irq, board);
|
||||
if (nec_priv->iobase) {
|
||||
nec7210_board_reset(nec_priv, board);
|
||||
release_region((unsigned long)(nec_priv->iobase), ines_pcmcia_iosize);
|
||||
release_region(nec_priv->iobase, ines_pcmcia_iosize);
|
||||
}
|
||||
}
|
||||
ines_free_private(board);
|
||||
|
@ -1,3 +1,3 @@
|
||||
|
||||
obj-m += lpvo_usb_gpib.o
|
||||
obj-$(CONFIG_GPIB_LPVO) += lpvo_usb_gpib.o
|
||||
|
||||
|
@ -99,8 +99,8 @@ module_param(debug, int, 0644);
|
||||
#define USB_GPIB_DEBUG_ON "\nIBDE\xAA\n"
|
||||
#define USB_GPIB_SET_LISTEN "\nIBDT0\n"
|
||||
#define USB_GPIB_SET_TALK "\nIBDT1\n"
|
||||
#define USB_GPIB_SET_LINES "\nIBDC\n"
|
||||
#define USB_GPIB_SET_DATA "\nIBDM\n"
|
||||
#define USB_GPIB_SET_LINES "\nIBDC.\n"
|
||||
#define USB_GPIB_SET_DATA "\nIBDM.\n"
|
||||
#define USB_GPIB_READ_LINES "\nIBD?C\n"
|
||||
#define USB_GPIB_READ_DATA "\nIBD?M\n"
|
||||
#define USB_GPIB_READ_BUS "\nIBD??\n"
|
||||
@ -210,7 +210,7 @@ static int skel_do_release(gpib_board_t *);
|
||||
* (unix time in sec and NANOsec)
|
||||
*/
|
||||
|
||||
inline int usec_diff(struct timespec64 *a, struct timespec64 *b)
|
||||
static inline int usec_diff(struct timespec64 *a, struct timespec64 *b)
|
||||
{
|
||||
return ((a->tv_sec - b->tv_sec) * 1000000 +
|
||||
(a->tv_nsec - b->tv_nsec) / 1000);
|
||||
@ -436,7 +436,7 @@ static void set_timeout(gpib_board_t *board)
|
||||
static int usb_gpib_attach(gpib_board_t *board, const gpib_board_config_t *config)
|
||||
{
|
||||
int retval, j;
|
||||
int base = (long)config->ibbase;
|
||||
u32 base = config->ibbase;
|
||||
char *device_path;
|
||||
int match;
|
||||
struct usb_device *udev;
|
||||
@ -589,7 +589,7 @@ static int usb_gpib_command(gpib_board_t *board,
|
||||
size_t *bytes_written)
|
||||
{
|
||||
int i, retval;
|
||||
char command[6] = "IBc\n";
|
||||
char command[6] = "IBc.\n";
|
||||
|
||||
DIA_LOG(1, "enter %p\n", board);
|
||||
|
||||
@ -608,7 +608,7 @@ static int usb_gpib_command(gpib_board_t *board,
|
||||
}
|
||||
|
||||
/**
|
||||
* disable_eos() - Disable END on eos byte (END on EOI only)
|
||||
* usb_gpib_disable_eos() - Disable END on eos byte (END on EOI only)
|
||||
*
|
||||
* @board: the gpib_board data area for this gpib interface
|
||||
*
|
||||
@ -624,7 +624,7 @@ static void usb_gpib_disable_eos(gpib_board_t *board)
|
||||
}
|
||||
|
||||
/**
|
||||
* enable_eos() - Enable END for reads when eos byte is received.
|
||||
* usb_gpib_enable_eos() - Enable END for reads when eos byte is received.
|
||||
*
|
||||
* @board: the gpib_board data area for this gpib interface
|
||||
* @eos_byte: the 'eos' byte
|
||||
@ -647,7 +647,7 @@ static int usb_gpib_enable_eos(gpib_board_t *board,
|
||||
}
|
||||
|
||||
/**
|
||||
* go_to_standby() - De-assert ATN
|
||||
* usb_gpib_go_to_standby() - De-assert ATN
|
||||
*
|
||||
* @board: the gpib_board data area for this gpib interface
|
||||
*/
|
||||
@ -664,7 +664,7 @@ static int usb_gpib_go_to_standby(gpib_board_t *board)
|
||||
}
|
||||
|
||||
/**
|
||||
* interface_clear() - Assert or de-assert IFC
|
||||
* usb_gpib_interface_clear() - Assert or de-assert IFC
|
||||
*
|
||||
* @board: the gpib_board data area for this gpib interface
|
||||
* assert: 1: assert IFC; 0: de-assert IFC
|
||||
|
@ -1035,7 +1035,7 @@ EXPORT_SYMBOL(nec7210_board_online);
|
||||
/* wrappers for io */
|
||||
uint8_t nec7210_ioport_read_byte(struct nec7210_priv *priv, unsigned int register_num)
|
||||
{
|
||||
return inb((unsigned long)(priv->iobase) + register_num * priv->offset);
|
||||
return inb(priv->iobase + register_num * priv->offset);
|
||||
}
|
||||
EXPORT_SYMBOL(nec7210_ioport_read_byte);
|
||||
|
||||
@ -1047,7 +1047,7 @@ void nec7210_ioport_write_byte(struct nec7210_priv *priv, uint8_t data, unsigned
|
||||
*/
|
||||
nec7210_locking_ioport_write_byte(priv, data, register_num);
|
||||
else
|
||||
outb(data, (unsigned long)(priv->iobase) + register_num * priv->offset);
|
||||
outb(data, priv->iobase + register_num * priv->offset);
|
||||
}
|
||||
EXPORT_SYMBOL(nec7210_ioport_write_byte);
|
||||
|
||||
@ -1058,7 +1058,7 @@ uint8_t nec7210_locking_ioport_read_byte(struct nec7210_priv *priv, unsigned int
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&priv->register_page_lock, flags);
|
||||
retval = inb((unsigned long)(priv->iobase) + register_num * priv->offset);
|
||||
retval = inb(priv->iobase + register_num * priv->offset);
|
||||
spin_unlock_irqrestore(&priv->register_page_lock, flags);
|
||||
return retval;
|
||||
}
|
||||
@ -1072,7 +1072,7 @@ void nec7210_locking_ioport_write_byte(struct nec7210_priv *priv, uint8_t data,
|
||||
spin_lock_irqsave(&priv->register_page_lock, flags);
|
||||
if (register_num == AUXMR)
|
||||
udelay(1);
|
||||
outb(data, (unsigned long)(priv->iobase) + register_num * priv->offset);
|
||||
outb(data, priv->iobase + register_num * priv->offset);
|
||||
spin_unlock_irqrestore(&priv->register_page_lock, flags);
|
||||
}
|
||||
EXPORT_SYMBOL(nec7210_locking_ioport_write_byte);
|
||||
@ -1080,7 +1080,7 @@ EXPORT_SYMBOL(nec7210_locking_ioport_write_byte);
|
||||
|
||||
uint8_t nec7210_iomem_read_byte(struct nec7210_priv *priv, unsigned int register_num)
|
||||
{
|
||||
return readb(priv->iobase + register_num * priv->offset);
|
||||
return readb(priv->mmiobase + register_num * priv->offset);
|
||||
}
|
||||
EXPORT_SYMBOL(nec7210_iomem_read_byte);
|
||||
|
||||
@ -1092,7 +1092,7 @@ void nec7210_iomem_write_byte(struct nec7210_priv *priv, uint8_t data, unsigned
|
||||
*/
|
||||
nec7210_locking_iomem_write_byte(priv, data, register_num);
|
||||
else
|
||||
writeb(data, priv->iobase + register_num * priv->offset);
|
||||
writeb(data, priv->mmiobase + register_num * priv->offset);
|
||||
}
|
||||
EXPORT_SYMBOL(nec7210_iomem_write_byte);
|
||||
|
||||
@ -1102,7 +1102,7 @@ uint8_t nec7210_locking_iomem_read_byte(struct nec7210_priv *priv, unsigned int
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&priv->register_page_lock, flags);
|
||||
retval = readb(priv->iobase + register_num * priv->offset);
|
||||
retval = readb(priv->mmiobase + register_num * priv->offset);
|
||||
spin_unlock_irqrestore(&priv->register_page_lock, flags);
|
||||
return retval;
|
||||
}
|
||||
@ -1116,7 +1116,7 @@ void nec7210_locking_iomem_write_byte(struct nec7210_priv *priv, uint8_t data,
|
||||
spin_lock_irqsave(&priv->register_page_lock, flags);
|
||||
if (register_num == AUXMR)
|
||||
udelay(1);
|
||||
writeb(data, priv->iobase + register_num * priv->offset);
|
||||
writeb(data, priv->mmiobase + register_num * priv->offset);
|
||||
spin_unlock_irqrestore(&priv->register_page_lock, flags);
|
||||
}
|
||||
EXPORT_SYMBOL(nec7210_locking_iomem_write_byte);
|
||||
|
@ -1,4 +1,4 @@
|
||||
|
||||
obj-m += ni_usb_gpib.o
|
||||
obj-$(CONFIG_GPIB_NI_USB) += ni_usb_gpib.o
|
||||
|
||||
|
||||
|
@ -1,5 +1,5 @@
|
||||
|
||||
obj-m += pc2_gpib.o
|
||||
obj-$(CONFIG_GPIB_PC2) += pc2_gpib.o
|
||||
|
||||
|
||||
|
||||
|
@ -426,7 +426,7 @@ int pc2_attach(gpib_board_t *board, const gpib_board_config_t *config)
|
||||
nec_priv = &pc2_priv->nec7210_priv;
|
||||
nec_priv->offset = pc2_reg_offset;
|
||||
|
||||
if (request_region((unsigned long)config->ibbase, pc2_iosize, "pc2") == 0) {
|
||||
if (request_region(config->ibbase, pc2_iosize, "pc2") == 0) {
|
||||
pr_err("gpib: ioports are already in use\n");
|
||||
return -1;
|
||||
}
|
||||
@ -471,7 +471,7 @@ void pc2_detach(gpib_board_t *board)
|
||||
free_irq(pc2_priv->irq, board);
|
||||
if (nec_priv->iobase) {
|
||||
nec7210_board_reset(nec_priv, board);
|
||||
release_region((unsigned long)(nec_priv->iobase), pc2_iosize);
|
||||
release_region(nec_priv->iobase, pc2_iosize);
|
||||
}
|
||||
if (nec_priv->dma_buffer) {
|
||||
dma_free_coherent(board->dev, nec_priv->dma_buffer_length,
|
||||
@ -498,14 +498,14 @@ static int pc2a_common_attach(gpib_board_t *board, const gpib_board_config_t *co
|
||||
nec_priv = &pc2_priv->nec7210_priv;
|
||||
nec_priv->offset = pc2a_reg_offset;
|
||||
|
||||
switch ((unsigned long)(config->ibbase)) {
|
||||
switch (config->ibbase) {
|
||||
case 0x02e1:
|
||||
case 0x22e1:
|
||||
case 0x42e1:
|
||||
case 0x62e1:
|
||||
break;
|
||||
default:
|
||||
pr_err("PCIIa base range invalid, must be one of 0x[0246]2e1, but is 0x%p\n",
|
||||
pr_err("PCIIa base range invalid, must be one of 0x[0246]2e1, but is 0x%d\n",
|
||||
config->ibbase);
|
||||
return -1;
|
||||
}
|
||||
@ -522,7 +522,7 @@ static int pc2a_common_attach(gpib_board_t *board, const gpib_board_config_t *co
|
||||
unsigned int err = 0;
|
||||
|
||||
for (i = 0; i < num_registers; i++) {
|
||||
if (check_region((unsigned long)config->ibbase + i * pc2a_reg_offset, 1))
|
||||
if (check_region(config->ibbase + i * pc2a_reg_offset, 1))
|
||||
err++;
|
||||
}
|
||||
if (config->ibirq && check_region(pc2a_clear_intr_iobase + config->ibirq, 1))
|
||||
@ -533,11 +533,11 @@ static int pc2a_common_attach(gpib_board_t *board, const gpib_board_config_t *co
|
||||
}
|
||||
#endif
|
||||
for (i = 0; i < num_registers; i++) {
|
||||
if (!request_region((unsigned long)config->ibbase +
|
||||
if (!request_region(config->ibbase +
|
||||
i * pc2a_reg_offset, 1, "pc2a")) {
|
||||
pr_err("gpib: ioports are already in use");
|
||||
for (j = 0; j < i; j++)
|
||||
release_region((unsigned long)(config->ibbase) +
|
||||
release_region(config->ibbase +
|
||||
j * pc2a_reg_offset, 1);
|
||||
return -1;
|
||||
}
|
||||
@ -608,7 +608,7 @@ static void pc2a_common_detach(gpib_board_t *board, unsigned int num_registers)
|
||||
if (nec_priv->iobase) {
|
||||
nec7210_board_reset(nec_priv, board);
|
||||
for (i = 0; i < num_registers; i++)
|
||||
release_region((unsigned long)nec_priv->iobase +
|
||||
release_region(nec_priv->iobase +
|
||||
i * pc2a_reg_offset, 1);
|
||||
}
|
||||
if (pc2_priv->clear_intr_addr)
|
||||
|
@ -1,5 +1,5 @@
|
||||
|
||||
obj-m += tms9914.o
|
||||
obj-$(CONFIG_GPIB_TMS9914) += tms9914.o
|
||||
|
||||
|
||||
|
||||
|
@ -866,14 +866,14 @@ EXPORT_SYMBOL_GPL(tms9914_online);
|
||||
// wrapper for inb
|
||||
uint8_t tms9914_ioport_read_byte(struct tms9914_priv *priv, unsigned int register_num)
|
||||
{
|
||||
return inb((unsigned long)(priv->iobase) + register_num * priv->offset);
|
||||
return inb(priv->iobase + register_num * priv->offset);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(tms9914_ioport_read_byte);
|
||||
|
||||
// wrapper for outb
|
||||
void tms9914_ioport_write_byte(struct tms9914_priv *priv, uint8_t data, unsigned int register_num)
|
||||
{
|
||||
outb(data, (unsigned long)(priv->iobase) + register_num * priv->offset);
|
||||
outb(data, priv->iobase + register_num * priv->offset);
|
||||
if (register_num == AUXCR)
|
||||
udelay(1);
|
||||
}
|
||||
@ -883,14 +883,14 @@ EXPORT_SYMBOL_GPL(tms9914_ioport_write_byte);
|
||||
// wrapper for readb
|
||||
uint8_t tms9914_iomem_read_byte(struct tms9914_priv *priv, unsigned int register_num)
|
||||
{
|
||||
return readb(priv->iobase + register_num * priv->offset);
|
||||
return readb(priv->mmiobase + register_num * priv->offset);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(tms9914_iomem_read_byte);
|
||||
|
||||
// wrapper for writeb
|
||||
void tms9914_iomem_write_byte(struct tms9914_priv *priv, uint8_t data, unsigned int register_num)
|
||||
{
|
||||
writeb(data, priv->iobase + register_num * priv->offset);
|
||||
writeb(data, priv->mmiobase + register_num * priv->offset);
|
||||
if (register_num == AUXCR)
|
||||
udelay(1);
|
||||
}
|
||||
|
@ -1,5 +1,5 @@
|
||||
ccflags-$(CONFIG_GPIB_PCMCIA) := -DGPIB_PCMCIA
|
||||
obj-m += tnt4882.o
|
||||
obj-$(CONFIG_GPIB_NI_PCI_ISA) += tnt4882.o
|
||||
|
||||
tnt4882-objs := tnt4882_gpib.o mite.o
|
||||
|
||||
|
@ -148,72 +148,3 @@ void mite_list_devices(void)
|
||||
}
|
||||
pr_info("\n");
|
||||
}
|
||||
|
||||
int mite_bytes_transferred(struct mite_struct *mite, int chan)
|
||||
{
|
||||
int dar, fcr;
|
||||
|
||||
dar = readl(mite->mite_io_addr + MITE_DAR + CHAN_OFFSET(chan));
|
||||
fcr = readl(mite->mite_io_addr + MITE_FCR + CHAN_OFFSET(chan)) & 0x000000FF;
|
||||
return dar - fcr;
|
||||
}
|
||||
|
||||
int mite_dma_tcr(struct mite_struct *mite)
|
||||
{
|
||||
int tcr;
|
||||
int lkar;
|
||||
|
||||
lkar = readl(mite->mite_io_addr + CHAN_OFFSET(0) + MITE_LKAR);
|
||||
tcr = readl(mite->mite_io_addr + CHAN_OFFSET(0) + MITE_TCR);
|
||||
MDPRINTK("lkar=0x%08x tcr=%d\n", lkar, tcr);
|
||||
|
||||
return tcr;
|
||||
}
|
||||
|
||||
void mite_dma_disarm(struct mite_struct *mite)
|
||||
{
|
||||
int chor;
|
||||
|
||||
/* disarm */
|
||||
chor = CHOR_ABORT;
|
||||
writel(chor, mite->mite_io_addr + CHAN_OFFSET(0) + MITE_CHOR);
|
||||
}
|
||||
|
||||
void mite_dump_regs(struct mite_struct *mite)
|
||||
{
|
||||
void *addr = 0;
|
||||
unsigned long temp = 0;
|
||||
|
||||
pr_info("mite address is =0x%p\n", mite->mite_io_addr);
|
||||
|
||||
addr = mite->mite_io_addr + MITE_CHOR + CHAN_OFFSET(0);
|
||||
pr_info("mite status[CHOR]at 0x%p =0x%08lx\n", addr, temp = readl(addr));
|
||||
//mite_decode(mite_CHOR_strings,temp);
|
||||
addr = mite->mite_io_addr + MITE_CHCR + CHAN_OFFSET(0);
|
||||
pr_info("mite status[CHCR]at 0x%p =0x%08lx\n", addr, temp = readl(addr));
|
||||
//mite_decode(mite_CHCR_strings,temp);
|
||||
addr = mite->mite_io_addr + MITE_TCR + CHAN_OFFSET(0);
|
||||
pr_info("mite status[TCR] at 0x%p =0x%08x\n", addr, readl(addr));
|
||||
addr = mite->mite_io_addr + MITE_MCR + CHAN_OFFSET(0);
|
||||
pr_info("mite status[MCR] at 0x%p =0x%08lx\n", addr, temp = readl(addr));
|
||||
//mite_decode(mite_MCR_strings,temp);
|
||||
addr = mite->mite_io_addr + MITE_MAR + CHAN_OFFSET(0);
|
||||
pr_info("mite status[MAR] at 0x%p =0x%08x\n", addr, readl(addr));
|
||||
addr = mite->mite_io_addr + MITE_DCR + CHAN_OFFSET(0);
|
||||
pr_info("mite status[DCR] at 0x%p =0x%08lx\n", addr, temp = readl(addr));
|
||||
//mite_decode(mite_CR_strings,temp);
|
||||
addr = mite->mite_io_addr + MITE_DAR + CHAN_OFFSET(0);
|
||||
pr_info("mite status[DAR] at 0x%p =0x%08x\n", addr, readl(addr));
|
||||
addr = mite->mite_io_addr + MITE_LKCR + CHAN_OFFSET(0);
|
||||
pr_info("mite status[LKCR]at 0x%p =0x%08lx\n", addr, temp = readl(addr));
|
||||
//mite_decode(mite_CR_strings,temp);
|
||||
addr = mite->mite_io_addr + MITE_LKAR + CHAN_OFFSET(0);
|
||||
pr_info("mite status[LKAR]at 0x%p =0x%08x\n", addr, readl(addr));
|
||||
|
||||
addr = mite->mite_io_addr + MITE_CHSR + CHAN_OFFSET(0);
|
||||
pr_info("mite status[CHSR]at 0x%p =0x%08lx\n", addr, temp = readl(addr));
|
||||
//mite_decode(mite_CHSR_strings,temp);
|
||||
addr = mite->mite_io_addr + MITE_FCR + CHAN_OFFSET(0);
|
||||
pr_info("mite status[FCR] at 0x%p =0x%08x\n\n", addr, readl(addr));
|
||||
}
|
||||
|
||||
|
@ -34,9 +34,9 @@ struct mite_struct {
|
||||
|
||||
struct pci_dev *pcidev;
|
||||
unsigned long mite_phys_addr;
|
||||
void *mite_io_addr;
|
||||
void __iomem *mite_io_addr;
|
||||
unsigned long daq_phys_addr;
|
||||
void *daq_io_addr;
|
||||
void __iomem *daq_io_addr;
|
||||
|
||||
int DMA_CheckNearEnd;
|
||||
|
||||
@ -61,15 +61,6 @@ int mite_setup(struct mite_struct *mite);
|
||||
void mite_unsetup(struct mite_struct *mite);
|
||||
void mite_list_devices(void);
|
||||
|
||||
int mite_dma_tcr(struct mite_struct *mite);
|
||||
|
||||
void mite_dma_arm(struct mite_struct *mite);
|
||||
void mite_dma_disarm(struct mite_struct *mite);
|
||||
|
||||
void mite_dump_regs(struct mite_struct *mite);
|
||||
void mite_setregs(struct mite_struct *mite, unsigned long ll_start, int chan, int dir);
|
||||
int mite_bytes_transferred(struct mite_struct *mite, int chan);
|
||||
|
||||
#define CHAN_OFFSET(x) (0x100 * (x))
|
||||
|
||||
/* DMA base for chan 0 is 0x500, chan 1 is 0x600 */
|
||||
|
@ -45,10 +45,6 @@ struct tnt4882_priv {
|
||||
unsigned short imr0_bits;
|
||||
unsigned short imr3_bits;
|
||||
unsigned short auxg_bits; // bits written to auxiliary register G
|
||||
void (*io_writeb)(unsigned int value, void *address);
|
||||
void (*io_writew)(unsigned int value, void *address);
|
||||
unsigned int (*io_readb)(void *address);
|
||||
unsigned int (*io_readw)(void *address);
|
||||
};
|
||||
|
||||
// interface functions
|
||||
@ -104,23 +100,23 @@ static const int atgpib_iosize = 32;
|
||||
/* paged io */
|
||||
static inline unsigned int tnt_paged_readb(struct tnt4882_priv *priv, unsigned long offset)
|
||||
{
|
||||
priv->io_writeb(AUX_PAGEIN, priv->nec7210_priv.iobase + AUXMR * priv->nec7210_priv.offset);
|
||||
iowrite8(AUX_PAGEIN, priv->nec7210_priv.mmiobase + AUXMR * priv->nec7210_priv.offset);
|
||||
udelay(1);
|
||||
return priv->io_readb(priv->nec7210_priv.iobase + offset);
|
||||
return ioread8(priv->nec7210_priv.mmiobase + offset);
|
||||
}
|
||||
|
||||
static inline void tnt_paged_writeb(struct tnt4882_priv *priv, unsigned int value,
|
||||
unsigned long offset)
|
||||
{
|
||||
priv->io_writeb(AUX_PAGEIN, priv->nec7210_priv.iobase + AUXMR * priv->nec7210_priv.offset);
|
||||
iowrite8(AUX_PAGEIN, priv->nec7210_priv.mmiobase + AUXMR * priv->nec7210_priv.offset);
|
||||
udelay(1);
|
||||
priv->io_writeb(value, priv->nec7210_priv.iobase + offset);
|
||||
iowrite8(value, priv->nec7210_priv.mmiobase + offset);
|
||||
}
|
||||
|
||||
/* readb/writeb wrappers */
|
||||
static inline unsigned short tnt_readb(struct tnt4882_priv *priv, unsigned long offset)
|
||||
{
|
||||
void *address = priv->nec7210_priv.iobase + offset;
|
||||
void *address = priv->nec7210_priv.mmiobase + offset;
|
||||
unsigned long flags;
|
||||
unsigned short retval;
|
||||
spinlock_t *register_lock = &priv->nec7210_priv.register_page_lock;
|
||||
@ -134,7 +130,7 @@ static inline unsigned short tnt_readb(struct tnt4882_priv *priv, unsigned long
|
||||
switch (priv->nec7210_priv.type) {
|
||||
case TNT4882:
|
||||
case TNT5004:
|
||||
retval = priv->io_readb(address);
|
||||
retval = ioread8(address);
|
||||
break;
|
||||
case NAT4882:
|
||||
retval = tnt_paged_readb(priv, offset - tnt_pagein_offset);
|
||||
@ -149,7 +145,7 @@ static inline unsigned short tnt_readb(struct tnt4882_priv *priv, unsigned long
|
||||
}
|
||||
break;
|
||||
default:
|
||||
retval = priv->io_readb(address);
|
||||
retval = ioread8(address);
|
||||
break;
|
||||
}
|
||||
spin_unlock_irqrestore(register_lock, flags);
|
||||
@ -158,7 +154,7 @@ static inline unsigned short tnt_readb(struct tnt4882_priv *priv, unsigned long
|
||||
|
||||
static inline void tnt_writeb(struct tnt4882_priv *priv, unsigned short value, unsigned long offset)
|
||||
{
|
||||
void *address = priv->nec7210_priv.iobase + offset;
|
||||
void *address = priv->nec7210_priv.mmiobase + offset;
|
||||
unsigned long flags;
|
||||
spinlock_t *register_lock = &priv->nec7210_priv.register_page_lock;
|
||||
|
||||
@ -170,7 +166,7 @@ static inline void tnt_writeb(struct tnt4882_priv *priv, unsigned short value, u
|
||||
switch (priv->nec7210_priv.type) {
|
||||
case TNT4882:
|
||||
case TNT5004:
|
||||
priv->io_writeb(value, address);
|
||||
iowrite8(value, address);
|
||||
break;
|
||||
case NAT4882:
|
||||
tnt_paged_writeb(priv, value, offset - tnt_pagein_offset);
|
||||
@ -183,7 +179,7 @@ static inline void tnt_writeb(struct tnt4882_priv *priv, unsigned short value, u
|
||||
}
|
||||
break;
|
||||
default:
|
||||
priv->io_writeb(value, address);
|
||||
iowrite8(value, address);
|
||||
break;
|
||||
}
|
||||
spin_unlock_irqrestore(register_lock, flags);
|
||||
@ -288,7 +284,7 @@ static int drain_fifo_words(struct tnt4882_priv *tnt_priv, uint8_t *buffer, int
|
||||
while (fifo_word_available(tnt_priv) && count + 2 <= num_bytes) {
|
||||
short word;
|
||||
|
||||
word = tnt_priv->io_readw(nec_priv->iobase + FIFOB);
|
||||
word = ioread16(nec_priv->mmiobase + FIFOB);
|
||||
buffer[count++] = word & 0xff;
|
||||
buffer[count++] = (word >> 8) & 0xff;
|
||||
}
|
||||
@ -573,7 +569,7 @@ static int generic_write(gpib_board_t *board, uint8_t *buffer, size_t length,
|
||||
word = buffer[count++] & 0xff;
|
||||
if (count < length)
|
||||
word |= (buffer[count++] << 8) & 0xff00;
|
||||
tnt_priv->io_writew(word, nec_priv->iobase + FIFOB);
|
||||
iowrite16(word, nec_priv->mmiobase + FIFOB);
|
||||
}
|
||||
// avoid unnecessary HR_NFF interrupts
|
||||
// tnt_priv->imr3_bits |= HR_NFF;
|
||||
@ -1269,10 +1265,6 @@ int ni_pci_attach(gpib_board_t *board, const gpib_board_config_t *config)
|
||||
if (tnt4882_allocate_private(board))
|
||||
return -ENOMEM;
|
||||
tnt_priv = board->private_data;
|
||||
tnt_priv->io_writeb = writeb_wrapper;
|
||||
tnt_priv->io_readb = readb_wrapper;
|
||||
tnt_priv->io_writew = writew_wrapper;
|
||||
tnt_priv->io_readw = readw_wrapper;
|
||||
nec_priv = &tnt_priv->nec7210_priv;
|
||||
nec_priv->type = TNT4882;
|
||||
nec_priv->read_byte = nec7210_locking_iomem_read_byte;
|
||||
@ -1324,7 +1316,7 @@ int ni_pci_attach(gpib_board_t *board, const gpib_board_config_t *config)
|
||||
return retval;
|
||||
}
|
||||
|
||||
nec_priv->iobase = tnt_priv->mite->daq_io_addr;
|
||||
nec_priv->mmiobase = tnt_priv->mite->daq_io_addr;
|
||||
|
||||
// get irq
|
||||
if (request_irq(mite_irq(tnt_priv->mite), tnt4882_interrupt, isr_flags,
|
||||
@ -1359,7 +1351,7 @@ void ni_pci_detach(gpib_board_t *board)
|
||||
if (tnt_priv) {
|
||||
nec_priv = &tnt_priv->nec7210_priv;
|
||||
|
||||
if (nec_priv->iobase)
|
||||
if (nec_priv->mmiobase)
|
||||
tnt4882_board_reset(tnt_priv, board);
|
||||
if (tnt_priv->irq)
|
||||
free_irq(tnt_priv->irq, board);
|
||||
@ -1400,7 +1392,7 @@ static int ni_isa_attach_common(gpib_board_t *board, const gpib_board_config_t *
|
||||
struct tnt4882_priv *tnt_priv;
|
||||
struct nec7210_priv *nec_priv;
|
||||
int isr_flags = 0;
|
||||
void *iobase;
|
||||
u32 iobase;
|
||||
int irq;
|
||||
|
||||
board->status = 0;
|
||||
@ -1408,10 +1400,6 @@ static int ni_isa_attach_common(gpib_board_t *board, const gpib_board_config_t *
|
||||
if (tnt4882_allocate_private(board))
|
||||
return -ENOMEM;
|
||||
tnt_priv = board->private_data;
|
||||
tnt_priv->io_writeb = outb_wrapper;
|
||||
tnt_priv->io_readb = inb_wrapper;
|
||||
tnt_priv->io_writew = outw_wrapper;
|
||||
tnt_priv->io_readw = inw_wrapper;
|
||||
nec_priv = &tnt_priv->nec7210_priv;
|
||||
nec_priv->type = chipset;
|
||||
nec_priv->read_byte = nec7210_locking_ioport_read_byte;
|
||||
@ -1427,18 +1415,20 @@ static int ni_isa_attach_common(gpib_board_t *board, const gpib_board_config_t *
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
tnt_priv->pnp_dev = dev;
|
||||
iobase = (void *)(pnp_port_start(dev, 0));
|
||||
iobase = pnp_port_start(dev, 0);
|
||||
irq = pnp_irq(dev, 0);
|
||||
} else {
|
||||
iobase = config->ibbase;
|
||||
irq = config->ibirq;
|
||||
}
|
||||
// allocate ioports
|
||||
if (!request_region((unsigned long)(iobase), atgpib_iosize, "atgpib")) {
|
||||
if (!request_region(iobase, atgpib_iosize, "atgpib")) {
|
||||
pr_err("tnt4882: failed to allocate ioports\n");
|
||||
return -1;
|
||||
}
|
||||
nec_priv->iobase = iobase;
|
||||
nec_priv->mmiobase = ioport_map(iobase, atgpib_iosize);
|
||||
if (!nec_priv->mmiobase)
|
||||
return -1;
|
||||
|
||||
// get irq
|
||||
if (request_irq(irq, tnt4882_interrupt, isr_flags, "atgpib", board)) {
|
||||
@ -1478,8 +1468,10 @@ void ni_isa_detach(gpib_board_t *board)
|
||||
tnt4882_board_reset(tnt_priv, board);
|
||||
if (tnt_priv->irq)
|
||||
free_irq(tnt_priv->irq, board);
|
||||
if (nec_priv->mmiobase)
|
||||
ioport_unmap(nec_priv->mmiobase);
|
||||
if (nec_priv->iobase)
|
||||
release_region((unsigned long)(nec_priv->iobase), atgpib_iosize);
|
||||
release_region(nec_priv->iobase, atgpib_iosize);
|
||||
if (tnt_priv->pnp_dev)
|
||||
pnp_device_detach(tnt_priv->pnp_dev);
|
||||
}
|
||||
@ -1817,10 +1809,6 @@ int ni_pcmcia_attach(gpib_board_t *board, const gpib_board_config_t *config)
|
||||
if (tnt4882_allocate_private(board))
|
||||
return -ENOMEM;
|
||||
tnt_priv = board->private_data;
|
||||
tnt_priv->io_writeb = outb_wrapper;
|
||||
tnt_priv->io_readb = inb_wrapper;
|
||||
tnt_priv->io_writew = outw_wrapper;
|
||||
tnt_priv->io_readw = inw_wrapper;
|
||||
nec_priv = &tnt_priv->nec7210_priv;
|
||||
nec_priv->type = TNT4882;
|
||||
nec_priv->read_byte = nec7210_locking_ioport_read_byte;
|
||||
@ -1835,7 +1823,10 @@ int ni_pcmcia_attach(gpib_board_t *board, const gpib_board_config_t *config)
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
nec_priv->iobase = (void *)(unsigned long)curr_dev->resource[0]->start;
|
||||
nec_priv->mmiobase = ioport_map(curr_dev->resource[0]->start,
|
||||
resource_size(curr_dev->resource[0]));
|
||||
if (!nec_priv->mmiobase)
|
||||
return -1;
|
||||
|
||||
// get irq
|
||||
if (request_irq(curr_dev->irq, tnt4882_interrupt, isr_flags, "tnt4882", board)) {
|
||||
@ -1860,9 +1851,11 @@ void ni_pcmcia_detach(gpib_board_t *board)
|
||||
nec_priv = &tnt_priv->nec7210_priv;
|
||||
if (tnt_priv->irq)
|
||||
free_irq(tnt_priv->irq, board);
|
||||
if (nec_priv->mmiobase)
|
||||
ioport_unmap(nec_priv->mmiobase);
|
||||
if (nec_priv->iobase) {
|
||||
tnt4882_board_reset(tnt_priv, board);
|
||||
release_region((unsigned long)nec_priv->iobase, pcmcia_gpib_iosize);
|
||||
release_region(nec_priv->iobase, pcmcia_gpib_iosize);
|
||||
}
|
||||
}
|
||||
tnt4882_free_private(board);
|
||||
|
Loading…
x
Reference in New Issue
Block a user