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clk: at91: sama7g5: remove all kernel-doc & kernel-doc warnings

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Remove all "/**" kernel-doc markers from sama7g5.c since they are
all internal to this driver source file only.
This eliminates 14 warnings that were reported by the kernel test robot.

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Reported-by: kernel test robot <lkp@intel.com>
Cc: Claudiu Beznea <claudiu.beznea@microchip.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: linux-clk@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Link: https://lore.kernel.org/r/20210819223237.20115-1-rdunlap@infradead.org
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Randy Dunlap 2021-08-19 15:32:37 -07:00 committed by Stephen Boyd
parent 0cbc0eb14e
commit a3ef91f501
1 changed files with 7 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
drivers/clk/at91/sama7g5.c
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@ -35,7 +35,7 @@ static DEFINE_SPINLOCK(pmc_pll_lock);
static DEFINE_SPINLOCK(pmc_mck0_lock);
static DEFINE_SPINLOCK(pmc_mckX_lock);
/**
/*
* PLL clocks identifiers
* @PLL_ID_CPU: CPU PLL identifier
* @PLL_ID_SYS: System PLL identifier
@ -56,7 +56,7 @@ enum pll_ids {
PLL_ID_MAX,
};
/**
/*
* PLL type identifiers
* @PLL_TYPE_FRAC: fractional PLL identifier
* @PLL_TYPE_DIV: divider PLL identifier
@ -118,7 +118,7 @@ static const struct clk_pll_characteristics pll_characteristics = {
.output = pll_outputs,
};
/**
/*
* PLL clocks description
* @n: clock name
* @p: clock parent
@ -285,7 +285,7 @@ static const struct {
},
};
/**
/*
* Master clock (MCK[1..4]) description
* @n: clock name
* @ep: extra parents names array
@ -337,7 +337,7 @@ static const struct {
.c = 1, },
};
/**
/*
* System clock description
* @n: clock name
* @p: clock parent name
@ -361,7 +361,7 @@ static const struct {
/* Mux table for programmable clocks. */
static u32 sama7g5_prog_mux_table[] = { 0, 1, 2, 5, 6, 7, 8, 9, 10, };
/**
/*
* Peripheral clock description
* @n: clock name
* @p: clock parent name
@ -449,7 +449,7 @@ static const struct {
{ .n = "uhphs_clk", .p = "mck1", .id = 106, },
};
/**
/*
* Generic clock description
* @n: clock name
* @pp: PLL parents