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soc: mediatek: cmdq: add polling function
add polling function in cmdq helper functions Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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@ -10,6 +10,7 @@
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#include <linux/soc/mediatek/mtk-cmdq.h>
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#define CMDQ_WRITE_ENABLE_MASK BIT(0)
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#define CMDQ_POLL_ENABLE_MASK BIT(0)
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#define CMDQ_EOC_IRQ_EN BIT(0)
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#define CMDQ_EOC_CMD ((u64)((CMDQ_CODE_EOC << CMDQ_OP_CODE_SHIFT)) \
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<< 32 | CMDQ_EOC_IRQ_EN)
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@ -214,6 +215,41 @@ int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event)
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}
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EXPORT_SYMBOL(cmdq_pkt_clear_event);
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int cmdq_pkt_poll(struct cmdq_pkt *pkt, u8 subsys,
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u16 offset, u32 value)
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{
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struct cmdq_instruction inst = { {0} };
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int err;
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inst.op = CMDQ_CODE_POLL;
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inst.value = value;
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inst.offset = offset;
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inst.subsys = subsys;
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err = cmdq_pkt_append_command(pkt, inst);
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return err;
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}
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EXPORT_SYMBOL(cmdq_pkt_poll);
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int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys,
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u16 offset, u32 value, u32 mask)
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{
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struct cmdq_instruction inst = { {0} };
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int err;
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inst.op = CMDQ_CODE_MASK;
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inst.mask = ~mask;
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err = cmdq_pkt_append_command(pkt, inst);
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if (err < 0)
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return err;
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offset = offset | CMDQ_POLL_ENABLE_MASK;
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err = cmdq_pkt_poll(pkt, subsys, offset, value);
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return err;
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}
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EXPORT_SYMBOL(cmdq_pkt_poll_mask);
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static int cmdq_pkt_finalize(struct cmdq_pkt *pkt)
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{
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struct cmdq_instruction inst = { {0} };
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@ -55,6 +55,7 @@
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enum cmdq_code {
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CMDQ_CODE_MASK = 0x02,
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CMDQ_CODE_WRITE = 0x04,
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CMDQ_CODE_POLL = 0x08,
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CMDQ_CODE_JUMP = 0x10,
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CMDQ_CODE_WFE = 0x20,
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CMDQ_CODE_EOC = 0x40,
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@ -99,6 +99,38 @@ int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event);
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*/
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int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event);
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/**
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* cmdq_pkt_poll() - Append polling command to the CMDQ packet, ask GCE to
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* execute an instruction that wait for a specified
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* hardware register to check for the value w/o mask.
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* All GCE hardware threads will be blocked by this
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* instruction.
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* @pkt: the CMDQ packet
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* @subsys: the CMDQ sub system code
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* @offset: register offset from CMDQ sub system
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* @value: the specified target register value
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*
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* Return: 0 for success; else the error code is returned
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*/
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int cmdq_pkt_poll(struct cmdq_pkt *pkt, u8 subsys,
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u16 offset, u32 value);
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/**
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* cmdq_pkt_poll_mask() - Append polling command to the CMDQ packet, ask GCE to
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* execute an instruction that wait for a specified
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* hardware register to check for the value w/ mask.
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* All GCE hardware threads will be blocked by this
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* instruction.
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* @pkt: the CMDQ packet
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* @subsys: the CMDQ sub system code
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* @offset: register offset from CMDQ sub system
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* @value: the specified target register value
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* @mask: the specified target register mask
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*
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* Return: 0 for success; else the error code is returned
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*/
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int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys,
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u16 offset, u32 value, u32 mask);
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/**
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* cmdq_pkt_flush_async() - trigger CMDQ to asynchronously execute the CMDQ
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* packet and call back at the end of done packet
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