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MIPS: Fix delay loops which may be removed by GCC.
GCC 4.1 and newer remove empty loops. This becomes a problem when delay loops get removed. Fixed by rewriting to user the proper Linux interface for such delays. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Reported-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Acked-by: John Crispin <blogic@openwrt.org>
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@ -11,6 +11,7 @@
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* by the Free Software Foundation.
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* by the Free Software Foundation.
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*/
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*/
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#include <linux/delay.h>
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#include <linux/types.h>
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/pci.h>
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#include <linux/io.h>
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#include <linux/io.h>
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@ -232,8 +233,7 @@ static int rt288x_pci_probe(struct platform_device *pdev)
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ioport_resource.end = RT2880_PCI_IO_BASE + RT2880_PCI_IO_SIZE - 1;
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ioport_resource.end = RT2880_PCI_IO_BASE + RT2880_PCI_IO_SIZE - 1;
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rt2880_pci_reg_write(0, RT2880_PCI_REG_PCICFG_ADDR);
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rt2880_pci_reg_write(0, RT2880_PCI_REG_PCICFG_ADDR);
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for (i = 0; i < 0xfffff; i++)
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udelay(1);
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;
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rt2880_pci_reg_write(0x79, RT2880_PCI_REG_ARBCTL);
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rt2880_pci_reg_write(0x79, RT2880_PCI_REG_ARBCTL);
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rt2880_pci_reg_write(0x07FF0001, RT2880_PCI_REG_BAR0SETUP_ADDR);
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rt2880_pci_reg_write(0x07FF0001, RT2880_PCI_REG_BAR0SETUP_ADDR);
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@ -10,6 +10,8 @@
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* option) any later version.
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* option) any later version.
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*/
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*/
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#include <linux/delay.h>
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#include <asm/bootinfo.h>
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#include <asm/bootinfo.h>
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#include <asm/cacheflush.h>
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#include <asm/cacheflush.h>
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#include <asm/idle.h>
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#include <asm/idle.h>
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@ -77,7 +79,7 @@ void msp7120_reset(void)
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*/
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*/
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/* Wait a bit for the DDRC to settle */
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/* Wait a bit for the DDRC to settle */
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for (i = 0; i < 100000000; i++);
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mdelay(125);
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#if defined(CONFIG_PMC_MSP7120_GW)
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#if defined(CONFIG_PMC_MSP7120_GW)
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/*
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/*
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@ -3,6 +3,8 @@
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*
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*
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* Reset a SNI machine.
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* Reset a SNI machine.
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*/
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*/
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#include <linux/delay.h>
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#include <asm/io.h>
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#include <asm/io.h>
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#include <asm/reboot.h>
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#include <asm/reboot.h>
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#include <asm/sni.h>
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#include <asm/sni.h>
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@ -32,9 +34,9 @@ void sni_machine_restart(char *command)
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for (;;) {
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for (;;) {
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for (i = 0; i < 100; i++) {
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for (i = 0; i < 100; i++) {
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kb_wait();
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kb_wait();
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for (j = 0; j < 100000 ; j++)
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udelay(50);
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/* nothing */;
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outb_p(0xfe, 0x64); /* pulse reset low */
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outb_p(0xfe, 0x64); /* pulse reset low */
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udelay(50);
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}
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}
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}
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}
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}
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}
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