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arm64: sysreg: Add layout for ID_AA64MMFR4_EL1
ARMv9.5 has infroduced ID_AA64MMFR4_EL1 with a bunch of new features. Add the corresponding layout. This is extracted from the public ARM SysReg_xml_A_profile-2023-09 delivery, timestamped d55f5af8e09052abe92a02adf820deea2eaed717. Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Miguel Luis <miguel.luis@oracle.com> Link: https://lore.kernel.org/r/20240122181344.258974-5-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
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@ -1791,6 +1791,43 @@ UnsignedEnum 3:0 TCRX
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EndEnum
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EndEnum
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EndSysreg
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EndSysreg
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Sysreg ID_AA64MMFR4_EL1 3 0 0 7 4
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Res0 63:40
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UnsignedEnum 39:36 E3DSE
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0b0000 NI
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0b0001 IMP
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EndEnum
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Res0 35:28
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SignedEnum 27:24 E2H0
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0b0000 IMP
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0b1110 NI_NV1
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0b1111 NI
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EndEnum
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UnsignedEnum 23:20 NV_frac
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0b0000 NV_NV2
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0b0001 NV2_ONLY
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EndEnum
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UnsignedEnum 19:16 FGWTE3
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0b0000 NI
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0b0001 IMP
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EndEnum
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UnsignedEnum 15:12 HACDBS
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0b0000 NI
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0b0001 IMP
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EndEnum
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UnsignedEnum 11:8 ASID2
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0b0000 NI
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0b0001 IMP
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EndEnum
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SignedEnum 7:4 EIESB
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0b0000 NI
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0b0001 ToEL3
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0b0010 ToELx
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0b1111 ANY
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EndEnum
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Res0 3:0
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EndSysreg
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Sysreg SCTLR_EL1 3 0 1 0 0
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Sysreg SCTLR_EL1 3 0 1 0 0
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Field 63 TIDCP
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Field 63 TIDCP
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Field 62 SPINTMASK
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Field 62 SPINTMASK
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