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synced 2025-01-12 08:48:48 +00:00
[PATCH] skge: fifo control register access fix
The code to clear fifo errors was incorrect and sending garbage to the external phy. Removed the no longer used inline's funcs. Signed-off-by: Stephen Hemminger <shemminger@osdl.org> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
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@ -1818,8 +1818,8 @@ static void yukon_stop(struct skge_port *skge)
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gma_read16(hw, port, GM_GP_CTRL);
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gma_read16(hw, port, GM_GP_CTRL);
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/* set GPHY Control reset */
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/* set GPHY Control reset */
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gma_write32(hw, port, GPHY_CTRL, GPC_RST_SET);
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skge_write32(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
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gma_write32(hw, port, GMAC_CTRL, GMC_RST_SET);
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skge_write32(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET);
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}
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}
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static void yukon_get_stats(struct skge_port *skge, u64 *data)
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static void yukon_get_stats(struct skge_port *skge, u64 *data)
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@ -1850,11 +1850,12 @@ static void yukon_mac_intr(struct skge_hw *hw, int port)
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if (status & GM_IS_RX_FF_OR) {
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if (status & GM_IS_RX_FF_OR) {
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++skge->net_stats.rx_fifo_errors;
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++skge->net_stats.rx_fifo_errors;
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gma_write8(hw, port, RX_GMF_CTRL_T, GMF_CLI_RX_FO);
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skge_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_CLI_RX_FO);
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}
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}
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if (status & GM_IS_TX_FF_UR) {
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if (status & GM_IS_TX_FF_UR) {
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++skge->net_stats.tx_fifo_errors;
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++skge->net_stats.tx_fifo_errors;
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gma_write8(hw, port, TX_GMF_CTRL_T, GMF_CLI_TX_FU);
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skge_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_FU);
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}
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}
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}
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}
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@ -1898,12 +1899,14 @@ static void yukon_link_down(struct skge_port *skge)
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{
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{
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struct skge_hw *hw = skge->hw;
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struct skge_hw *hw = skge->hw;
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int port = skge->port;
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int port = skge->port;
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u16 ctrl;
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pr_debug("yukon_link_down\n");
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pr_debug("yukon_link_down\n");
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gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0);
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gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0);
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gm_phy_write(hw, port, GM_GP_CTRL,
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gm_phy_read(hw, port, GM_GP_CTRL)
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ctrl = gma_read16(hw, port, GM_GP_CTRL);
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& ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA));
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ctrl &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);
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gma_write16(hw, port, GM_GP_CTRL, ctrl);
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if (skge->flow_control == FLOW_MODE_REM_SEND) {
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if (skge->flow_control == FLOW_MODE_REM_SEND) {
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/* restore Asymmetric Pause bit */
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/* restore Asymmetric Pause bit */
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@ -2606,17 +2606,6 @@ static inline void gma_write16(const struct skge_hw *hw, int port, int r, u16 v)
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skge_write16(hw, SK_GMAC_REG(port,r), v);
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skge_write16(hw, SK_GMAC_REG(port,r), v);
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}
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}
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static inline void gma_write32(const struct skge_hw *hw, int port, int r, u32 v)
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{
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skge_write16(hw, SK_GMAC_REG(port, r), (u16) v);
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skge_write32(hw, SK_GMAC_REG(port, r+4), (u16)(v >> 16));
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}
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static inline void gma_write8(const struct skge_hw *hw, int port, int r, u8 v)
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{
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skge_write8(hw, SK_GMAC_REG(port,r), v);
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}
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static inline void gma_set_addr(struct skge_hw *hw, int port, int reg,
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static inline void gma_set_addr(struct skge_hw *hw, int port, int reg,
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const u8 *addr)
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const u8 *addr)
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{
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{
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