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locking/atomic: Fix atomic64_relaxed() bits
We should only expand the atomic64 relaxed bits once we've included all relevant headers. So move it down until after we potentially include asm-generic/atomic64.h. In practise this will not have made a difference so far, since the generic bits will not define _relaxed versions. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Davidlohr Bueso <dave@stgolabs.net> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Will Deacon <will.deacon@arm.com> Cc: linux-arch@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Peter Zijlstra
Ingo Molnar
parent
6dc25876cd
commit
e12133324b
@ -211,159 +211,6 @@
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#endif
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#endif /* atomic_cmpxchg_relaxed */
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#ifndef atomic64_read_acquire
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#define atomic64_read_acquire(v) smp_load_acquire(&(v)->counter)
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#endif
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#ifndef atomic64_set_release
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#define atomic64_set_release(v, i) smp_store_release(&(v)->counter, (i))
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#endif
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/* atomic64_add_return_relaxed */
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#ifndef atomic64_add_return_relaxed
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#define atomic64_add_return_relaxed atomic64_add_return
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#define atomic64_add_return_acquire atomic64_add_return
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#define atomic64_add_return_release atomic64_add_return
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#else /* atomic64_add_return_relaxed */
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#ifndef atomic64_add_return_acquire
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#define atomic64_add_return_acquire(...) \
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__atomic_op_acquire(atomic64_add_return, __VA_ARGS__)
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#endif
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#ifndef atomic64_add_return_release
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#define atomic64_add_return_release(...) \
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__atomic_op_release(atomic64_add_return, __VA_ARGS__)
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#endif
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#ifndef atomic64_add_return
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#define atomic64_add_return(...) \
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__atomic_op_fence(atomic64_add_return, __VA_ARGS__)
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#endif
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#endif /* atomic64_add_return_relaxed */
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/* atomic64_inc_return_relaxed */
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#ifndef atomic64_inc_return_relaxed
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#define atomic64_inc_return_relaxed atomic64_inc_return
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#define atomic64_inc_return_acquire atomic64_inc_return
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#define atomic64_inc_return_release atomic64_inc_return
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#else /* atomic64_inc_return_relaxed */
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#ifndef atomic64_inc_return_acquire
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#define atomic64_inc_return_acquire(...) \
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__atomic_op_acquire(atomic64_inc_return, __VA_ARGS__)
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#endif
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#ifndef atomic64_inc_return_release
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#define atomic64_inc_return_release(...) \
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__atomic_op_release(atomic64_inc_return, __VA_ARGS__)
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#endif
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#ifndef atomic64_inc_return
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#define atomic64_inc_return(...) \
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__atomic_op_fence(atomic64_inc_return, __VA_ARGS__)
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#endif
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#endif /* atomic64_inc_return_relaxed */
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/* atomic64_sub_return_relaxed */
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#ifndef atomic64_sub_return_relaxed
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#define atomic64_sub_return_relaxed atomic64_sub_return
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#define atomic64_sub_return_acquire atomic64_sub_return
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#define atomic64_sub_return_release atomic64_sub_return
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#else /* atomic64_sub_return_relaxed */
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#ifndef atomic64_sub_return_acquire
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#define atomic64_sub_return_acquire(...) \
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__atomic_op_acquire(atomic64_sub_return, __VA_ARGS__)
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#endif
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#ifndef atomic64_sub_return_release
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#define atomic64_sub_return_release(...) \
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__atomic_op_release(atomic64_sub_return, __VA_ARGS__)
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#endif
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#ifndef atomic64_sub_return
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#define atomic64_sub_return(...) \
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__atomic_op_fence(atomic64_sub_return, __VA_ARGS__)
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#endif
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#endif /* atomic64_sub_return_relaxed */
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/* atomic64_dec_return_relaxed */
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#ifndef atomic64_dec_return_relaxed
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#define atomic64_dec_return_relaxed atomic64_dec_return
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#define atomic64_dec_return_acquire atomic64_dec_return
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#define atomic64_dec_return_release atomic64_dec_return
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#else /* atomic64_dec_return_relaxed */
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#ifndef atomic64_dec_return_acquire
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#define atomic64_dec_return_acquire(...) \
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__atomic_op_acquire(atomic64_dec_return, __VA_ARGS__)
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#endif
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#ifndef atomic64_dec_return_release
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#define atomic64_dec_return_release(...) \
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__atomic_op_release(atomic64_dec_return, __VA_ARGS__)
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#endif
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#ifndef atomic64_dec_return
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#define atomic64_dec_return(...) \
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__atomic_op_fence(atomic64_dec_return, __VA_ARGS__)
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#endif
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#endif /* atomic64_dec_return_relaxed */
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/* atomic64_xchg_relaxed */
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#ifndef atomic64_xchg_relaxed
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#define atomic64_xchg_relaxed atomic64_xchg
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#define atomic64_xchg_acquire atomic64_xchg
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#define atomic64_xchg_release atomic64_xchg
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#else /* atomic64_xchg_relaxed */
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#ifndef atomic64_xchg_acquire
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#define atomic64_xchg_acquire(...) \
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__atomic_op_acquire(atomic64_xchg, __VA_ARGS__)
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#endif
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#ifndef atomic64_xchg_release
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#define atomic64_xchg_release(...) \
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__atomic_op_release(atomic64_xchg, __VA_ARGS__)
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#endif
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#ifndef atomic64_xchg
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#define atomic64_xchg(...) \
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__atomic_op_fence(atomic64_xchg, __VA_ARGS__)
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#endif
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#endif /* atomic64_xchg_relaxed */
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/* atomic64_cmpxchg_relaxed */
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#ifndef atomic64_cmpxchg_relaxed
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#define atomic64_cmpxchg_relaxed atomic64_cmpxchg
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#define atomic64_cmpxchg_acquire atomic64_cmpxchg
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#define atomic64_cmpxchg_release atomic64_cmpxchg
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#else /* atomic64_cmpxchg_relaxed */
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#ifndef atomic64_cmpxchg_acquire
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#define atomic64_cmpxchg_acquire(...) \
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__atomic_op_acquire(atomic64_cmpxchg, __VA_ARGS__)
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#endif
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#ifndef atomic64_cmpxchg_release
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#define atomic64_cmpxchg_release(...) \
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__atomic_op_release(atomic64_cmpxchg, __VA_ARGS__)
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#endif
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#ifndef atomic64_cmpxchg
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#define atomic64_cmpxchg(...) \
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__atomic_op_fence(atomic64_cmpxchg, __VA_ARGS__)
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#endif
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#endif /* atomic64_cmpxchg_relaxed */
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/* cmpxchg_relaxed */
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#ifndef cmpxchg_relaxed
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#define cmpxchg_relaxed cmpxchg
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@ -583,6 +430,159 @@ static inline int atomic_fetch_or(int mask, atomic_t *p)
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#include <asm-generic/atomic64.h>
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#endif
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#ifndef atomic64_read_acquire
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#define atomic64_read_acquire(v) smp_load_acquire(&(v)->counter)
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#endif
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#ifndef atomic64_set_release
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#define atomic64_set_release(v, i) smp_store_release(&(v)->counter, (i))
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#endif
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/* atomic64_add_return_relaxed */
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#ifndef atomic64_add_return_relaxed
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#define atomic64_add_return_relaxed atomic64_add_return
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#define atomic64_add_return_acquire atomic64_add_return
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#define atomic64_add_return_release atomic64_add_return
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#else /* atomic64_add_return_relaxed */
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#ifndef atomic64_add_return_acquire
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#define atomic64_add_return_acquire(...) \
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__atomic_op_acquire(atomic64_add_return, __VA_ARGS__)
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#endif
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#ifndef atomic64_add_return_release
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#define atomic64_add_return_release(...) \
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__atomic_op_release(atomic64_add_return, __VA_ARGS__)
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#endif
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#ifndef atomic64_add_return
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#define atomic64_add_return(...) \
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__atomic_op_fence(atomic64_add_return, __VA_ARGS__)
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#endif
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#endif /* atomic64_add_return_relaxed */
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/* atomic64_inc_return_relaxed */
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#ifndef atomic64_inc_return_relaxed
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#define atomic64_inc_return_relaxed atomic64_inc_return
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#define atomic64_inc_return_acquire atomic64_inc_return
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#define atomic64_inc_return_release atomic64_inc_return
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#else /* atomic64_inc_return_relaxed */
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#ifndef atomic64_inc_return_acquire
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#define atomic64_inc_return_acquire(...) \
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__atomic_op_acquire(atomic64_inc_return, __VA_ARGS__)
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#endif
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#ifndef atomic64_inc_return_release
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#define atomic64_inc_return_release(...) \
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__atomic_op_release(atomic64_inc_return, __VA_ARGS__)
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#endif
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#ifndef atomic64_inc_return
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#define atomic64_inc_return(...) \
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__atomic_op_fence(atomic64_inc_return, __VA_ARGS__)
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#endif
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#endif /* atomic64_inc_return_relaxed */
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/* atomic64_sub_return_relaxed */
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#ifndef atomic64_sub_return_relaxed
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#define atomic64_sub_return_relaxed atomic64_sub_return
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#define atomic64_sub_return_acquire atomic64_sub_return
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#define atomic64_sub_return_release atomic64_sub_return
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#else /* atomic64_sub_return_relaxed */
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#ifndef atomic64_sub_return_acquire
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#define atomic64_sub_return_acquire(...) \
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__atomic_op_acquire(atomic64_sub_return, __VA_ARGS__)
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#endif
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#ifndef atomic64_sub_return_release
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#define atomic64_sub_return_release(...) \
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__atomic_op_release(atomic64_sub_return, __VA_ARGS__)
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#endif
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#ifndef atomic64_sub_return
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#define atomic64_sub_return(...) \
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__atomic_op_fence(atomic64_sub_return, __VA_ARGS__)
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#endif
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#endif /* atomic64_sub_return_relaxed */
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/* atomic64_dec_return_relaxed */
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#ifndef atomic64_dec_return_relaxed
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#define atomic64_dec_return_relaxed atomic64_dec_return
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#define atomic64_dec_return_acquire atomic64_dec_return
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#define atomic64_dec_return_release atomic64_dec_return
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#else /* atomic64_dec_return_relaxed */
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#ifndef atomic64_dec_return_acquire
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#define atomic64_dec_return_acquire(...) \
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__atomic_op_acquire(atomic64_dec_return, __VA_ARGS__)
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#endif
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#ifndef atomic64_dec_return_release
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#define atomic64_dec_return_release(...) \
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__atomic_op_release(atomic64_dec_return, __VA_ARGS__)
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#endif
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#ifndef atomic64_dec_return
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#define atomic64_dec_return(...) \
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__atomic_op_fence(atomic64_dec_return, __VA_ARGS__)
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#endif
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#endif /* atomic64_dec_return_relaxed */
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/* atomic64_xchg_relaxed */
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#ifndef atomic64_xchg_relaxed
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#define atomic64_xchg_relaxed atomic64_xchg
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#define atomic64_xchg_acquire atomic64_xchg
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#define atomic64_xchg_release atomic64_xchg
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#else /* atomic64_xchg_relaxed */
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#ifndef atomic64_xchg_acquire
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#define atomic64_xchg_acquire(...) \
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__atomic_op_acquire(atomic64_xchg, __VA_ARGS__)
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#endif
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#ifndef atomic64_xchg_release
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#define atomic64_xchg_release(...) \
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__atomic_op_release(atomic64_xchg, __VA_ARGS__)
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#endif
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#ifndef atomic64_xchg
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#define atomic64_xchg(...) \
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__atomic_op_fence(atomic64_xchg, __VA_ARGS__)
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#endif
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#endif /* atomic64_xchg_relaxed */
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/* atomic64_cmpxchg_relaxed */
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#ifndef atomic64_cmpxchg_relaxed
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#define atomic64_cmpxchg_relaxed atomic64_cmpxchg
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#define atomic64_cmpxchg_acquire atomic64_cmpxchg
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#define atomic64_cmpxchg_release atomic64_cmpxchg
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#else /* atomic64_cmpxchg_relaxed */
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#ifndef atomic64_cmpxchg_acquire
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#define atomic64_cmpxchg_acquire(...) \
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__atomic_op_acquire(atomic64_cmpxchg, __VA_ARGS__)
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#endif
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#ifndef atomic64_cmpxchg_release
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#define atomic64_cmpxchg_release(...) \
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__atomic_op_release(atomic64_cmpxchg, __VA_ARGS__)
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#endif
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#ifndef atomic64_cmpxchg
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#define atomic64_cmpxchg(...) \
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__atomic_op_fence(atomic64_cmpxchg, __VA_ARGS__)
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#endif
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#endif /* atomic64_cmpxchg_relaxed */
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#ifndef atomic64_andnot
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static inline void atomic64_andnot(long long i, atomic64_t *v)
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{
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