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ARM: omap2: remove APLL control
These functions have no callers and can just be removed. Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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@ -95,103 +95,6 @@ void omap2xxx_cm_set_dpll_auto_low_power_stop(void)
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_omap2xxx_set_dpll_autoidle(DPLL_AUTOIDLE_DISABLE);
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}
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/*
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* APLL control
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*/
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static void _omap2xxx_set_apll_autoidle(u8 m, u32 mask)
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{
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u32 v;
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v = omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE);
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v &= ~mask;
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v |= m << __ffs(mask);
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omap2_cm_write_mod_reg(v, PLL_MOD, CM_AUTOIDLE);
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}
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void omap2xxx_cm_set_apll54_disable_autoidle(void)
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{
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_omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP,
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OMAP24XX_AUTO_54M_MASK);
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}
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void omap2xxx_cm_set_apll54_auto_low_power_stop(void)
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{
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_omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_DISABLE,
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OMAP24XX_AUTO_54M_MASK);
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}
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void omap2xxx_cm_set_apll96_disable_autoidle(void)
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{
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_omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_LOW_POWER_STOP,
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OMAP24XX_AUTO_96M_MASK);
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}
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void omap2xxx_cm_set_apll96_auto_low_power_stop(void)
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{
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_omap2xxx_set_apll_autoidle(OMAP2XXX_APLL_AUTOIDLE_DISABLE,
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OMAP24XX_AUTO_96M_MASK);
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}
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/* Enable an APLL if off */
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static int _omap2xxx_apll_enable(u8 enable_bit, u8 status_bit)
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{
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u32 v, m;
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m = EN_APLL_LOCKED << enable_bit;
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v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
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if (v & m)
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return 0; /* apll already enabled */
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v |= m;
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omap2_cm_write_mod_reg(v, PLL_MOD, CM_CLKEN);
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omap2xxx_cm_wait_module_ready(0, PLL_MOD, 1, status_bit);
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/*
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* REVISIT: Should we return an error code if
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* omap2xxx_cm_wait_module_ready() fails?
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*/
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return 0;
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}
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/* Stop APLL */
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static void _omap2xxx_apll_disable(u8 enable_bit)
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{
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u32 v;
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v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN);
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v &= ~(EN_APLL_LOCKED << enable_bit);
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omap2_cm_write_mod_reg(v, PLL_MOD, CM_CLKEN);
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}
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/* Enable an APLL if off */
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int omap2xxx_cm_apll54_enable(void)
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{
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return _omap2xxx_apll_enable(OMAP24XX_EN_54M_PLL_SHIFT,
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OMAP24XX_ST_54M_APLL_SHIFT);
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}
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/* Enable an APLL if off */
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int omap2xxx_cm_apll96_enable(void)
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{
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return _omap2xxx_apll_enable(OMAP24XX_EN_96M_PLL_SHIFT,
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OMAP24XX_ST_96M_APLL_SHIFT);
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}
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/* Stop APLL */
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void omap2xxx_cm_apll54_disable(void)
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{
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_omap2xxx_apll_disable(OMAP24XX_EN_54M_PLL_SHIFT);
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}
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/* Stop APLL */
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void omap2xxx_cm_apll96_disable(void)
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{
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_omap2xxx_apll_disable(OMAP24XX_EN_96M_PLL_SHIFT);
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}
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/**
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* omap2xxx_cm_split_idlest_reg - split CM_IDLEST reg addr into its components
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* @idlest_reg: CM_IDLEST* virtual address
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@ -46,11 +46,6 @@
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extern void omap2xxx_cm_set_dpll_disable_autoidle(void);
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extern void omap2xxx_cm_set_dpll_auto_low_power_stop(void);
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extern void omap2xxx_cm_set_apll54_disable_autoidle(void);
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extern void omap2xxx_cm_set_apll54_auto_low_power_stop(void);
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extern void omap2xxx_cm_set_apll96_disable_autoidle(void);
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extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void);
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int omap2xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id,
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u8 idlest_shift);
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extern int omap2xxx_cm_fclks_active(void);
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@ -93,11 +93,6 @@ static inline u32 omap2_cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
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return omap2_cm_rmw_mod_reg_bits(bits, 0x0, module, idx);
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}
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extern int omap2xxx_cm_apll54_enable(void);
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extern void omap2xxx_cm_apll54_disable(void);
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extern int omap2xxx_cm_apll96_enable(void);
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extern void omap2xxx_cm_apll96_disable(void);
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#endif
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/* CM register bits shared between 24XX and 3430 */
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