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dt-bindings: mt7621-gpio: convert bindings to YAML format
Convert the mt7621-gpio device tree bindings to the new YAML format. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201207081151.7489-1-sergio.paracuellos@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Mediatek MT7621 SoC GPIO controller bindings
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The IP core used inside these SoCs has 3 banks of 32 GPIOs each.
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The registers of all the banks are interwoven inside one single IO range.
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We load one GPIO controller instance per bank. Also the GPIO controller can receive
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interrupts on any of the GPIOs, either edge or level. It then interrupts the CPU
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using GIC INT12.
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Required properties for the top level node:
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- #gpio-cells : Should be two. The first cell is the GPIO pin number and the
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second cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>.
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Only the GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
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- #interrupt-cells : Specifies the number of cells needed to encode an
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interrupt. Should be 2. The first cell defines the interrupt number,
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the second encodes the trigger flags encoded as described in
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Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
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- compatible:
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- "mediatek,mt7621-gpio" for Mediatek controllers
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- reg : Physical base address and length of the controller's registers
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- interrupt-parent : phandle of the parent interrupt controller.
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- interrupts : Interrupt specifier for the controllers interrupt.
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- interrupt-controller : Mark the device node as an interrupt controller.
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- gpio-controller : Marks the device node as a GPIO controller.
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Example:
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gpio@600 {
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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compatible = "mediatek,mt7621-gpio";
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gpio-controller;
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interrupt-controller;
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reg = <0x600 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SHARED 12 IRQ_TYPE_LEVEL_HIGH>;
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};
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/gpio/mediatek,mt7621-gpio.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Mediatek MT7621 SoC GPIO controller
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maintainers:
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- Sergio Paracuellos <sergio.paracuellos@gmail.com>
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description: |
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The IP core used inside these SoCs has 3 banks of 32 GPIOs each.
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The registers of all the banks are interwoven inside one single IO range.
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We load one GPIO controller instance per bank. Also the GPIO controller can receive
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interrupts on any of the GPIOs, either edge or level. It then interrupts the CPU
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using GIC INT12.
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properties:
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$nodename:
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pattern: "^gpio@[0-9a-f]+$"
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compatible:
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const: mediatek,mt7621-gpio
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reg:
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maxItems: 1
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"#gpio-cells":
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const: 2
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gpio-controller: true
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gpio-ranges: true
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interrupt-controller: true
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"#interrupt-cells":
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const: 2
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interrupts:
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maxItems: 1
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required:
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- compatible
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- reg
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- "#gpio-cells"
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- gpio-controller
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- gpio-ranges
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- interrupt-controller
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- "#interrupt-cells"
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- interrupts
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/mips-gic.h>
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gpio@600 {
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compatible = "mediatek,mt7621-gpio";
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reg = <0x600 0x100>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 0 95>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SHARED 12 IRQ_TYPE_LEVEL_HIGH>;
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};
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...
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