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ARM: OMAP5: Make L4SEC clock domain SWSUP only

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Commit c2ce5fb3f3 ('ARM: OMAP: DRA7xx: Make L4SEC clock domain SWSUP
only') made DRA7 SoC L4SEC clock domain SWSUP only because of power
state transition issues detected with HWSUP mode. Based on
experimentation similar issue exists on OMAP5, so do the same change
for OMAP5 also.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Tero Kristo 2020-04-29 17:30:02 +03:00 committed by Tony Lindgren
parent f18e314a6b
commit e88ba436e5
1 changed files with 1 additions and 1 deletions
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arch/arm/mach-omap2/clockdomains54xx_data.c
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@ -170,7 +170,7 @@ static struct clockdomain l4sec_54xx_clkdm = {
.dep_bit = OMAP54XX_L4SEC_STATDEP_SHIFT,
.wkdep_srcs = l4sec_wkup_sleep_deps,
.sleepdep_srcs = l4sec_wkup_sleep_deps,
.flags = CLKDM_CAN_HWSUP_SWSUP,
.flags = CLKDM_CAN_SWSUP,
};
static struct clockdomain iva_54xx_clkdm = {