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5af3e3876d
Many devices send event notifications for the IO queues,
such as tx and rx queues, through event queues.
Enable a privileged owner, such as a hypervisor PF, to set the number
of IO event queues for the VF and SF during the provisioning stage.
example:
Get maximum IO event queues of the VF device::
$ devlink port show pci/0000:06:00.0/2
pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1
function:
hw_addr 00:00:00:00:00:00 ipsec_packet disabled max_io_eqs 10
Set maximum IO event queues of the VF device::
$ devlink port function set pci/0000:06:00.0/2 max_io_eqs 32
$ devlink port show pci/0000:06:00.0/2
pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1
function:
hw_addr 00:00:00:00:00:00 ipsec_packet disabled max_io_eqs 32
Reviewed-by: Jiri Pirko <jiri@nvidia.com>
Reviewed-by: Shay Drory <shayd@nvidia.com>
Signed-off-by: Parav Pandit <parav@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
477 lines
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ReStructuredText
477 lines
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ReStructuredText
.. SPDX-License-Identifier: GPL-2.0
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.. _devlink_port:
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============
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Devlink Port
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============
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``devlink-port`` is a port that exists on the device. It has a logically
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separate ingress/egress point of the device. A devlink port can be any one
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of many flavours. A devlink port flavour along with port attributes
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describe what a port represents.
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A device driver that intends to publish a devlink port sets the
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devlink port attributes and registers the devlink port.
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Devlink port flavours are described below.
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.. list-table:: List of devlink port flavours
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:widths: 33 90
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* - Flavour
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- Description
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* - ``DEVLINK_PORT_FLAVOUR_PHYSICAL``
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- Any kind of physical port. This can be an eswitch physical port or any
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other physical port on the device.
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* - ``DEVLINK_PORT_FLAVOUR_DSA``
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- This indicates a DSA interconnect port.
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* - ``DEVLINK_PORT_FLAVOUR_CPU``
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- This indicates a CPU port applicable only to DSA.
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* - ``DEVLINK_PORT_FLAVOUR_PCI_PF``
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- This indicates an eswitch port representing a port of PCI
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physical function (PF).
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* - ``DEVLINK_PORT_FLAVOUR_PCI_VF``
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- This indicates an eswitch port representing a port of PCI
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virtual function (VF).
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* - ``DEVLINK_PORT_FLAVOUR_PCI_SF``
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- This indicates an eswitch port representing a port of PCI
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subfunction (SF).
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* - ``DEVLINK_PORT_FLAVOUR_VIRTUAL``
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- This indicates a virtual port for the PCI virtual function.
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Devlink port can have a different type based on the link layer described below.
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.. list-table:: List of devlink port types
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:widths: 23 90
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* - Type
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- Description
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* - ``DEVLINK_PORT_TYPE_ETH``
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- Driver should set this port type when a link layer of the port is
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Ethernet.
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* - ``DEVLINK_PORT_TYPE_IB``
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- Driver should set this port type when a link layer of the port is
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InfiniBand.
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* - ``DEVLINK_PORT_TYPE_AUTO``
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- This type is indicated by the user when driver should detect the port
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type automatically.
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PCI controllers
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---------------
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In most cases a PCI device has only one controller. A controller consists of
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potentially multiple physical, virtual functions and subfunctions. A function
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consists of one or more ports. This port is represented by the devlink eswitch
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port.
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A PCI device connected to multiple CPUs or multiple PCI root complexes or a
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SmartNIC, however, may have multiple controllers. For a device with multiple
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controllers, each controller is distinguished by a unique controller number.
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An eswitch is on the PCI device which supports ports of multiple controllers.
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An example view of a system with two controllers::
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---------------------------------------------------------
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| --------- --------- ------- ------- |
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----------- | | vf(s) | | sf(s) | |vf(s)| |sf(s)| |
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| server | | ------- ----/---- ---/----- ------- ---/--- ---/--- |
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| pci rc |=== | pf0 |______/________/ | pf1 |___/_______/ |
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| connect | | ------- ------- |
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----------- | | controller_num=1 (no eswitch) |
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------|--------------------------------------------------
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(internal wire)
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---------------------------------------------------------
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| devlink eswitch ports and reps |
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| ----------------------------------------------------- |
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| |ctrl-0 | ctrl-0 | ctrl-0 | ctrl-0 | ctrl-0 |ctrl-0 | |
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| |pf0 | pf0vfN | pf0sfN | pf1 | pf1vfN |pf1sfN | |
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| ----------------------------------------------------- |
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| |ctrl-1 | ctrl-1 | ctrl-1 | ctrl-1 | ctrl-1 |ctrl-1 | |
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| |pf0 | pf0vfN | pf0sfN | pf1 | pf1vfN |pf1sfN | |
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| ----------------------------------------------------- |
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----------- | --------- --------- ------- ------- |
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| smartNIC| | | vf(s) | | sf(s) | |vf(s)| |sf(s)| |
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| pci rc |==| ------- ----/---- ---/----- ------- ---/--- ---/--- |
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| connect | | | pf0 |______/________/ | pf1 |___/_______/ |
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----------- | ------- ------- |
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| local controller_num=0 (eswitch) |
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---------------------------------------------------------
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In the above example, the external controller (identified by controller number = 1)
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doesn't have the eswitch. Local controller (identified by controller number = 0)
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has the eswitch. The Devlink instance on the local controller has eswitch
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devlink ports for both the controllers.
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Function configuration
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======================
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Users can configure one or more function attributes before enumerating the PCI
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function. Usually it means, user should configure function attribute
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before a bus specific device for the function is created. However, when
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SRIOV is enabled, virtual function devices are created on the PCI bus.
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Hence, function attribute should be configured before binding virtual
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function device to the driver. For subfunctions, this means user should
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configure port function attribute before activating the port function.
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A user may set the hardware address of the function using
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`devlink port function set hw_addr` command. For Ethernet port function
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this means a MAC address.
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Users may also set the RoCE capability of the function using
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`devlink port function set roce` command.
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Users may also set the function as migratable using
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`devlink port function set migratable` command.
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Users may also set the IPsec crypto capability of the function using
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`devlink port function set ipsec_crypto` command.
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Users may also set the IPsec packet capability of the function using
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`devlink port function set ipsec_packet` command.
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Users may also set the maximum IO event queues of the function
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using `devlink port function set max_io_eqs` command.
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Function attributes
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===================
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MAC address setup
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-----------------
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The configured MAC address of the PCI VF/SF will be used by netdevice and rdma
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device created for the PCI VF/SF.
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- Get the MAC address of the VF identified by its unique devlink port index::
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$ devlink port show pci/0000:06:00.0/2
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pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1
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function:
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hw_addr 00:00:00:00:00:00
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- Set the MAC address of the VF identified by its unique devlink port index::
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$ devlink port function set pci/0000:06:00.0/2 hw_addr 00:11:22:33:44:55
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$ devlink port show pci/0000:06:00.0/2
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pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1
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function:
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hw_addr 00:11:22:33:44:55
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- Get the MAC address of the SF identified by its unique devlink port index::
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$ devlink port show pci/0000:06:00.0/32768
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pci/0000:06:00.0/32768: type eth netdev enp6s0pf0sf88 flavour pcisf pfnum 0 sfnum 88
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function:
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hw_addr 00:00:00:00:00:00
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- Set the MAC address of the SF identified by its unique devlink port index::
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$ devlink port function set pci/0000:06:00.0/32768 hw_addr 00:00:00:00:88:88
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$ devlink port show pci/0000:06:00.0/32768
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pci/0000:06:00.0/32768: type eth netdev enp6s0pf0sf88 flavour pcisf pfnum 0 sfnum 88
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function:
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hw_addr 00:00:00:00:88:88
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RoCE capability setup
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---------------------
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Not all PCI VFs/SFs require RoCE capability.
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When RoCE capability is disabled, it saves system memory per PCI VF/SF.
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When user disables RoCE capability for a VF/SF, user application cannot send or
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receive any RoCE packets through this VF/SF and RoCE GID table for this PCI
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will be empty.
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When RoCE capability is disabled in the device using port function attribute,
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VF/SF driver cannot override it.
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- Get RoCE capability of the VF device::
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$ devlink port show pci/0000:06:00.0/2
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pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1
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function:
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hw_addr 00:00:00:00:00:00 roce enable
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- Set RoCE capability of the VF device::
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$ devlink port function set pci/0000:06:00.0/2 roce disable
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$ devlink port show pci/0000:06:00.0/2
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pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1
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function:
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hw_addr 00:00:00:00:00:00 roce disable
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migratable capability setup
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---------------------------
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Live migration is the process of transferring a live virtual machine
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from one physical host to another without disrupting its normal
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operation.
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User who want PCI VFs to be able to perform live migration need to
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explicitly enable the VF migratable capability.
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When user enables migratable capability for a VF, and the HV binds the VF to VFIO driver
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with migration support, the user can migrate the VM with this VF from one HV to a
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different one.
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However, when migratable capability is enable, device will disable features which cannot
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be migrated. Thus migratable cap can impose limitations on a VF so let the user decide.
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Example of LM with migratable function configuration:
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- Get migratable capability of the VF device::
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$ devlink port show pci/0000:06:00.0/2
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pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1
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function:
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hw_addr 00:00:00:00:00:00 migratable disable
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- Set migratable capability of the VF device::
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$ devlink port function set pci/0000:06:00.0/2 migratable enable
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$ devlink port show pci/0000:06:00.0/2
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pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1
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function:
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hw_addr 00:00:00:00:00:00 migratable enable
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- Bind VF to VFIO driver with migration support::
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$ echo <pci_id> > /sys/bus/pci/devices/0000:08:00.0/driver/unbind
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$ echo mlx5_vfio_pci > /sys/bus/pci/devices/0000:08:00.0/driver_override
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$ echo <pci_id> > /sys/bus/pci/devices/0000:08:00.0/driver/bind
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Attach VF to the VM.
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Start the VM.
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Perform live migration.
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IPsec crypto capability setup
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-----------------------------
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When user enables IPsec crypto capability for a VF, user application can offload
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XFRM state crypto operation (Encrypt/Decrypt) to this VF.
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When IPsec crypto capability is disabled (default) for a VF, the XFRM state is
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processed in software by the kernel.
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- Get IPsec crypto capability of the VF device::
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$ devlink port show pci/0000:06:00.0/2
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pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1
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function:
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hw_addr 00:00:00:00:00:00 ipsec_crypto disabled
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- Set IPsec crypto capability of the VF device::
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$ devlink port function set pci/0000:06:00.0/2 ipsec_crypto enable
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$ devlink port show pci/0000:06:00.0/2
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pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1
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function:
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hw_addr 00:00:00:00:00:00 ipsec_crypto enabled
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IPsec packet capability setup
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-----------------------------
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When user enables IPsec packet capability for a VF, user application can offload
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XFRM state and policy crypto operation (Encrypt/Decrypt) to this VF, as well as
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IPsec encapsulation.
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When IPsec packet capability is disabled (default) for a VF, the XFRM state and
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policy is processed in software by the kernel.
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- Get IPsec packet capability of the VF device::
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$ devlink port show pci/0000:06:00.0/2
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pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1
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function:
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hw_addr 00:00:00:00:00:00 ipsec_packet disabled
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- Set IPsec packet capability of the VF device::
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$ devlink port function set pci/0000:06:00.0/2 ipsec_packet enable
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$ devlink port show pci/0000:06:00.0/2
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pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1
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function:
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hw_addr 00:00:00:00:00:00 ipsec_packet enabled
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Maximum IO events queues setup
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------------------------------
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When user sets maximum number of IO event queues for a SF or
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a VF, such function driver is limited to consume only enforced
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number of IO event queues.
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IO event queues deliver events related to IO queues, including network
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device transmit and receive queues (txq and rxq) and RDMA Queue Pairs (QPs).
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For example, the number of netdevice channels and RDMA device completion
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vectors are derived from the function's IO event queues. Usually, the number
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of interrupt vectors consumed by the driver is limited by the number of IO
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event queues per device, as each of the IO event queues is connected to an
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interrupt vector.
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- Get maximum IO event queues of the VF device::
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$ devlink port show pci/0000:06:00.0/2
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pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1
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function:
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hw_addr 00:00:00:00:00:00 ipsec_packet disabled max_io_eqs 10
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- Set maximum IO event queues of the VF device::
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$ devlink port function set pci/0000:06:00.0/2 max_io_eqs 32
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$ devlink port show pci/0000:06:00.0/2
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pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1
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function:
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hw_addr 00:00:00:00:00:00 ipsec_packet disabled max_io_eqs 32
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Subfunction
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============
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Subfunction is a lightweight function that has a parent PCI function on which
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it is deployed. Subfunction is created and deployed in unit of 1. Unlike
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SRIOV VFs, a subfunction doesn't require its own PCI virtual function.
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A subfunction communicates with the hardware through the parent PCI function.
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To use a subfunction, 3 steps setup sequence is followed:
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1) create - create a subfunction;
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2) configure - configure subfunction attributes;
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3) deploy - deploy the subfunction;
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Subfunction management is done using devlink port user interface.
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User performs setup on the subfunction management device.
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(1) Create
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----------
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A subfunction is created using a devlink port interface. A user adds the
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subfunction by adding a devlink port of subfunction flavour. The devlink
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kernel code calls down to subfunction management driver (devlink ops) and asks
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it to create a subfunction devlink port. Driver then instantiates the
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subfunction port and any associated objects such as health reporters and
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representor netdevice.
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(2) Configure
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-------------
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A subfunction devlink port is created but it is not active yet. That means the
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entities are created on devlink side, the e-switch port representor is created,
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but the subfunction device itself is not created. A user might use e-switch port
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representor to do settings, putting it into bridge, adding TC rules, etc. A user
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might as well configure the hardware address (such as MAC address) of the
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subfunction while subfunction is inactive.
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(3) Deploy
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----------
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Once a subfunction is configured, user must activate it to use it. Upon
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activation, subfunction management driver asks the subfunction management
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device to instantiate the subfunction device on particular PCI function.
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A subfunction device is created on the :ref:`Documentation/driver-api/auxiliary_bus.rst <auxiliary_bus>`.
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At this point a matching subfunction driver binds to the subfunction's auxiliary device.
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Rate object management
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======================
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Devlink provides API to manage tx rates of single devlink port or a group.
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This is done through rate objects, which can be one of the two types:
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``leaf``
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Represents a single devlink port; created/destroyed by the driver. Since leaf
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have 1to1 mapping to its devlink port, in user space it is referred as
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``pci/<bus_addr>/<port_index>``;
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``node``
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Represents a group of rate objects (leafs and/or nodes); created/deleted by
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request from the userspace; initially empty (no rate objects added). In
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userspace it is referred as ``pci/<bus_addr>/<node_name>``, where
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``node_name`` can be any identifier, except decimal number, to avoid
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collisions with leafs.
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API allows to configure following rate object's parameters:
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``tx_share``
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Minimum TX rate value shared among all other rate objects, or rate objects
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that parts of the parent group, if it is a part of the same group.
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``tx_max``
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Maximum TX rate value.
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``tx_priority``
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Allows for usage of strict priority arbiter among siblings. This
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arbitration scheme attempts to schedule nodes based on their priority
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as long as the nodes remain within their bandwidth limit. The higher the
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priority the higher the probability that the node will get selected for
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scheduling.
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``tx_weight``
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Allows for usage of Weighted Fair Queuing arbitration scheme among
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siblings. This arbitration scheme can be used simultaneously with the
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strict priority. As a node is configured with a higher rate it gets more
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BW relative to its siblings. Values are relative like a percentage
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points, they basically tell how much BW should node take relative to
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its siblings.
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``parent``
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Parent node name. Parent node rate limits are considered as additional limits
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to all node children limits. ``tx_max`` is an upper limit for children.
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``tx_share`` is a total bandwidth distributed among children.
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``tx_priority`` and ``tx_weight`` can be used simultaneously. In that case
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nodes with the same priority form a WFQ subgroup in the sibling group
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and arbitration among them is based on assigned weights.
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Arbitration flow from the high level:
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#. Choose a node, or group of nodes with the highest priority that stays
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within the BW limit and are not blocked. Use ``tx_priority`` as a
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parameter for this arbitration.
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#. If group of nodes have the same priority perform WFQ arbitration on
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that subgroup. Use ``tx_weight`` as a parameter for this arbitration.
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#. Select the winner node, and continue arbitration flow among its children,
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until leaf node is reached, and the winner is established.
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#. If all the nodes from the highest priority sub-group are satisfied, or
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overused their assigned BW, move to the lower priority nodes.
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Driver implementations are allowed to support both or either rate object types
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and setting methods of their parameters. Additionally driver implementation
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may export nodes/leafs and their child-parent relationships.
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Terms and Definitions
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=====================
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.. list-table:: Terms and Definitions
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:widths: 22 90
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* - Term
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- Definitions
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* - ``PCI device``
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- A physical PCI device having one or more PCI buses consists of one or
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more PCI controllers.
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* - ``PCI controller``
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- A controller consists of potentially multiple physical functions,
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virtual functions and subfunctions.
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* - ``Port function``
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- An object to manage the function of a port.
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* - ``Subfunction``
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- A lightweight function that has parent PCI function on which it is
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deployed.
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* - ``Subfunction device``
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- A bus device of the subfunction, usually on a auxiliary bus.
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* - ``Subfunction driver``
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- A device driver for the subfunction auxiliary device.
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* - ``Subfunction management device``
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- A PCI physical function that supports subfunction management.
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* - ``Subfunction management driver``
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- A device driver for PCI physical function that supports
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subfunction management using devlink port interface.
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* - ``Subfunction host driver``
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- A device driver for PCI physical function that hosts subfunction
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devices. In most cases it is same as subfunction management driver. When
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subfunction is used on external controller, subfunction management and
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host drivers are different.
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