mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
synced 2024-12-29 17:22:07 +00:00
9b69b52cdd
I think this has been unused since
Commit b6f21d14f1
("ARM: 9204/2: module: Add all unwind tables when
load module")
Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
499 lines
14 KiB
C
499 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* linux/arch/arm/kernel/module.c
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*
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* Copyright (C) 2002 Russell King.
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* Modified for nommu by Hyok S. Choi
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*
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* Module allocation method suggested by Andi Kleen.
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*/
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#include <linux/module.h>
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#include <linux/moduleloader.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/elf.h>
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#include <linux/fs.h>
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#include <linux/string.h>
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#include <asm/sections.h>
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#include <asm/smp_plat.h>
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#include <asm/unwind.h>
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#include <asm/opcodes.h>
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bool module_init_section(const char *name)
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{
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return strstarts(name, ".init") ||
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strstarts(name, ".ARM.extab.init") ||
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strstarts(name, ".ARM.exidx.init");
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}
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bool module_exit_section(const char *name)
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{
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return strstarts(name, ".exit") ||
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strstarts(name, ".ARM.extab.exit") ||
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strstarts(name, ".ARM.exidx.exit");
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}
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#ifdef CONFIG_ARM_HAS_GROUP_RELOCS
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/*
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* This implements the partitioning algorithm for group relocations as
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* documented in the ARM AArch32 ELF psABI (IHI 0044).
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*
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* A single PC-relative symbol reference is divided in up to 3 add or subtract
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* operations, where the final one could be incorporated into a load/store
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* instruction with immediate offset. E.g.,
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*
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* ADD Rd, PC, #... or ADD Rd, PC, #...
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* ADD Rd, Rd, #... ADD Rd, Rd, #...
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* LDR Rd, [Rd, #...] ADD Rd, Rd, #...
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*
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* The latter has a guaranteed range of only 16 MiB (3x8 == 24 bits), so it is
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* of limited use in the kernel. However, the ADD/ADD/LDR combo has a range of
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* -/+ 256 MiB, (2x8 + 12 == 28 bits), which means it has sufficient range for
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* any in-kernel symbol reference (unless module PLTs are being used).
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*
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* The main advantage of this approach over the typical pattern using a literal
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* load is that literal loads may miss in the D-cache, and generally lead to
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* lower cache efficiency for variables that are referenced often from many
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* different places in the code.
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*/
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static u32 get_group_rem(u32 group, u32 *offset)
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{
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u32 val = *offset;
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u32 shift;
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do {
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shift = val ? (31 - __fls(val)) & ~1 : 32;
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*offset = val;
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if (!val)
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break;
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val &= 0xffffff >> shift;
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} while (group--);
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return shift;
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}
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#endif
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int
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apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex,
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unsigned int relindex, struct module *module)
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{
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Elf32_Shdr *symsec = sechdrs + symindex;
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Elf32_Shdr *relsec = sechdrs + relindex;
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Elf32_Shdr *dstsec = sechdrs + relsec->sh_info;
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Elf32_Rel *rel = (void *)relsec->sh_addr;
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unsigned int i;
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for (i = 0; i < relsec->sh_size / sizeof(Elf32_Rel); i++, rel++) {
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unsigned long loc;
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Elf32_Sym *sym;
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const char *symname;
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#ifdef CONFIG_ARM_HAS_GROUP_RELOCS
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u32 shift, group = 1;
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#endif
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s32 offset;
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u32 tmp;
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#ifdef CONFIG_THUMB2_KERNEL
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u32 upper, lower, sign, j1, j2;
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#endif
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offset = ELF32_R_SYM(rel->r_info);
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if (offset < 0 || offset > (symsec->sh_size / sizeof(Elf32_Sym))) {
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pr_err("%s: section %u reloc %u: bad relocation sym offset\n",
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module->name, relindex, i);
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return -ENOEXEC;
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}
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sym = ((Elf32_Sym *)symsec->sh_addr) + offset;
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symname = strtab + sym->st_name;
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if (rel->r_offset < 0 || rel->r_offset > dstsec->sh_size - sizeof(u32)) {
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pr_err("%s: section %u reloc %u sym '%s': out of bounds relocation, offset %d size %u\n",
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module->name, relindex, i, symname,
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rel->r_offset, dstsec->sh_size);
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return -ENOEXEC;
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}
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loc = dstsec->sh_addr + rel->r_offset;
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switch (ELF32_R_TYPE(rel->r_info)) {
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case R_ARM_NONE:
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/* ignore */
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break;
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case R_ARM_ABS32:
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case R_ARM_TARGET1:
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*(u32 *)loc += sym->st_value;
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break;
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case R_ARM_PC24:
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case R_ARM_CALL:
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case R_ARM_JUMP24:
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if (sym->st_value & 3) {
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pr_err("%s: section %u reloc %u sym '%s': unsupported interworking call (ARM -> Thumb)\n",
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module->name, relindex, i, symname);
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return -ENOEXEC;
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}
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offset = __mem_to_opcode_arm(*(u32 *)loc);
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offset = (offset & 0x00ffffff) << 2;
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offset = sign_extend32(offset, 25);
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offset += sym->st_value - loc;
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/*
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* Route through a PLT entry if 'offset' exceeds the
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* supported range. Note that 'offset + loc + 8'
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* contains the absolute jump target, i.e.,
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* @sym + addend, corrected for the +8 PC bias.
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*/
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if (IS_ENABLED(CONFIG_ARM_MODULE_PLTS) &&
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(offset <= (s32)0xfe000000 ||
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offset >= (s32)0x02000000))
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offset = get_module_plt(module, loc,
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offset + loc + 8)
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- loc - 8;
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if (offset <= (s32)0xfe000000 ||
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offset >= (s32)0x02000000) {
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pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n",
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module->name, relindex, i, symname,
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ELF32_R_TYPE(rel->r_info), loc,
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sym->st_value);
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return -ENOEXEC;
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}
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offset >>= 2;
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offset &= 0x00ffffff;
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*(u32 *)loc &= __opcode_to_mem_arm(0xff000000);
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*(u32 *)loc |= __opcode_to_mem_arm(offset);
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break;
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case R_ARM_V4BX:
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/* Preserve Rm and the condition code. Alter
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* other bits to re-code instruction as
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* MOV PC,Rm.
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*/
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*(u32 *)loc &= __opcode_to_mem_arm(0xf000000f);
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*(u32 *)loc |= __opcode_to_mem_arm(0x01a0f000);
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break;
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case R_ARM_PREL31:
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offset = (*(s32 *)loc << 1) >> 1; /* sign extend */
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offset += sym->st_value - loc;
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if (offset >= 0x40000000 || offset < -0x40000000) {
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pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n",
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module->name, relindex, i, symname,
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ELF32_R_TYPE(rel->r_info), loc,
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sym->st_value);
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return -ENOEXEC;
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}
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*(u32 *)loc &= 0x80000000;
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*(u32 *)loc |= offset & 0x7fffffff;
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break;
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case R_ARM_REL32:
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*(u32 *)loc += sym->st_value - loc;
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break;
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case R_ARM_MOVW_ABS_NC:
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case R_ARM_MOVT_ABS:
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case R_ARM_MOVW_PREL_NC:
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case R_ARM_MOVT_PREL:
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offset = tmp = __mem_to_opcode_arm(*(u32 *)loc);
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offset = ((offset & 0xf0000) >> 4) | (offset & 0xfff);
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offset = sign_extend32(offset, 15);
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offset += sym->st_value;
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if (ELF32_R_TYPE(rel->r_info) == R_ARM_MOVT_PREL ||
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ELF32_R_TYPE(rel->r_info) == R_ARM_MOVW_PREL_NC)
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offset -= loc;
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if (ELF32_R_TYPE(rel->r_info) == R_ARM_MOVT_ABS ||
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ELF32_R_TYPE(rel->r_info) == R_ARM_MOVT_PREL)
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offset >>= 16;
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tmp &= 0xfff0f000;
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tmp |= ((offset & 0xf000) << 4) |
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(offset & 0x0fff);
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*(u32 *)loc = __opcode_to_mem_arm(tmp);
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break;
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#ifdef CONFIG_ARM_HAS_GROUP_RELOCS
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case R_ARM_ALU_PC_G0_NC:
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group = 0;
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fallthrough;
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case R_ARM_ALU_PC_G1_NC:
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tmp = __mem_to_opcode_arm(*(u32 *)loc);
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offset = ror32(tmp & 0xff, (tmp & 0xf00) >> 7);
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if (tmp & BIT(22))
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offset = -offset;
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offset += sym->st_value - loc;
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if (offset < 0) {
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offset = -offset;
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tmp = (tmp & ~BIT(23)) | BIT(22); // SUB opcode
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} else {
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tmp = (tmp & ~BIT(22)) | BIT(23); // ADD opcode
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}
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shift = get_group_rem(group, &offset);
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if (shift < 24) {
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offset >>= 24 - shift;
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offset |= (shift + 8) << 7;
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}
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*(u32 *)loc = __opcode_to_mem_arm((tmp & ~0xfff) | offset);
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break;
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case R_ARM_LDR_PC_G2:
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tmp = __mem_to_opcode_arm(*(u32 *)loc);
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offset = tmp & 0xfff;
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if (~tmp & BIT(23)) // U bit cleared?
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offset = -offset;
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offset += sym->st_value - loc;
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if (offset < 0) {
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offset = -offset;
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tmp &= ~BIT(23); // clear U bit
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} else {
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tmp |= BIT(23); // set U bit
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}
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get_group_rem(2, &offset);
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if (offset > 0xfff) {
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pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n",
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module->name, relindex, i, symname,
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ELF32_R_TYPE(rel->r_info), loc,
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sym->st_value);
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return -ENOEXEC;
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}
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*(u32 *)loc = __opcode_to_mem_arm((tmp & ~0xfff) | offset);
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break;
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#endif
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#ifdef CONFIG_THUMB2_KERNEL
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case R_ARM_THM_CALL:
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case R_ARM_THM_JUMP24:
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/*
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* For function symbols, only Thumb addresses are
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* allowed (no interworking).
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*
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* For non-function symbols, the destination
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* has no specific ARM/Thumb disposition, so
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* the branch is resolved under the assumption
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* that interworking is not required.
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*/
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if (ELF32_ST_TYPE(sym->st_info) == STT_FUNC &&
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!(sym->st_value & 1)) {
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pr_err("%s: section %u reloc %u sym '%s': unsupported interworking call (Thumb -> ARM)\n",
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module->name, relindex, i, symname);
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return -ENOEXEC;
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}
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upper = __mem_to_opcode_thumb16(*(u16 *)loc);
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lower = __mem_to_opcode_thumb16(*(u16 *)(loc + 2));
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/*
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* 25 bit signed address range (Thumb-2 BL and B.W
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* instructions):
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* S:I1:I2:imm10:imm11:0
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* where:
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* S = upper[10] = offset[24]
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* I1 = ~(J1 ^ S) = offset[23]
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* I2 = ~(J2 ^ S) = offset[22]
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* imm10 = upper[9:0] = offset[21:12]
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* imm11 = lower[10:0] = offset[11:1]
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* J1 = lower[13]
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* J2 = lower[11]
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*/
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sign = (upper >> 10) & 1;
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j1 = (lower >> 13) & 1;
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j2 = (lower >> 11) & 1;
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offset = (sign << 24) | ((~(j1 ^ sign) & 1) << 23) |
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((~(j2 ^ sign) & 1) << 22) |
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((upper & 0x03ff) << 12) |
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((lower & 0x07ff) << 1);
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offset = sign_extend32(offset, 24);
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offset += sym->st_value - loc;
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/*
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* Route through a PLT entry if 'offset' exceeds the
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* supported range.
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*/
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if (IS_ENABLED(CONFIG_ARM_MODULE_PLTS) &&
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(offset <= (s32)0xff000000 ||
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offset >= (s32)0x01000000))
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offset = get_module_plt(module, loc,
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offset + loc + 4)
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- loc - 4;
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if (offset <= (s32)0xff000000 ||
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offset >= (s32)0x01000000) {
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pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n",
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module->name, relindex, i, symname,
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ELF32_R_TYPE(rel->r_info), loc,
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sym->st_value);
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return -ENOEXEC;
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}
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sign = (offset >> 24) & 1;
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j1 = sign ^ (~(offset >> 23) & 1);
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j2 = sign ^ (~(offset >> 22) & 1);
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upper = (u16)((upper & 0xf800) | (sign << 10) |
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((offset >> 12) & 0x03ff));
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lower = (u16)((lower & 0xd000) |
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(j1 << 13) | (j2 << 11) |
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((offset >> 1) & 0x07ff));
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*(u16 *)loc = __opcode_to_mem_thumb16(upper);
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*(u16 *)(loc + 2) = __opcode_to_mem_thumb16(lower);
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break;
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case R_ARM_THM_MOVW_ABS_NC:
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case R_ARM_THM_MOVT_ABS:
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case R_ARM_THM_MOVW_PREL_NC:
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case R_ARM_THM_MOVT_PREL:
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upper = __mem_to_opcode_thumb16(*(u16 *)loc);
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lower = __mem_to_opcode_thumb16(*(u16 *)(loc + 2));
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/*
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* MOVT/MOVW instructions encoding in Thumb-2:
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*
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* i = upper[10]
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* imm4 = upper[3:0]
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* imm3 = lower[14:12]
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* imm8 = lower[7:0]
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*
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* imm16 = imm4:i:imm3:imm8
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*/
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offset = ((upper & 0x000f) << 12) |
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((upper & 0x0400) << 1) |
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((lower & 0x7000) >> 4) | (lower & 0x00ff);
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offset = sign_extend32(offset, 15);
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offset += sym->st_value;
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if (ELF32_R_TYPE(rel->r_info) == R_ARM_THM_MOVT_PREL ||
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ELF32_R_TYPE(rel->r_info) == R_ARM_THM_MOVW_PREL_NC)
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offset -= loc;
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if (ELF32_R_TYPE(rel->r_info) == R_ARM_THM_MOVT_ABS ||
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ELF32_R_TYPE(rel->r_info) == R_ARM_THM_MOVT_PREL)
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offset >>= 16;
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upper = (u16)((upper & 0xfbf0) |
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((offset & 0xf000) >> 12) |
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((offset & 0x0800) >> 1));
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lower = (u16)((lower & 0x8f00) |
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((offset & 0x0700) << 4) |
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(offset & 0x00ff));
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*(u16 *)loc = __opcode_to_mem_thumb16(upper);
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*(u16 *)(loc + 2) = __opcode_to_mem_thumb16(lower);
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break;
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#endif
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default:
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pr_err("%s: unknown relocation: %u\n",
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module->name, ELF32_R_TYPE(rel->r_info));
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return -ENOEXEC;
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}
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}
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return 0;
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}
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static const Elf_Shdr *find_mod_section(const Elf32_Ehdr *hdr,
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const Elf_Shdr *sechdrs, const char *name)
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{
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const Elf_Shdr *s, *se;
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const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
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for (s = sechdrs, se = sechdrs + hdr->e_shnum; s < se; s++)
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if (strcmp(name, secstrs + s->sh_name) == 0)
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return s;
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return NULL;
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}
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extern void fixup_pv_table(const void *, unsigned long);
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extern void fixup_smp(const void *, unsigned long);
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int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs,
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struct module *mod)
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{
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const Elf_Shdr *s = NULL;
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#ifdef CONFIG_ARM_UNWIND
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const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
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const Elf_Shdr *sechdrs_end = sechdrs + hdr->e_shnum;
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struct list_head *unwind_list = &mod->arch.unwind_list;
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INIT_LIST_HEAD(unwind_list);
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mod->arch.init_table = NULL;
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for (s = sechdrs; s < sechdrs_end; s++) {
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const char *secname = secstrs + s->sh_name;
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const char *txtname;
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const Elf_Shdr *txt_sec;
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if (!(s->sh_flags & SHF_ALLOC) ||
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s->sh_type != ELF_SECTION_UNWIND)
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continue;
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if (!strcmp(".ARM.exidx", secname))
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txtname = ".text";
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else
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txtname = secname + strlen(".ARM.exidx");
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txt_sec = find_mod_section(hdr, sechdrs, txtname);
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if (txt_sec) {
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struct unwind_table *table =
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unwind_table_add(s->sh_addr,
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s->sh_size,
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txt_sec->sh_addr,
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txt_sec->sh_size);
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list_add(&table->mod_list, unwind_list);
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/* save init table for module_arch_freeing_init */
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if (strcmp(".ARM.exidx.init.text", secname) == 0)
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mod->arch.init_table = table;
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}
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}
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#endif
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#ifdef CONFIG_ARM_PATCH_PHYS_VIRT
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s = find_mod_section(hdr, sechdrs, ".pv_table");
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if (s)
|
|
fixup_pv_table((void *)s->sh_addr, s->sh_size);
|
|
#endif
|
|
s = find_mod_section(hdr, sechdrs, ".alt.smp.init");
|
|
if (s && !is_smp())
|
|
#ifdef CONFIG_SMP_ON_UP
|
|
fixup_smp((void *)s->sh_addr, s->sh_size);
|
|
#else
|
|
return -EINVAL;
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
void
|
|
module_arch_cleanup(struct module *mod)
|
|
{
|
|
#ifdef CONFIG_ARM_UNWIND
|
|
struct unwind_table *tmp;
|
|
struct unwind_table *n;
|
|
|
|
list_for_each_entry_safe(tmp, n,
|
|
&mod->arch.unwind_list, mod_list) {
|
|
list_del(&tmp->mod_list);
|
|
unwind_table_del(tmp);
|
|
}
|
|
mod->arch.init_table = NULL;
|
|
#endif
|
|
}
|
|
|
|
void __weak module_arch_freeing_init(struct module *mod)
|
|
{
|
|
#ifdef CONFIG_ARM_UNWIND
|
|
struct unwind_table *init = mod->arch.init_table;
|
|
|
|
if (init) {
|
|
mod->arch.init_table = NULL;
|
|
list_del(&init->mod_list);
|
|
unwind_table_del(init);
|
|
}
|
|
#endif
|
|
}
|