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87b30c4b0e
Calling of_find_compatible_node() returns a node pointer with refcount incremented. Use of_node_put() on it when done. The patch fixes the same problem on different i.MX platforms. Fixes:8b88f7ef31("ARM: mx25: Retrieve IIM base from dt") Fixes:94b2bec1b0("ARM: imx27: Retrieve the SYSCTRL base address from devicetree") Fixes:3172225d45("ARM: imx31: Retrieve the IIM base address from devicetree") Fixes:f68ea682d1("ARM: imx35: Retrieve the IIM base address from devicetree") Fixes:ee18a7154e("ARM: imx5: retrieve iim base from device tree") Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Martin Kaiser <martin@kaiser.cx> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
48 lines
896 B
C
48 lines
896 B
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* MX35 CPU type detection
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*
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* Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
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*/
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/io.h>
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#include "hardware.h"
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#include "iim.h"
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static int mx35_cpu_rev = -1;
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static int mx35_read_cpu_rev(void)
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{
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void __iomem *iim_base;
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struct device_node *np;
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u32 rev;
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np = of_find_compatible_node(NULL, NULL, "fsl,imx35-iim");
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iim_base = of_iomap(np, 0);
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of_node_put(np);
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BUG_ON(!iim_base);
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rev = imx_readl(iim_base + MXC_IIMSREV);
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switch (rev) {
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case 0x00:
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return IMX_CHIP_REVISION_1_0;
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case 0x10:
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return IMX_CHIP_REVISION_2_0;
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case 0x11:
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return IMX_CHIP_REVISION_2_1;
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default:
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return IMX_CHIP_REVISION_UNKNOWN;
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}
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}
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int mx35_revision(void)
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{
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if (mx35_cpu_rev == -1)
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mx35_cpu_rev = mx35_read_cpu_rev();
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return mx35_cpu_rev;
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}
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EXPORT_SYMBOL(mx35_revision);
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