mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
synced 2024-12-29 17:22:07 +00:00
c729baa860
After fixing all the offending users referencing the global GPIO
numberspace in OMAP1, a few sites still remain including the
legacy <linus/gpio.h> header for no reason.
Delete the last remaining users, and OMAP1 is free from legacy
GPIO dependencies.
Fixes: 92bf78b33b
("gpio: omap: use dynamic allocation of base")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
252 lines
6.0 KiB
C
252 lines
6.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* OMAP16xx specific gpio init
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*
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* Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/
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*
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* Author:
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* Charulatha V <charu@ti.com>
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*/
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#include <linux/platform_data/gpio-omap.h>
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#include <linux/soc/ti/omap1-io.h>
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#include "hardware.h"
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#include "irqs.h"
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#include "soc.h"
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#define OMAP1610_GPIO1_BASE 0xfffbe400
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#define OMAP1610_GPIO2_BASE 0xfffbec00
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#define OMAP1610_GPIO3_BASE 0xfffbb400
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#define OMAP1610_GPIO4_BASE 0xfffbbc00
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#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
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/* smart idle, enable wakeup */
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#define SYSCONFIG_WORD 0x14
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/* mpu gpio */
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static struct resource omap16xx_mpu_gpio_resources[] = {
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{
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.start = OMAP1_MPUIO_VBASE,
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.end = OMAP1_MPUIO_VBASE + SZ_2K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_MPUIO,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct omap_gpio_reg_offs omap16xx_mpuio_regs = {
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.revision = USHRT_MAX,
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.direction = OMAP_MPUIO_IO_CNTL,
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.datain = OMAP_MPUIO_INPUT_LATCH,
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.dataout = OMAP_MPUIO_OUTPUT,
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.irqstatus = OMAP_MPUIO_GPIO_INT,
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.irqenable = OMAP_MPUIO_GPIO_MASKIT,
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.irqenable_inv = true,
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.irqctrl = OMAP_MPUIO_GPIO_INT_EDGE,
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};
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static struct omap_gpio_platform_data omap16xx_mpu_gpio_config = {
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.is_mpuio = true,
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.bank_width = 16,
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.bank_stride = 1,
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.regs = &omap16xx_mpuio_regs,
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};
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static struct platform_device omap16xx_mpu_gpio = {
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.name = "omap_gpio",
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.id = 0,
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.dev = {
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.platform_data = &omap16xx_mpu_gpio_config,
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},
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.num_resources = ARRAY_SIZE(omap16xx_mpu_gpio_resources),
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.resource = omap16xx_mpu_gpio_resources,
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};
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/* gpio1 */
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static struct resource omap16xx_gpio1_resources[] = {
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{
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.start = OMAP1610_GPIO1_BASE,
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.end = OMAP1610_GPIO1_BASE + SZ_2K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_GPIO_BANK1,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
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.revision = OMAP1610_GPIO_REVISION,
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.direction = OMAP1610_GPIO_DIRECTION,
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.set_dataout = OMAP1610_GPIO_SET_DATAOUT,
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.clr_dataout = OMAP1610_GPIO_CLEAR_DATAOUT,
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.datain = OMAP1610_GPIO_DATAIN,
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.dataout = OMAP1610_GPIO_DATAOUT,
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.irqstatus = OMAP1610_GPIO_IRQSTATUS1,
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.irqenable = OMAP1610_GPIO_IRQENABLE1,
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.set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1,
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.clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1,
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.wkup_en = OMAP1610_GPIO_WAKEUPENABLE,
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.edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1,
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.edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2,
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};
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static struct omap_gpio_platform_data omap16xx_gpio1_config = {
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.bank_width = 16,
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.regs = &omap16xx_gpio_regs,
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};
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static struct platform_device omap16xx_gpio1 = {
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.name = "omap_gpio",
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.id = 1,
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.dev = {
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.platform_data = &omap16xx_gpio1_config,
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},
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.num_resources = ARRAY_SIZE(omap16xx_gpio1_resources),
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.resource = omap16xx_gpio1_resources,
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};
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/* gpio2 */
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static struct resource omap16xx_gpio2_resources[] = {
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{
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.start = OMAP1610_GPIO2_BASE,
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.end = OMAP1610_GPIO2_BASE + SZ_2K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_1610_GPIO_BANK2,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct omap_gpio_platform_data omap16xx_gpio2_config = {
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.bank_width = 16,
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.regs = &omap16xx_gpio_regs,
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};
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static struct platform_device omap16xx_gpio2 = {
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.name = "omap_gpio",
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.id = 2,
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.dev = {
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.platform_data = &omap16xx_gpio2_config,
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},
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.num_resources = ARRAY_SIZE(omap16xx_gpio2_resources),
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.resource = omap16xx_gpio2_resources,
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};
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/* gpio3 */
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static struct resource omap16xx_gpio3_resources[] = {
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{
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.start = OMAP1610_GPIO3_BASE,
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.end = OMAP1610_GPIO3_BASE + SZ_2K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_1610_GPIO_BANK3,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct omap_gpio_platform_data omap16xx_gpio3_config = {
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.bank_width = 16,
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.regs = &omap16xx_gpio_regs,
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};
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static struct platform_device omap16xx_gpio3 = {
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.name = "omap_gpio",
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.id = 3,
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.dev = {
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.platform_data = &omap16xx_gpio3_config,
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},
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.num_resources = ARRAY_SIZE(omap16xx_gpio3_resources),
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.resource = omap16xx_gpio3_resources,
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};
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/* gpio4 */
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static struct resource omap16xx_gpio4_resources[] = {
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{
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.start = OMAP1610_GPIO4_BASE,
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.end = OMAP1610_GPIO4_BASE + SZ_2K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_1610_GPIO_BANK4,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct omap_gpio_platform_data omap16xx_gpio4_config = {
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.bank_width = 16,
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.regs = &omap16xx_gpio_regs,
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};
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static struct platform_device omap16xx_gpio4 = {
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.name = "omap_gpio",
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.id = 4,
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.dev = {
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.platform_data = &omap16xx_gpio4_config,
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},
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.num_resources = ARRAY_SIZE(omap16xx_gpio4_resources),
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.resource = omap16xx_gpio4_resources,
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};
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static struct platform_device *omap16xx_gpio_dev[] __initdata = {
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&omap16xx_mpu_gpio,
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&omap16xx_gpio1,
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&omap16xx_gpio2,
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&omap16xx_gpio3,
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&omap16xx_gpio4,
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};
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/*
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* omap16xx_gpio_init needs to be done before
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* machine_init functions access gpio APIs.
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* Hence omap16xx_gpio_init is a postcore_initcall.
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*/
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static int __init omap16xx_gpio_init(void)
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{
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int i;
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void __iomem *base;
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struct resource *res;
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struct platform_device *pdev;
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struct omap_gpio_platform_data *pdata;
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if (!cpu_is_omap16xx())
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return -EINVAL;
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/*
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* Enable system clock for GPIO module.
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* The CAM_CLK_CTRL *is* really the right place.
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*/
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omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04,
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ULPD_CAM_CLK_CTRL);
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for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++) {
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pdev = omap16xx_gpio_dev[i];
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pdata = pdev->dev.platform_data;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (unlikely(!res)) {
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dev_err(&pdev->dev, "Invalid mem resource.\n");
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return -ENODEV;
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}
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base = ioremap(res->start, resource_size(res));
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if (unlikely(!base)) {
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dev_err(&pdev->dev, "ioremap failed.\n");
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return -ENOMEM;
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}
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__raw_writel(SYSCONFIG_WORD, base + OMAP1610_GPIO_SYSCONFIG);
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iounmap(base);
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platform_device_register(omap16xx_gpio_dev[i]);
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}
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return 0;
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}
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postcore_initcall(omap16xx_gpio_init);
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