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d8b2feb9df
These are unused and should be handled by drivers/clock/ti nowadays. Note that we also drop some unused SCRM registers that are not clock related. Signed-off-by: Tony Lindgren <tony@atomide.com>
64 lines
2.2 KiB
C
64 lines
2.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* OMAP44xx CM2 instance offset macros
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*
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* Copyright (C) 2009-2011 Texas Instruments, Inc.
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* Copyright (C) 2009-2010 Nokia Corporation
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*
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* Paul Walmsley (paul@pwsan.com)
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* Rajendra Nayak (rnayak@ti.com)
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* Benoit Cousson (b-cousson@ti.com)
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*
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* This file is automatically generated from the OMAP hardware databases.
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* We respectfully ask that any modifications to this file be coordinated
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* with the public linux-omap@vger.kernel.org mailing list and the
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* authors above to ensure that the autogeneration scripts are kept
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* up-to-date with the file contents.
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*
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* XXX This file needs to be updated to align on one of "OMAP4", "OMAP44XX",
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* or "OMAP4430".
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*/
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#ifndef __ARCH_ARM_MACH_OMAP2_CM2_44XX_H
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#define __ARCH_ARM_MACH_OMAP2_CM2_44XX_H
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/* CM2 base address */
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#define OMAP4430_CM2_BASE 0x4a008000
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#define OMAP44XX_CM2_REGADDR(inst, reg) \
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OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE + (inst) + (reg))
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/* CM2 instances */
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#define OMAP4430_CM2_OCP_SOCKET_INST 0x0000
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#define OMAP4430_CM2_CKGEN_INST 0x0100
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#define OMAP4430_CM2_ALWAYS_ON_INST 0x0600
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#define OMAP4430_CM2_CORE_INST 0x0700
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#define OMAP4430_CM2_IVAHD_INST 0x0f00
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#define OMAP4430_CM2_CAM_INST 0x1000
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#define OMAP4430_CM2_DSS_INST 0x1100
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#define OMAP4430_CM2_GFX_INST 0x1200
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#define OMAP4430_CM2_L3INIT_INST 0x1300
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#define OMAP4430_CM2_L4PER_INST 0x1400
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#define OMAP4430_CM2_CEFUSE_INST 0x1600
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/* CM2 clockdomain register offsets (from instance start) */
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#define OMAP4430_CM2_ALWAYS_ON_ALWON_CDOFFS 0x0000
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#define OMAP4430_CM2_CORE_L3_1_CDOFFS 0x0000
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#define OMAP4430_CM2_CORE_L3_2_CDOFFS 0x0100
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#define OMAP4430_CM2_CORE_DUCATI_CDOFFS 0x0200
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#define OMAP4430_CM2_CORE_SDMA_CDOFFS 0x0300
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#define OMAP4430_CM2_CORE_MEMIF_CDOFFS 0x0400
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#define OMAP4430_CM2_CORE_D2D_CDOFFS 0x0500
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#define OMAP4430_CM2_CORE_L4CFG_CDOFFS 0x0600
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#define OMAP4430_CM2_CORE_L3INSTR_CDOFFS 0x0700
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#define OMAP4430_CM2_IVAHD_IVAHD_CDOFFS 0x0000
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#define OMAP4430_CM2_CAM_CAM_CDOFFS 0x0000
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#define OMAP4430_CM2_DSS_DSS_CDOFFS 0x0000
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#define OMAP4430_CM2_GFX_GFX_CDOFFS 0x0000
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#define OMAP4430_CM2_L3INIT_L3INIT_CDOFFS 0x0000
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#define OMAP4430_CM2_L4PER_L4PER_CDOFFS 0x0000
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#define OMAP4430_CM2_L4PER_L4SEC_CDOFFS 0x0180
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#define OMAP4430_CM2_CEFUSE_CEFUSE_CDOFFS 0x0000
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#endif
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