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CPU core bringup on SH-Mobile AG5 uses the SYS Boot Address (SBAR) and Address Translation Area (APARMBAREA) registers to specify the base address and size of the boot area of the System CPU. With this enabled, when the System CPU accesses a physical address in the range from zero up to the configured size, the top address bits are replaced by those specified in the SBAR register. Hence any device residing in this low part of physical address space cannot be accessed. Prevent conflicts by reserving this memory region using request_mem_region(). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20eb4e7fca9c41a34500fc5984602b41006b4575.1693409184.git.geert+renesas@glider.be
75 lines
2.0 KiB
C
75 lines
2.0 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* SMP support for R-Mobile / SH-Mobile - sh73a0 portion
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*
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* Copyright (C) 2010 Magnus Damm
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* Copyright (C) 2010 Takashi Yoshii
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <asm/smp_plat.h>
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#include "common.h"
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#include "sh73a0.h"
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#define CPG_BASE2 0xe6151000
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#define WUPCR 0x10 /* System-CPU Wake Up Control Register */
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#define SRESCR 0x18 /* System-CPU Software Reset Control Register */
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#define PSTR 0x40 /* System-CPU Power Status Register */
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#define SYSC_BASE 0xe6180000
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#define SBAR 0x20 /* SYS Boot Address Register */
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#define AP_BASE 0xe6f10000
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#define APARMBAREA 0x20 /* Address Translation Area Register */
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#define SH73A0_SCU_BASE 0xf0000000
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static int sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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unsigned int lcpu = cpu_logical_map(cpu);
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void __iomem *cpg2 = ioremap(CPG_BASE2, PAGE_SIZE);
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if (((readl(cpg2 + PSTR) >> (4 * lcpu)) & 3) == 3)
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writel(1 << lcpu, cpg2 + WUPCR); /* wake up */
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else
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writel(1 << lcpu, cpg2 + SRESCR); /* reset */
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iounmap(cpg2);
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return 0;
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}
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static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
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{
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void __iomem *ap, *sysc;
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if (!request_mem_region(0, SZ_4K, "Boot Area")) {
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pr_err("Failed to request boot area\n");
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return;
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}
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/* Map the reset vector (in headsmp.S) */
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ap = ioremap(AP_BASE, PAGE_SIZE);
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sysc = ioremap(SYSC_BASE, PAGE_SIZE);
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writel(0, ap + APARMBAREA); /* 4k */
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writel(__pa(shmobile_boot_vector), sysc + SBAR);
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iounmap(sysc);
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iounmap(ap);
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/* setup sh73a0 specific SCU bits */
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shmobile_smp_scu_prepare_cpus(SH73A0_SCU_BASE, max_cpus);
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}
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const struct smp_operations sh73a0_smp_ops __initconst = {
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.smp_prepare_cpus = sh73a0_smp_prepare_cpus,
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.smp_boot_secondary = sh73a0_boot_secondary,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_can_disable = shmobile_smp_cpu_can_disable,
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.cpu_die = shmobile_smp_scu_cpu_die,
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.cpu_kill = shmobile_smp_scu_cpu_kill,
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#endif
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};
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