Adam Ford d567679f2b phy: freescale: fsl-samsung-hdmi: Clean up fld_tg_code calculation ... Currently, the calcuation for fld_tg_code is based on a lookup table, but there are gaps in the lookup table, and frequencies in these gaps may not properly use the correct divider. Based on the description of FLD_CK_DIV, the internal PLL frequency should be less than 50 MHz, so directly calcuate the value of FLD_CK_DIV from pixclk. This allow for proper calcuation of any pixel clock and eliminates a few gaps in the LUT. Since the value of the int_pllclk is in Hz, do the fixed-point math in Hz to achieve a more accurate value and reduces the complexity of the caluation to 24MHz * (256 / int_pllclk). Fixes: 6ad082bee9 ("phy: freescale: add Samsung HDMI PHY") Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Link: https://lore.kernel.org/r/20241026132014.73050-3-aford173@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>		2024-12-08 21:21:20 +05:30
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Kconfig	phy: freescale: imx8qm-hsio: Add i.MX8QM HSIO PHY driver support	2024-06-15 17:52:01 +05:30
Makefile	phy: freescale: imx8qm-hsio: Add i.MX8QM HSIO PHY driver support	2024-06-15 17:52:01 +05:30
phy-fsl-imx8-mipi-dphy.c	phy: freescale: phy-fsl-imx8-mipi-dphy: Fix alias name to use dashes	2024-02-07 11:19:40 +01:00
phy-fsl-imx8m-pcie.c	phy: freescale: imx8m-pcie: Do CMN_RST just before PHY PLL lock check	2024-10-21 23:18:29 +05:30
phy-fsl-imx8mq-usb.c	phy: fsl-imx8mq-usb: fix tuning parameter name	2024-08-04 22:12:26 +05:30
phy-fsl-imx8qm-hsio.c	phy: freescale: imx8qm-hsio: Include bitfield.h for FIELD_PREP	2024-06-20 21:56:11 +05:30
phy-fsl-imx8qm-lvds-phy.c	phy: Switch back to struct platform_driver::remove()	2024-10-17 20:33:03 +05:30
phy-fsl-lynx-28g.c	phy: Switch back to struct platform_driver::remove()	2024-10-17 20:33:03 +05:30
phy-fsl-samsung-hdmi.c	phy: freescale: fsl-samsung-hdmi: Clean up fld_tg_code calculation	2024-12-08 21:21:20 +05:30