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3adbf34273
This adds support for the SAR (Successive Approximation Register) ADC on the Amlogic Meson SoCs. The code is based on the public S805 (Meson8b) and S905 (GXBB) datasheets (see [0] and [1]), as well as by reading (various versions of) the vendor driver and by inspecting the registers on the vendor kernels of my testing-hardware. Currently the GXBB, GXL and GXM SoCs are supported. GXBB hardware has 10-bit ADC resolution, while GXL and GXM have 12-bit ADC resolution. The code was written to support older SoCs (Meson8 and Meson8b) as well, but due to lack of actual testing-hardware no of_device_id was added for these. Two "features" from the vendor driver are currently missing: - the vendor driver uses channel #7 for calibration (this improves the accuracy of the results - in my tests the results were less than 3% off without calibration compared to the vendor driver). Adding support for this should be easy, but is not required for most applications. - channel #6 is connected to the SoCs internal temperature sensor. Adding support for this is probably not so easy since (based on the u-boot sources) most SoC versions are using different registers and algorithms for the conversion from "ADC value" to temperature. Supported by the hardware but currently not supported by the driver: - reading multiple channels at the same time (the hardware has a FIFO buffer which stores multiple results) - continuous sampling (this would require a way to enable this individually because otherwise the ADC would be drawing power constantly) - interrupt support (similar to the vendor driver this new driver is polling the results. It is unclear if the IRQ-mode is supported on older (Meson6 or Meson8) hardware as well or if there are any errata) [0] http://dn.odroid.com/S805/Datasheet/S805_Datasheet%20V0.8%2020150126.pdf [1] http://dn.odroid.com/S905/DataSheet/S905_Public_Datasheet_V1.1.4.pdf Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>