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linux-next/drivers/phy/cadence
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Swapnil Jakhade 5398be49d7 phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) multilink config for TI J7200 
Add a separate compatible and registers map table for TI J7200.
TI J7200 uses Torrent SD0805 version which is a special version
derived from Torrent SD0801 with some differences in register
configurations.

Add register sequences for USXGMII(156.25MHz) + SGMII/QSGMII(100MHz)
multilink config for TI J7200. USXGMII uses PLL0 and SGMII/QSGMII
uses PLL1.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20240104133013.2911035-6-sjakhade@cadence.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-02-07 15:02:13 +01:00
..
cdns-dphy-rx.c
phy: Explicitly include correct DT includes
2023-07-17 11:52:56 +05:30
cdns-dphy.c
phy: Explicitly include correct DT includes
2023-07-17 11:52:56 +05:30
Kconfig
phy: cadence: Add Cadence D-PHY Rx driver
2022-03-02 19:54:42 +05:30
Makefile
phy: cadence: Add Cadence D-PHY Rx driver
2022-03-02 19:54:42 +05:30
phy-cadence-salvo.c
phy: cadence: salvo: Add cdns,usb2-disconnect-threshold-microvolt property
2023-05-19 23:14:06 +05:30
phy-cadence-sierra.c
phy: cadence: Sierra: Add single link SGMII register configuration
2023-07-12 22:27:44 +05:30
phy-cadence-torrent.c
phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) multilink config for TI J7200
2024-02-07 15:02:13 +01:00