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5aedb8d833
The existing code enables the Cadence IP interrupts after the bus reset sequence. The problem with this sequence is that it might be pre-empted, giving SoundWire devices time to sync and report as ATTACHED before the interrupts are enabled. In that case, the Cadence IP will not detect a state change and will not throw an interrupt to proceed with the enumeration of a Device0. In our overnight stress tests, we observed that a slight sub-millisecond delay in enabling interrupts after the reset was correlated with detection failures. This problem is more prevalent on the LunarLake silicon, likely due to SOC integration changes, but it was observed on earlier generations as well. This patch reverts the sequence, with the interrupts enabled before performing the bus reset. This removes the race condition and makes sure the Cadence IP is able to detect the presence of a Device0 in all cases. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com> Link: https://lore.kernel.org/r/20240805115003.88035-1-yung-chuan.liao@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org> |
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| .. | ||
| amd_init.c | ||
| amd_init.h | ||
| amd_manager.c | ||
| amd_manager.h | ||
| bus_type.c | ||
| bus.c | ||
| bus.h | ||
| cadence_master.c | ||
| cadence_master.h | ||
| debugfs.c | ||
| dmi-quirks.c | ||
| generic_bandwidth_allocation.c | ||
| intel_ace2x_debugfs.c | ||
| intel_ace2x.c | ||
| intel_auxdevice.c | ||
| intel_auxdevice.h | ||
| intel_bus_common.c | ||
| intel_init.c | ||
| intel.c | ||
| intel.h | ||
| irq.c | ||
| irq.h | ||
| Kconfig | ||
| Makefile | ||
| master.c | ||
| mipi_disco.c | ||
| qcom.c | ||
| slave.c | ||
| stream.c | ||
| sysfs_local.h | ||
| sysfs_slave_dpn.c | ||
| sysfs_slave.c | ||