Atish Patra 5d4acb7f2e RISC-V: Add FIRMWARE_READ_HI definition ... SBI v2.0 added another function to SBI PMU extension to read the upper bits of a counter with width larger than XLEN. Add the definition for that function. Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Clément Léger <cleger@rivosinc.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Atish Patra <atishp@rivosinc.com> Link: https://lore.kernel.org/r/20240420151741.962500-3-atishp@rivosinc.com Signed-off-by: Anup Patel <anup@brainfault.org>		2024-04-22 11:13:44 +05:30
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asm	RISC-V: Add FIRMWARE_READ_HI definition	2024-04-22 11:13:44 +05:30
uapi/asm	RISC-V: Update AT_VECTOR_SIZE_ARCH for new AT_MINSIGSTKSZ	2024-03-27 07:07:35 -07:00