Clément Léger 5ea6764d90 riscv: hwprobe: fix invalid sign extension for RISCV_HWPROBE_EXT_ZVFHMIN ... The current definition yields a negative 32bits signed value which result in a mask with is obviously incorrect. Replace it by using a 1ULL bit shift value to obtain a single set bit mask. Fixes: 5dadda5e6a ("riscv: hwprobe: export Zvfh[min] ISA extensions") Signed-off-by: Clément Léger <cleger@rivosinc.com> Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com> Link: https://lore.kernel.org/r/20240409143839.558784-1-cleger@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>		2024-04-23 07:06:44 -07:00
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asm	Merge patch the fixes from "riscv: 64-bit NOMMU fixes and enhancements"	2024-04-09 11:41:01 -07:00
uapi/asm	riscv: hwprobe: fix invalid sign extension for RISCV_HWPROBE_EXT_ZVFHMIN	2024-04-23 07:06:44 -07:00