Linus Torvalds 67d4c87945 Three fixes, one for the clk framework and two for clk drivers:
- Avoid an oops in possible_parent_show() by checking for no parent
    properly when a DT index based lookup is used
  - Handle errors returned from divider_ro_round_rate() in
    clk_stm32_composite_determine_rate()
  - Fix clk_ops::determine_rate() implementation of socfpga's gateclk_ops
    that was ruining uart output because the divider was forgotten about
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmU8aqARHHNib3lkQGtl
 cm5lbC5vcmcACgkQrQKIl8bklSV9Ew/+LbRC35Dp9liQnF/kpggdfvr1QKDP+bWz
 m6Kp9+ZQ6xWcVDV+0Fjbrs/0+QB5R8PS9U/GIQTGcMce0QJwoOnK2eWf22h1H59i
 h6nHAUBuDURAotPOIITKn/1McLkznvW+6XUOJ/yBFCsjlqspYlnR222RXOqZrhH1
 k/p1LE0dCXeiR07oJSoCsfVA5+ZzoFMRhpijoqjqOwMraMcX34CY3adOdM0WDvvH
 j10+9L0Bg5I/Y2NrP5ZfO2zmVVDFRrXuEfB6FlB54o9UDFLydCv6M96S1G4jmFcE
 s51mhoVhnxM+DG2Z9DNivPM5e8s1Q3yzvZko045kl86PqNwPw+LiezXwPSGcckKq
 5eD6+08yKXgDlHzvCj5/hXO3X/1+HthdxCXXim4/oe+1PYn0tm3gYbyJ/RNMbHRP
 x7fYslZXB0rIOV5owO2UfYWqZ3SGpxe+WHdEOnfxyePmx4tVPEccNGDyV4BFBDBE
 hUrDrnoJBT6rKFYyvt7V0s5y11tdNOA0/TrzkZuwXNPDWeBLGGpEm0iHcBakrGjP
 TWHgFYYdABxwIgcB6aMvzfj1n3vETQKWpCd0nBI73RKz+ZP9ZmVTThSe17yCSjoj
 PhozYiv09gZ0ZfJWj6WHj/roJKErkM+Vk+9aC6dM8N3/CyJ5GofXUSf9lrquqBoy
 /BFyI4siNO4=
 =Hghf
 -----END PGP SIGNATURE-----

Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk fixes from Stephen Boyd:
 "Three fixes, one for the clk framework and two for clk drivers:

   - Avoid an oops in possible_parent_show() by checking for no parent
     properly when a DT index based lookup is used

   - Handle errors returned from divider_ro_round_rate() in
     clk_stm32_composite_determine_rate()

   - Fix clk_ops::determine_rate() implementation of socfpga's
     gateclk_ops that was ruining uart output because the divider
     was forgotten about"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: stm32: Fix a signedness issue in clk_stm32_composite_determine_rate()
  clk: Sanitize possible_parent_show to Handle Return Value of of_clk_get_parent_name
  clk: socfpga: gate: Account for the divider in determine_rate
2023-10-27 16:52:51 -10:00
..
2022-03-11 18:22:15 -08:00
2022-10-03 12:34:32 -07:00
2023-06-29 15:28:33 -07:00