Kedareswara rao Appana 9495f26482 dmaengine: xilinx_vdma: Use readl_poll_timeout instead of do while loop's ...

It is sometimes necessary to poll a memory-mapped register until its
value satisfies some condition use convenience macros
that do this instead of do while loop's.

This patch updates the same in the driver.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>

2016-03-03 21:02:38 +05:30

..

Makefile

dma: Add Xilinx AXI Video Direct Memory Access Engine driver support

2014-04-30 10:44:13 +05:30

xilinx_vdma.c

dmaengine: xilinx_vdma: Use readl_poll_timeout instead of do while loop's

2016-03-03 21:02:38 +05:30