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cb26867ee2
This patch is output from updated omap hw data autogeneration scripts mostly contributed by Mike Turquette, with some later fixes from me. All data is added into a new cclock44xx_data.c file which will be switched with clock44xx_data.c file in a later patch. Signed-off-by: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: replace omap2_init_clksel_parent() with omap2_clksel_find_parent_index(); reflowed macros; updated DEFINE_STRUCT_CLK_HW_OMAP macro to include clkdm_name; use macros for clksel mux+gate clocks; many other fixes] [mturquette@ti.com: converted DPLL outputs to HSDIVIDER macro; trace_clk_div_ck has clkdm ops] Signed-off-by: Mike Turquette <mturquette@ti.com> [paul@pwsan.com: fixed the omap-gpmc.fck alias per commit a2e5b90b; fixed several checkpatch issues; moved the dpll3xxx.c clockdomain modifications to another patch] Signed-off-by: Paul Walmsley <paul@pwsan.com>
145 lines
4.8 KiB
C
145 lines
4.8 KiB
C
/*
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* linux/arch/arm/mach-omap2/clock_common_data.c
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*
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* Copyright (C) 2005-2009 Texas Instruments, Inc.
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* Copyright (C) 2004-2009 Nokia Corporation
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*
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* Contacts:
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* Richard Woodruff <r-woodruff2@ti.com>
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* Paul Walmsley
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This file contains clock data that is common to both the OMAP2xxx and
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* OMAP3xxx clock definition files.
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*/
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#include "clock.h"
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/* clksel_rate data common to 24xx/343x */
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const struct clksel_rate gpt_32k_rates[] = {
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{ .div = 1, .val = 0, .flags = RATE_IN_24XX | RATE_IN_3XXX },
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{ .div = 0 }
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};
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const struct clksel_rate gpt_sys_rates[] = {
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{ .div = 1, .val = 1, .flags = RATE_IN_24XX | RATE_IN_3XXX },
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{ .div = 0 }
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};
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const struct clksel_rate gfx_l3_rates[] = {
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{ .div = 1, .val = 1, .flags = RATE_IN_24XX | RATE_IN_3XXX },
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{ .div = 2, .val = 2, .flags = RATE_IN_24XX | RATE_IN_3XXX },
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{ .div = 3, .val = 3, .flags = RATE_IN_243X | RATE_IN_3XXX },
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{ .div = 4, .val = 4, .flags = RATE_IN_243X | RATE_IN_3XXX },
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{ .div = 0 }
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};
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const struct clksel_rate dsp_ick_rates[] = {
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{ .div = 1, .val = 1, .flags = RATE_IN_24XX },
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{ .div = 2, .val = 2, .flags = RATE_IN_24XX },
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{ .div = 3, .val = 3, .flags = RATE_IN_243X },
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{ .div = 0 },
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};
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/* clksel_rate blocks shared between OMAP44xx and AM33xx */
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const struct clksel_rate div_1_0_rates[] = {
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{ .div = 1, .val = 0, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 0 },
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};
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const struct clksel_rate div3_1to4_rates[] = {
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{ .div = 1, .val = 0, .flags = RATE_IN_4430 },
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{ .div = 2, .val = 1, .flags = RATE_IN_4430 },
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{ .div = 4, .val = 2, .flags = RATE_IN_4430 },
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{ .div = 0 },
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};
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const struct clksel_rate div_1_1_rates[] = {
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{ .div = 1, .val = 1, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 0 },
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};
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const struct clksel_rate div_1_2_rates[] = {
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{ .div = 1, .val = 2, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 0 },
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};
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const struct clksel_rate div_1_3_rates[] = {
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{ .div = 1, .val = 3, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 0 },
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};
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const struct clksel_rate div_1_4_rates[] = {
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{ .div = 1, .val = 4, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 0 },
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};
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const struct clksel_rate div31_1to31_rates[] = {
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{ .div = 1, .val = 1, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 2, .val = 2, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 3, .val = 3, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 4, .val = 4, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 5, .val = 5, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 6, .val = 6, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 7, .val = 7, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 8, .val = 8, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 9, .val = 9, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 10, .val = 10, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 11, .val = 11, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 12, .val = 12, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 13, .val = 13, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 14, .val = 14, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 15, .val = 15, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 16, .val = 16, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 17, .val = 17, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 18, .val = 18, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 19, .val = 19, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 20, .val = 20, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 21, .val = 21, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 22, .val = 22, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 23, .val = 23, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 24, .val = 24, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 25, .val = 25, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 26, .val = 26, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 27, .val = 27, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 28, .val = 28, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 29, .val = 29, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 30, .val = 30, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 31, .val = 31, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
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{ .div = 0 },
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};
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/* Clocks shared between various OMAP SoCs */
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#ifdef CONFIG_COMMON_CLK
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#include <linux/clk-private.h>
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static struct clk_ops dummy_ck_ops = {};
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struct clk dummy_ck = {
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.name = "dummy_clk",
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.ops = &dummy_ck_ops,
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.flags = CLK_IS_BASIC,
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};
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#else
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struct clk virt_19200000_ck = {
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.name = "virt_19200000_ck",
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.ops = &clkops_null,
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.rate = 19200000,
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};
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struct clk virt_26000000_ck = {
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.name = "virt_26000000_ck",
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.ops = &clkops_null,
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.rate = 26000000,
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};
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#endif
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