Elaine Zhang b75f38451a clk: rockchip: add some critical clocks for rv1108 SoC
the bus/periph/nclk_ddrupctl/pclk_ddrmon/pclk_acodecphy/pclk_pmu
no driver to handle them,
Chip design requirements for these clock to always on.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-08-08 17:28:57 +02:00
..
2017-06-19 17:14:11 -07:00
2016-03-02 17:44:59 -08:00
2016-12-15 15:39:02 -08:00
2016-04-15 16:50:04 -07:00
2016-11-16 11:19:20 -08:00
2017-06-15 10:48:08 +03:00
2017-06-19 19:02:42 -07:00
2016-03-02 17:48:26 -08:00
2017-06-02 15:37:45 -07:00
2016-11-09 12:05:50 -08:00
2016-10-23 10:18:45 -07:00