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linux-next/arch/riscv/boot
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Yash Shah cfda8617e2 riscv: dts: Add DT support for SiFive L2 cache controller 
Add the L2 cache controller DT node in SiFive FU540 soc-specific DT file

Signed-off-by: Yash Shah <yash.shah@sifive.com>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
2020-01-03 00:56:23 -08:00
..
dts
riscv: dts: Add DT support for SiFive L2 cache controller
2020-01-03 00:56:23 -08:00
.gitignore
RISC-V: Build flat and compressed kernel images
2018-11-20 05:19:09 -08:00
install.sh
RISC-V: Build flat and compressed kernel images
2018-11-20 05:19:09 -08:00
loader.lds.S
riscv: provide a flat image loader
2019-11-17 15:17:39 -08:00
loader.S
riscv: provide a flat image loader
2019-11-17 15:17:39 -08:00
Makefile
riscv: Fix build dependency for loader
2019-12-08 20:19:30 -08:00