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This documents EL3 requirements for FEAT_PMUv3. The register field MDCR_EL3 .TPM needs to be cleared for accesses into PMU registers without any trap being generated into EL3. PMUv3 registers like PMCCFILTR_EL0, PMCCNTR_EL0 PMCNTENCLR_EL0, PMCNTENSET_EL0, PMCR_EL0, PMEVCNTR<n>_EL0, PMEVTYPER<n>_EL0 etc are already being accessed for perf HW PMU implementation. Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Jonathan Corbet <corbet@lwn.net> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-doc@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Link: https://lore.kernel.org/r/20241211065425.1106683-3-anshuman.khandual@arm.com Signed-off-by: Will Deacon <will@kernel.org> |
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.. | ||
acpi_object_usage.rst | ||
amu.rst | ||
arm-acpi.rst | ||
arm-cca.rst | ||
asymmetric-32bit.rst | ||
booting.rst | ||
cpu-feature-registers.rst | ||
cpu-hotplug.rst | ||
elf_hwcaps.rst | ||
features.rst | ||
gcs.rst | ||
hugetlbpage.rst | ||
index.rst | ||
kasan-offsets.sh | ||
kdump.rst | ||
legacy_instructions.rst | ||
memory-tagging-extension.rst | ||
memory.rst | ||
mops.rst | ||
perf.rst | ||
pointer-authentication.rst | ||
ptdump.rst | ||
silicon-errata.rst | ||
sme.rst | ||
sve.rst | ||
tagged-address-abi.rst | ||
tagged-pointers.rst |