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Add drivers for IMGSYS, MFGCFG, VDECSYS and VENCSYS clocks and resets on MT6735. Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com> Link: https://lore.kernel.org/r/20241106111402.200940-3-y.oudjana@protonmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
80 lines
2.2 KiB
C
80 lines
2.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2022 Yassine Oudjana <y.oudjana@protonmail.com>
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*/
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#include <linux/clk-provider.h>
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#include <linux/platform_device.h>
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#include "clk-gate.h"
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#include "clk-mtk.h"
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#include <dt-bindings/clock/mediatek,mt6735-vdecsys.h>
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#include <dt-bindings/reset/mediatek,mt6735-vdecsys.h>
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#define VDEC_CKEN_SET 0x00
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#define VDEC_CKEN_CLR 0x04
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#define SMI_LARB1_CKEN_SET 0x08
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#define SMI_LARB1_CKEN_CLR 0x0c
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#define VDEC_RESETB_CON 0x10
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#define SMI_LARB1_RESETB_CON 0x14
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#define RST_NR_PER_BANK 32
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static struct mtk_gate_regs vdec_cg_regs = {
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.set_ofs = VDEC_CKEN_SET,
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.clr_ofs = VDEC_CKEN_CLR,
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.sta_ofs = VDEC_CKEN_SET,
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};
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static struct mtk_gate_regs smi_larb1_cg_regs = {
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.set_ofs = SMI_LARB1_CKEN_SET,
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.clr_ofs = SMI_LARB1_CKEN_CLR,
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.sta_ofs = SMI_LARB1_CKEN_SET,
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};
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static const struct mtk_gate vdecsys_gates[] = {
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GATE_MTK(CLK_VDEC_VDEC, "vdec", "vdec_sel", &vdec_cg_regs, 0, &mtk_clk_gate_ops_setclr_inv),
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GATE_MTK(CLK_VDEC_SMI_LARB1, "smi_larb1", "vdec_sel", &smi_larb1_cg_regs, 0, &mtk_clk_gate_ops_setclr_inv),
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};
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static u16 vdecsys_rst_bank_ofs[] = { VDEC_RESETB_CON, SMI_LARB1_RESETB_CON };
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static u16 vdecsys_rst_idx_map[] = {
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[MT6735_VDEC_RST0_VDEC] = 0 * RST_NR_PER_BANK + 0,
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[MT6735_VDEC_RST1_SMI_LARB1] = 1 * RST_NR_PER_BANK + 0,
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};
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static const struct mtk_clk_rst_desc vdecsys_resets = {
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.version = MTK_RST_SIMPLE,
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.rst_bank_ofs = vdecsys_rst_bank_ofs,
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.rst_bank_nr = ARRAY_SIZE(vdecsys_rst_bank_ofs),
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.rst_idx_map = vdecsys_rst_idx_map,
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.rst_idx_map_nr = ARRAY_SIZE(vdecsys_rst_idx_map)
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};
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static const struct mtk_clk_desc vdecsys_clks = {
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.clks = vdecsys_gates,
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.num_clks = ARRAY_SIZE(vdecsys_gates),
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.rst_desc = &vdecsys_resets
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};
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static const struct of_device_id of_match_mt6735_vdecsys[] = {
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{ .compatible = "mediatek,mt6735-vdecsys", .data = &vdecsys_clks },
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{ /* sentinel */ }
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};
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static struct platform_driver clk_mt6735_vdecsys = {
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.probe = mtk_clk_simple_probe,
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.remove = mtk_clk_simple_remove,
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.driver = {
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.name = "clk-mt6735-vdecsys",
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.of_match_table = of_match_mt6735_vdecsys,
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},
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};
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module_platform_driver(clk_mt6735_vdecsys);
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MODULE_AUTHOR("Yassine Oudjana <y.oudjana@protonmail.com>");
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MODULE_DESCRIPTION("MediaTek MT6735 vdecsys clock and reset driver");
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MODULE_LICENSE("GPL");
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