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9f599f351e
The vpu supports encoder and decoder. it needs vpu core to handle it. core will run either encoder or decoder firmware. This driver is for support the vpu core. Signed-off-by: Ming Qian <ming.qian@nxp.com> Signed-off-by: Shijie Qin <shijie.qin@nxp.com> Signed-off-by: Zhou Peng <eagle.zhou@nxp.com> Tested-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
69 lines
947 B
C
69 lines
947 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright 2020-2021 NXP
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*/
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#ifndef _AMPHION_VPU_CODEC_H
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#define _AMPHION_VPU_CODEC_H
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struct vpu_encode_params {
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u32 input_format;
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u32 codec_format;
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u32 profile;
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u32 tier;
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u32 level;
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struct v4l2_fract frame_rate;
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u32 src_stride;
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u32 src_width;
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u32 src_height;
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struct v4l2_rect crop;
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u32 out_width;
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u32 out_height;
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u32 gop_length;
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u32 bframes;
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u32 rc_enable;
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u32 rc_mode;
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u32 bitrate;
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u32 bitrate_min;
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u32 bitrate_max;
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u32 i_frame_qp;
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u32 p_frame_qp;
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u32 b_frame_qp;
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u32 qp_min;
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u32 qp_max;
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u32 qp_min_i;
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u32 qp_max_i;
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struct {
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u32 enable;
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u32 idc;
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u32 width;
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u32 height;
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} sar;
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struct {
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u32 primaries;
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u32 transfer;
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u32 matrix;
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u32 full_range;
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} color;
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};
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struct vpu_decode_params {
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u32 codec_format;
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u32 output_format;
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u32 b_dis_reorder;
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u32 b_non_frame;
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u32 frame_count;
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u32 end_flag;
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struct {
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u32 base;
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u32 size;
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} udata;
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};
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#endif
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