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History

Andy Walls e283d78083 V4L/DVB (13090): cx25840: Init PLLs properly for CX2388[578] A/V cores

The SYS and AUX PLLs need to be initialized to different values based on
the chip: CX23885, CX23887, CX23888, as each uses a different crystal
frequency: 28.6363 MHz, 25.0 MHz, 50.0 MHz.

Signed-off-by: Andy Walls <awalls@radix.net>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>

2009-12-05 18:40:18 -02:00

cx25840-audio.c

V4L/DVB (13089): cx25840: Separate set_audclk_freq functionality for the different chips

2009-12-05 18:40:18 -02:00

cx25840-core.c

V4L/DVB (13090): cx25840: Init PLLs properly for CX2388[578] A/V cores

2009-12-05 18:40:18 -02:00

cx25840-core.h

V4L/DVB (13088): cx25840: Convert chip/core family checks to static inline functions

2009-12-05 18:40:17 -02:00

cx25840-firmware.c

V4L/DVB (13088): cx25840: Convert chip/core family checks to static inline functions