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eb36e520f4
The GMAC of Loongson chips cannot insert the correct 1.5-2ns delay. So we need the PHY to insert internal delays for both transmit and receive data lines from/to the PHY device. Fix this by changing the "phy-mode" from "rgmii" to "rgmii-id" in dts. Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
89 lines
1.1 KiB
Plaintext
89 lines
1.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2023 Loongson Technology Corporation Limited
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*/
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/dts-v1/;
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#include "loongson-2k0500.dtsi"
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/ {
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compatible = "loongson,ls2k0500-ref", "loongson,ls2k0500";
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model = "Loongson-2K0500 Reference Board";
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aliases {
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ethernet0 = &gmac0;
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ethernet1 = &gmac1;
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@200000 {
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device_type = "memory";
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reg = <0x0 0x00200000 0x0 0x0ee00000>,
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<0x0 0x90000000 0x0 0x60000000>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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linux,cma {
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compatible = "shared-dma-pool";
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reusable;
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size = <0x0 0x2000000>;
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linux,cma-default;
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};
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};
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};
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&gmac0 {
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status = "okay";
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phy-mode = "rgmii-id";
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bus_id = <0x0>;
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};
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&gmac1 {
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status = "okay";
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phy-mode = "rgmii-id";
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bus_id = <0x1>;
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};
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&i2c0 {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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eeprom@57 {
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compatible = "atmel,24c16";
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reg = <0x57>;
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pagesize = <16>;
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};
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};
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&ehci0 {
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status = "okay";
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};
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&ohci0 {
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status = "okay";
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};
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&sata {
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status = "okay";
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};
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&uart0 {
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status = "okay";
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};
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&rtc0 {
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status = "okay";
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};
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