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70d3cf76f9
Add dt-bindings documentation of ECC for MediaTek MT7986 SoC platform. Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230201021500.26769-5-xiangsheng.hou@mediatek.com
64 lines
1.4 KiB
YAML
64 lines
1.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mtd/mediatek,nand-ecc-engine.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MediaTek(MTK) SoCs NAND ECC engine
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maintainers:
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- Xiangsheng Hou <xiangsheng.hou@mediatek.com>
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description: |
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MTK NAND ECC engine can cowork with MTK raw NAND and SPI NAND controller.
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properties:
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compatible:
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enum:
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- mediatek,mt2701-ecc
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- mediatek,mt2712-ecc
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- mediatek,mt7622-ecc
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- mediatek,mt7986-ecc
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reg:
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items:
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- description: Base physical address and size of ECC.
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interrupts:
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items:
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- description: ECC interrupt
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clocks:
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maxItems: 1
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clock-names:
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const: nfiecc_clk
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/mt2701-clk.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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bch: ecc@1100e000 {
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compatible = "mediatek,mt2701-ecc";
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reg = <0 0x1100e000 0 0x1000>;
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interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&pericfg CLK_PERI_NFI_ECC>;
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clock-names = "nfiecc_clk";
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};
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};
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