2021-06-18 16:37:12 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* I2C driver for Renesas Synchronization Management Unit (SMU) devices.
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*
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* Copyright (C) 2021 Integrated Device Technology, Inc., a Renesas Company.
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*/
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#include <linux/i2c.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/mfd/core.h>
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#include <linux/mfd/rsmu.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include "rsmu.h"
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/*
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2023-03-27 18:39:53 +00:00
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* 32-bit register address: the lower 8 bits of the register address come
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* from the offset addr byte and the upper 24 bits come from the page register.
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2021-06-18 16:37:12 +00:00
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*/
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2023-03-27 18:39:53 +00:00
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#define RSMU_CM_PAGE_ADDR 0xFC
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#define RSMU_CM_PAGE_MASK 0xFFFFFF00
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#define RSMU_CM_ADDRESS_MASK 0x000000FF
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2021-06-18 16:37:12 +00:00
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/*
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* 15-bit register address: the lower 7 bits of the register address come
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* from the offset addr byte and the upper 8 bits come from the page register.
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*/
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#define RSMU_SABRE_PAGE_ADDR 0x7F
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#define RSMU_SABRE_PAGE_WINDOW 128
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2024-05-01 16:32:55 +00:00
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typedef int (*rsmu_rw_device)(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u8 bytes);
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2021-06-18 16:37:12 +00:00
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static const struct regmap_range_cfg rsmu_sabre_range_cfg[] = {
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{
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.range_min = 0,
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.range_max = 0x400,
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.selector_reg = RSMU_SABRE_PAGE_ADDR,
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.selector_mask = 0xFF,
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.selector_shift = 0,
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.window_start = 0,
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.window_len = RSMU_SABRE_PAGE_WINDOW,
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}
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};
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2023-03-27 18:39:53 +00:00
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static bool rsmu_sabre_volatile_reg(struct device *dev, unsigned int reg)
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2021-06-18 16:37:12 +00:00
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{
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switch (reg) {
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2023-03-27 18:39:53 +00:00
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case RSMU_SABRE_PAGE_ADDR:
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2021-06-18 16:37:12 +00:00
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return false;
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default:
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return true;
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}
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}
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2024-05-01 16:32:55 +00:00
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static int rsmu_smbus_i2c_write_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u8 bytes)
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{
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struct i2c_client *client = to_i2c_client(rsmu->dev);
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return i2c_smbus_write_i2c_block_data(client, reg, bytes, buf);
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}
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static int rsmu_smbus_i2c_read_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u8 bytes)
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{
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struct i2c_client *client = to_i2c_client(rsmu->dev);
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int ret;
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ret = i2c_smbus_read_i2c_block_data(client, reg, bytes, buf);
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if (ret == bytes)
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return 0;
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else if (ret < 0)
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return ret;
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else
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return -EIO;
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}
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static int rsmu_i2c_read_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u8 bytes)
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2021-06-18 16:37:12 +00:00
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{
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2023-03-27 18:39:53 +00:00
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struct i2c_client *client = to_i2c_client(rsmu->dev);
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struct i2c_msg msg[2];
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int cnt;
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msg[0].addr = client->addr;
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msg[0].flags = 0;
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msg[0].len = 1;
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msg[0].buf = ®
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msg[1].addr = client->addr;
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msg[1].flags = I2C_M_RD;
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msg[1].len = bytes;
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msg[1].buf = buf;
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cnt = i2c_transfer(client->adapter, msg, 2);
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if (cnt < 0) {
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dev_err(rsmu->dev, "i2c_transfer failed at addr: %04x!", reg);
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return cnt;
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} else if (cnt != 2) {
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dev_err(rsmu->dev,
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"i2c_transfer sent only %d of 2 messages", cnt);
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return -EIO;
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}
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return 0;
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}
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2024-05-01 16:32:55 +00:00
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static int rsmu_i2c_write_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u8 bytes)
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2023-03-27 18:39:53 +00:00
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{
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struct i2c_client *client = to_i2c_client(rsmu->dev);
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2024-05-01 16:32:55 +00:00
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/* we add 1 byte for device register */
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u8 msg[RSMU_MAX_WRITE_COUNT + 1];
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2023-03-27 18:39:53 +00:00
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int cnt;
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if (bytes > RSMU_MAX_WRITE_COUNT)
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return -EINVAL;
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msg[0] = reg;
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memcpy(&msg[1], buf, bytes);
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cnt = i2c_master_send(client, msg, bytes + 1);
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if (cnt < 0) {
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dev_err(&client->dev,
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"i2c_master_send failed at addr: %04x!", reg);
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return cnt;
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2021-06-18 16:37:12 +00:00
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}
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2023-03-27 18:39:53 +00:00
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return 0;
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}
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2024-05-01 16:32:55 +00:00
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static int rsmu_write_page_register(struct rsmu_ddata *rsmu, u32 reg,
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rsmu_rw_device rsmu_write_device)
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2023-03-27 18:39:53 +00:00
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{
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u32 page = reg & RSMU_CM_PAGE_MASK;
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u8 buf[4];
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int err;
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/* Do not modify offset register for none-scsr registers */
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if (reg < RSMU_CM_SCSR_BASE)
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return 0;
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/* Simply return if we are on the same page */
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if (rsmu->page == page)
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return 0;
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buf[0] = 0x0;
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buf[1] = (u8)((page >> 8) & 0xFF);
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buf[2] = (u8)((page >> 16) & 0xFF);
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buf[3] = (u8)((page >> 24) & 0xFF);
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err = rsmu_write_device(rsmu, RSMU_CM_PAGE_ADDR, buf, sizeof(buf));
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if (err)
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dev_err(rsmu->dev, "Failed to set page offset 0x%x\n", page);
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else
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/* Remember the last page */
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rsmu->page = page;
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return err;
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}
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2024-05-01 16:32:55 +00:00
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static int rsmu_i2c_reg_read(void *context, unsigned int reg, unsigned int *val)
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2023-03-27 18:39:53 +00:00
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{
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struct rsmu_ddata *rsmu = i2c_get_clientdata((struct i2c_client *)context);
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u8 addr = (u8)(reg & RSMU_CM_ADDRESS_MASK);
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int err;
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2024-05-01 16:32:55 +00:00
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err = rsmu_write_page_register(rsmu, reg, rsmu_i2c_write_device);
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2023-03-27 18:39:53 +00:00
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if (err)
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return err;
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2024-05-01 16:32:55 +00:00
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err = rsmu_i2c_read_device(rsmu, addr, (u8 *)val, 1);
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2023-03-27 18:39:53 +00:00
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if (err)
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dev_err(rsmu->dev, "Failed to read offset address 0x%x\n", addr);
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return err;
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}
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2024-05-01 16:32:55 +00:00
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static int rsmu_i2c_reg_write(void *context, unsigned int reg, unsigned int val)
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2023-03-27 18:39:53 +00:00
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{
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struct rsmu_ddata *rsmu = i2c_get_clientdata((struct i2c_client *)context);
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u8 addr = (u8)(reg & RSMU_CM_ADDRESS_MASK);
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u8 data = (u8)val;
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int err;
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2024-05-01 16:32:55 +00:00
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err = rsmu_write_page_register(rsmu, reg, rsmu_i2c_write_device);
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2023-03-27 18:39:53 +00:00
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if (err)
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return err;
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2024-05-01 16:32:55 +00:00
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err = rsmu_i2c_write_device(rsmu, addr, &data, 1);
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2023-03-27 18:39:53 +00:00
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if (err)
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dev_err(rsmu->dev,
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"Failed to write offset address 0x%x\n", addr);
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return err;
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2021-06-18 16:37:12 +00:00
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}
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2024-05-01 16:32:55 +00:00
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static int rsmu_smbus_i2c_reg_read(void *context, unsigned int reg, unsigned int *val)
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{
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struct rsmu_ddata *rsmu = i2c_get_clientdata((struct i2c_client *)context);
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u8 addr = (u8)(reg & RSMU_CM_ADDRESS_MASK);
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int err;
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err = rsmu_write_page_register(rsmu, reg, rsmu_smbus_i2c_write_device);
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if (err)
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return err;
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err = rsmu_smbus_i2c_read_device(rsmu, addr, (u8 *)val, 1);
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if (err)
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dev_err(rsmu->dev, "Failed to read offset address 0x%x\n", addr);
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return err;
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}
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static int rsmu_smbus_i2c_reg_write(void *context, unsigned int reg, unsigned int val)
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{
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struct rsmu_ddata *rsmu = i2c_get_clientdata((struct i2c_client *)context);
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u8 addr = (u8)(reg & RSMU_CM_ADDRESS_MASK);
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u8 data = (u8)val;
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int err;
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err = rsmu_write_page_register(rsmu, reg, rsmu_smbus_i2c_write_device);
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if (err)
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return err;
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err = rsmu_smbus_i2c_write_device(rsmu, addr, &data, 1);
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if (err)
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dev_err(rsmu->dev,
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"Failed to write offset address 0x%x\n", addr);
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return err;
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}
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static const struct regmap_config rsmu_i2c_cm_regmap_config = {
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2023-03-27 18:39:53 +00:00
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.reg_bits = 32,
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2021-06-18 16:37:12 +00:00
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.val_bits = 8,
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2023-03-27 18:39:53 +00:00
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.max_register = 0x20120000,
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2024-05-01 16:32:55 +00:00
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.reg_read = rsmu_i2c_reg_read,
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.reg_write = rsmu_i2c_reg_write,
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.cache_type = REGCACHE_NONE,
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};
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static const struct regmap_config rsmu_smbus_i2c_cm_regmap_config = {
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.reg_bits = 32,
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.val_bits = 8,
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.max_register = 0x20120000,
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.reg_read = rsmu_smbus_i2c_reg_read,
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.reg_write = rsmu_smbus_i2c_reg_write,
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2023-03-27 18:39:53 +00:00
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.cache_type = REGCACHE_NONE,
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2021-06-18 16:37:12 +00:00
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};
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static const struct regmap_config rsmu_sabre_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = 0x400,
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.ranges = rsmu_sabre_range_cfg,
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.num_ranges = ARRAY_SIZE(rsmu_sabre_range_cfg),
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.volatile_reg = rsmu_sabre_volatile_reg,
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2024-02-06 07:13:10 +00:00
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.cache_type = REGCACHE_MAPLE,
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2021-06-18 16:37:12 +00:00
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.can_multi_write = true,
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};
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static const struct regmap_config rsmu_sl_regmap_config = {
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.reg_bits = 16,
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.val_bits = 8,
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.reg_format_endian = REGMAP_ENDIAN_BIG,
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2023-03-27 18:39:53 +00:00
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.max_register = 0x340,
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2021-06-18 16:37:12 +00:00
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.cache_type = REGCACHE_NONE,
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.can_multi_write = true,
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};
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2023-03-31 07:03:44 +00:00
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static int rsmu_i2c_probe(struct i2c_client *client)
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2021-06-18 16:37:12 +00:00
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{
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2023-03-31 07:03:44 +00:00
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const struct i2c_device_id *id = i2c_client_get_device_id(client);
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2021-06-18 16:37:12 +00:00
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const struct regmap_config *cfg;
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struct rsmu_ddata *rsmu;
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int ret;
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rsmu = devm_kzalloc(&client->dev, sizeof(*rsmu), GFP_KERNEL);
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if (!rsmu)
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return -ENOMEM;
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i2c_set_clientdata(client, rsmu);
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rsmu->dev = &client->dev;
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rsmu->type = (enum rsmu_type)id->driver_data;
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switch (rsmu->type) {
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case RSMU_CM:
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2024-05-01 16:32:55 +00:00
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if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
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cfg = &rsmu_i2c_cm_regmap_config;
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} else if (i2c_check_functionality(client->adapter,
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I2C_FUNC_SMBUS_I2C_BLOCK)) {
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cfg = &rsmu_smbus_i2c_cm_regmap_config;
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} else {
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dev_err(rsmu->dev, "Unsupported i2c adapter\n");
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return -ENOTSUPP;
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}
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2021-06-18 16:37:12 +00:00
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break;
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case RSMU_SABRE:
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cfg = &rsmu_sabre_regmap_config;
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break;
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case RSMU_SL:
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cfg = &rsmu_sl_regmap_config;
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break;
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default:
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dev_err(rsmu->dev, "Unsupported RSMU device type: %d\n", rsmu->type);
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return -ENODEV;
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}
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2023-03-27 18:39:53 +00:00
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if (rsmu->type == RSMU_CM)
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rsmu->regmap = devm_regmap_init(&client->dev, NULL, client, cfg);
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else
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rsmu->regmap = devm_regmap_init_i2c(client, cfg);
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2024-05-01 16:32:55 +00:00
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2021-06-18 16:37:12 +00:00
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|
if (IS_ERR(rsmu->regmap)) {
|
|
|
|
ret = PTR_ERR(rsmu->regmap);
|
|
|
|
dev_err(rsmu->dev, "Failed to allocate register map: %d\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
return rsmu_core_init(rsmu);
|
|
|
|
}
|
|
|
|
|
2022-08-15 08:02:30 +00:00
|
|
|
static void rsmu_i2c_remove(struct i2c_client *client)
|
2021-06-18 16:37:12 +00:00
|
|
|
{
|
|
|
|
struct rsmu_ddata *rsmu = i2c_get_clientdata(client);
|
|
|
|
|
|
|
|
rsmu_core_exit(rsmu);
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct i2c_device_id rsmu_i2c_id[] = {
|
|
|
|
{ "8a34000", RSMU_CM },
|
|
|
|
{ "8a34001", RSMU_CM },
|
|
|
|
{ "82p33810", RSMU_SABRE },
|
|
|
|
{ "82p33811", RSMU_SABRE },
|
|
|
|
{ "8v19n850", RSMU_SL },
|
|
|
|
{ "8v19n851", RSMU_SL },
|
|
|
|
{}
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(i2c, rsmu_i2c_id);
|
|
|
|
|
|
|
|
static const struct of_device_id rsmu_i2c_of_match[] = {
|
|
|
|
{ .compatible = "idt,8a34000", .data = (void *)RSMU_CM },
|
|
|
|
{ .compatible = "idt,8a34001", .data = (void *)RSMU_CM },
|
|
|
|
{ .compatible = "idt,82p33810", .data = (void *)RSMU_SABRE },
|
|
|
|
{ .compatible = "idt,82p33811", .data = (void *)RSMU_SABRE },
|
|
|
|
{ .compatible = "idt,8v19n850", .data = (void *)RSMU_SL },
|
|
|
|
{ .compatible = "idt,8v19n851", .data = (void *)RSMU_SL },
|
|
|
|
{}
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, rsmu_i2c_of_match);
|
|
|
|
|
|
|
|
static struct i2c_driver rsmu_i2c_driver = {
|
|
|
|
.driver = {
|
|
|
|
.name = "rsmu-i2c",
|
2023-08-08 13:00:16 +00:00
|
|
|
.of_match_table = rsmu_i2c_of_match,
|
2021-06-18 16:37:12 +00:00
|
|
|
},
|
2023-05-15 18:27:52 +00:00
|
|
|
.probe = rsmu_i2c_probe,
|
2021-06-18 16:37:12 +00:00
|
|
|
.remove = rsmu_i2c_remove,
|
|
|
|
.id_table = rsmu_i2c_id,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init rsmu_i2c_init(void)
|
|
|
|
{
|
|
|
|
return i2c_add_driver(&rsmu_i2c_driver);
|
|
|
|
}
|
|
|
|
subsys_initcall(rsmu_i2c_init);
|
|
|
|
|
|
|
|
static void __exit rsmu_i2c_exit(void)
|
|
|
|
{
|
|
|
|
i2c_del_driver(&rsmu_i2c_driver);
|
|
|
|
}
|
|
|
|
module_exit(rsmu_i2c_exit);
|
|
|
|
|
|
|
|
MODULE_DESCRIPTION("Renesas SMU I2C driver");
|
|
|
|
MODULE_LICENSE("GPL");
|