linux-stable/tools/perf/builtin-c2c.c

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License cleanup: add SPDX GPL-2.0 license identifier to files with no license Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 14:07:57 +00:00
// SPDX-License-Identifier: GPL-2.0
/*
* This is rewrite of original c2c tool introduced in here:
* http://lwn.net/Articles/588866/
*
* The original tool was changed to fit in current perf state.
*
* Original authors:
* Don Zickus <dzickus@redhat.com>
* Dick Fowles <fowles@inreach.com>
* Joe Mario <jmario@redhat.com>
*/
#include <errno.h>
#include <inttypes.h>
#include <linux/compiler.h>
perf session: Return error code for perf_session__new() function on failure This patch is to return error code of perf_new_session function on failure instead of NULL. Test Results: Before Fix: $ perf c2c report -input failed to open nput: No such file or directory $ echo $? 0 $ After Fix: $ perf c2c report -input failed to open nput: No such file or directory $ echo $? 254 $ Committer notes: Fix 'perf tests topology' case, where we use that TEST_ASSERT_VAL(..., session), i.e. we need to pass zero in case of failure, which was the case before when NULL was returned by perf_session__new() for failure, but now we need to negate the result of IS_ERR(session) to respect that TEST_ASSERT_VAL) expectation of zero meaning failure. Reported-by: Nageswara R Sastry <rnsastry@linux.vnet.ibm.com> Signed-off-by: Mamatha Inamdar <mamatha4@linux.vnet.ibm.com> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Tested-by: Nageswara R Sastry <rnsastry@linux.vnet.ibm.com> Acked-by: Ravi Bangoria <ravi.bangoria@linux.ibm.com> Reviewed-by: Jiri Olsa <jolsa@redhat.com> Reviewed-by: Mukesh Ojha <mojha@codeaurora.org> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Alexey Budankov <alexey.budankov@linux.intel.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jeremie Galarneau <jeremie.galarneau@efficios.com> Cc: Kate Stewart <kstewart@linuxfoundation.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Shawn Landden <shawn@git.icu> Cc: Song Liu <songliubraving@fb.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Tzvetomir Stoyanov <tstoyanov@vmware.com> Link: http://lore.kernel.org/lkml/20190822071223.17892.45782.stgit@localhost.localdomain Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2019-08-22 07:20:49 +00:00
#include <linux/err.h>
#include <linux/kernel.h>
#include <linux/stringify.h>
#include <linux/zalloc.h>
#include <asm/bug.h>
#include <sys/param.h>
#include "debug.h"
#include "builtin.h"
#include <perf/cpumap.h>
#include <subcmd/pager.h>
#include <subcmd/parse-options.h>
#include "map_symbol.h"
perf c2c: Add record subcommand Adding c2c record subcommand. It setups options related to HITM cacheline analysis and calls standard perf record command. $ sudo perf c2c record -v -- -a calling: record -W -d --sample-cpu -e cpu/mem-loads,ldlat=30/P -e cpu/mem-stores/P -a ... It produces perf.data, which is to be reported by perf c2c report, that comes in following patches. Details are described in the man page, which is added in one of the following patches. Committer notes: Testing it: # perf c2c record -a sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.050 MB perf.data (412 samples) ] # ls -la perf.data -rw-------. 1 root root 5301752 Oct 4 13:32 perf.data # perf evlist cpu/mem-loads,ldlat=30/P cpu/mem-stores/P # perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 # # perf report --stdio <SNIP> # Total Lost Samples: 14 # Samples: 216 of event 'cpu/mem-loads,ldlat=30/P' # Event count (approx.): 15207 # Overhead Symbol Shared Object # ........ ..................................... ............................ 10.32% [k] update_blocked_averages [kernel.vmlinux] 3.43% [.] 0x00000000001a2122 qemu-system-x86_64 (deleted) 2.52% [k] enqueue_entity [kernel.vmlinux] 1.88% [.] g_main_context_query libglib-2.0.so.0.4800.2 1.86% [k] __schedule [kernel.vmlinux] <SNIP> # Samples: 196 of event 'cpu/mem-stores/P' # Event count (approx.): 14771346 # Overhead Symbol Shared Object # ........ ................................... ............................ 13.91% [k] intel_idle [kernel.vmlinux] 3.02% [.] 0x00000000022f06ea chrome 2.94% [.] 0x00000000001a1b4c qemu-system-x86_64 (deleted) 2.94% [.] 0x000000000019d8e4 qemu-system-x86_64 (deleted) 2.38% [.] 0x00000000001a1c52 qemu-system-x86_64 (deleted) <SNIP> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1474558645-19956-12-git-send-email-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-22 15:36:39 +00:00
#include "mem-events.h"
#include "session.h"
#include "hist.h"
#include "sort.h"
#include "tool.h"
#include "cacheline.h"
#include "data.h"
#include "event.h"
#include "evlist.h"
#include "evsel.h"
#include "ui/browsers/hists.h"
#include "thread.h"
perf c2c report: Display node for cacheline address Adding the NUMA node info for the data cacheline. Adding the new column to both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto". Note the new 'Node' column next to the 'Cacheline'. $ perf c2c report --stdio ================================================= Shared Data Cache Line Table ================================================= # # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 ... Note the new 'Node' column next to the 'Offset'. ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Using the mem2node object to get the NUMA node data. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-8-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:40 +00:00
#include "mem2node.h"
#include "mem-info.h"
#include "symbol.h"
#include "ui/ui.h"
#include "ui/progress.h"
perf pmu: Separate pmu and pmus Separate and hide the pmus list in pmus.[ch]. Move pmus functionality out of pmu.[ch] into pmus.[ch] renaming pmus functions which were prefixed perf_pmu__ to perf_pmus__. Reviewed-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Ali Saidi <alisaidi@amazon.com> Cc: Athira Rajeev <atrajeev@linux.vnet.ibm.com> Cc: Dmitrii Dolgov <9erthalion6@gmail.com> Cc: Huacai Chen <chenhuacai@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jing Zhang <renyu.zj@linux.alibaba.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.g.garry@oracle.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Kang Minchul <tegongkang@gmail.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Madhavan Srinivasan <maddy@linux.ibm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Ming Wang <wangming01@loongson.cn> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ravi Bangoria <ravi.bangoria@amd.com> Cc: Rob Herring <robh@kernel.org> Cc: Sandipan Das <sandipan.das@amd.com> Cc: Sean Christopherson <seanjc@google.com> Cc: Suzuki Poulouse <suzuki.poulose@arm.com> Cc: Thomas Richter <tmricht@linux.ibm.com> Cc: Will Deacon <will@kernel.org> Cc: Xing Zhengjun <zhengjun.xing@linux.intel.com> Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20230527072210.2900565-28-irogers@google.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2023-05-27 07:22:03 +00:00
#include "pmus.h"
perf tools: Enhance the matching of sub-commands abbreviations We support short command 'rec*' for 'record' and 'rep*' for 'report' in lots of sub-commands, but the matching is not quite strict currnetly. It may be puzzling sometime, like we mis-type a 'recport' to report but it will perform 'record' in fact without any message. To fix this, add a check to ensure that the short cmd is valid prefix of the real command. Committer testing: [root@quaco ~]# perf c2c re sleep 1 Usage: perf c2c {record|report} -v, --verbose be more verbose (show counter open errors, etc) # perf c2c rec sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.038 MB perf.data (16 samples) ] # perf c2c recport sleep 1 Usage: perf c2c {record|report} -v, --verbose be more verbose (show counter open errors, etc) # perf c2c record sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.038 MB perf.data (15 samples) ] # perf c2c records sleep 1 Usage: perf c2c {record|report} -v, --verbose be more verbose (show counter open errors, etc) # Signed-off-by: Wei Li <liwei391@huawei.com> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Hanjun Guo <guohanjun@huawei.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Rui Xiang <rui.xiang@huawei.com> Link: http://lore.kernel.org/lkml/20220325092032.2956161-1-liwei391@huawei.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-03-25 09:20:32 +00:00
#include "string2.h"
2023-04-10 16:25:10 +00:00
#include "util/util.h"
struct c2c_hists {
struct hists hists;
struct perf_hpp_list list;
struct c2c_stats stats;
};
struct compute_stats {
struct stats lcl_hitm;
struct stats rmt_hitm;
struct stats lcl_peer;
struct stats rmt_peer;
struct stats load;
};
struct c2c_hist_entry {
struct c2c_hists *hists;
struct c2c_stats stats;
unsigned long *cpuset;
perf c2c report: Display node for cacheline address Adding the NUMA node info for the data cacheline. Adding the new column to both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto". Note the new 'Node' column next to the 'Cacheline'. $ perf c2c report --stdio ================================================= Shared Data Cache Line Table ================================================= # # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 ... Note the new 'Node' column next to the 'Offset'. ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Using the mem2node object to get the NUMA node data. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-8-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:40 +00:00
unsigned long *nodeset;
struct c2c_stats *node_stats;
perf c2c report: Add cacheline index entry It's convenient to have an index for each cacheline to help discussions about results over the phone. Add new 'Index' and 'Num' fields in main and single cacheline tables. $ perf c2c report ================================================= Shared Data Cache Line Table ================================================= # # Total Lcl ----- LLC Load Hitm ----- # Index Cacheline records Hitm Total Lcl Rmt ... # ..... .................. ....... ....... ....... ....... ....... # 0 0xffff880036233b40 1 11.11% 1 1 0 1 0xffff88009ccb2900 1 11.11% 1 1 0 2 0xffff8800b5b3bc40 7 11.11% 1 1 0 ... ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Pid ... # ..... ....... ....... ....... ....... .................. ....... # ------------------------------------------------------------- 0 0 1 0 0 0xffff880036233b40 ------------------------------------------------------------- 0.00% 100.00% 0.00% 0.00% 0x30 0 ------------------------------------------------------------- 1 0 1 0 0 0xffff88009ccb2900 ------------------------------------------------------------- 0.00% 100.00% 0.00% 0.00% 0x28 549 ... Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-4dhfagaz57tvrfjbg8nd2h4u@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-07-06 13:40:09 +00:00
unsigned int cacheline_idx;
struct compute_stats cstats;
unsigned long paddr;
unsigned long paddr_cnt;
bool paddr_zero;
char *nodestr;
/*
* must be at the end,
* because of its callchain dynamic entry
*/
struct hist_entry he;
};
static char const *coalesce_default = "iaddr";
struct perf_c2c {
struct perf_tool tool;
struct c2c_hists hists;
perf c2c report: Display node for cacheline address Adding the NUMA node info for the data cacheline. Adding the new column to both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto". Note the new 'Node' column next to the 'Cacheline'. $ perf c2c report --stdio ================================================= Shared Data Cache Line Table ================================================= # # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 ... Note the new 'Node' column next to the 'Offset'. ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Using the mem2node object to get the NUMA node data. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-8-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:40 +00:00
struct mem2node mem2node;
unsigned long **nodes;
int nodes_cnt;
int cpus_cnt;
int *cpu2node;
int node_info;
bool show_src;
bool show_all;
bool use_stdio;
perf c2c report: Add global stats stdio output Display global stats table as part of the stdio output or when --stats option is speicified: $ perf c2c report --stats ================================================= Trace Event Information ================================================= Total records : 41237 Locked Load/Store Operations : 4075 Load Operations : 20526 Loads - uncacheable : 0 Loads - IO : 0 Loads - Miss : 552 Loads - no mapping : 31 Load Fill Buffer Hit : 7333 Load L1D hit : 6398 Load L2D hit : 144 Load LLC hit : 4889 Load Local HITM : 1185 Load Remote HITM : 838 Load Remote HIT : 52 Load Local DRAM : 183 Load Remote DRAM : 106 Load MESI State Exclusive : 289 Load MESI State Shared : 0 Load LLC Misses : 1179 LLC Misses to Local DRAM : 15.5% LLC Misses to Remote DRAM : 9.0% LLC Misses to Remote cache (HIT) : 4.4% LLC Misses to Remote cache (HITM) : 71.1% Store Operations : 20711 Store - uncacheable : 0 Store - no mapping : 1 Store L1D Hit : 20158 Store L1D Miss : 552 No Page Map Rejects : 7 Unable to parse data source : 0 Original-patch-by: Dick Fowles <rfowles@redhat.com> Original-patch-by: Don Zickus <dzickus@redhat.com> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-qkyvao3qsrnwazf0w1jvsh7z@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-02 18:01:59 +00:00
bool stats_only;
bool symbol_full;
bool stitch_lbr;
/* Shared cache line stats */
struct c2c_stats shared_clines_stats;
int shared_clines;
int display;
const char *coalesce;
char *cl_sort;
char *cl_resort;
char *cl_output;
};
enum {
perf c2c: Use explicit names for display macros Perf c2c tool has an assumption that it heavily depends on HITM snoop type to detect cache false sharing, unfortunately, HITM is not supported on some architectures. Essentially, perf c2c tool wants to find some very costly snooping operations for false cache sharing, this means it's not necessarily to stick using HITM tags and we can explore other snooping types (e.g. SNOOPX_PEER). For this reason, this patch renames HITM related display macros with suffix '_HITM', so it can be distinct if later add more display types for on other snooping type. Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-10-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:45 +00:00
DISPLAY_LCL_HITM,
DISPLAY_RMT_HITM,
DISPLAY_TOT_HITM,
perf c2c: Sort on peer snooping for load operations This patch adds a new option 'peer' so can sort on the cache hit for peer snooping. For displaying with option 'peer', the "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" both sort with the metrics "tot_peer". As result, we can get the 'peer' display: # perf c2c report -d peer --coalesce tid,pid,iaddr,dso -N --stdio ================================================= Shared Data Cache Line Table ================================================= # # ----------- Cacheline ---------- Peer ------- Load Peer ------- Total Total Total --------- Stores -------- ----- Core Load Hit ----- - LLC Load Hit -- - RMT Load Hit -- --- Load Dram ---- # Index Address Node PA cnt Snoop Total Local Remote records Loads Stores L1Hit L1Miss N/A FB L1 L2 LclHit LclHitm RmtHit RmtHitm Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ....... ........ ....... ........ ........ # 0 0xaaaac17d6000 N/A 0 100.00% 99 99 0 18851 18851 0 0 0 0 0 18752 0 99 0 0 0 0 0 ================================================= Shared Cache Line Distribution Pareto ================================================= # # -- Peer Snoop -- ------- Store Refs ------ --------- Data address --------- ---------- cycles ---------- Total cpu Shared # Num Rmt Lcl L1 Hit L1 Miss N/A Offset Node PA cnt Pid Tid Code address rmt peer lcl peer load records cnt Symbol Object Source:Line Node{cpus %peers %stores} # ..... ....... ....... ....... ....... ....... .................. .... ...... ....... ................. .................. ........ ........ ........ ....... ........ ...................... ................ ............... .... # ---------------------------------------------------------------------- 0 0 99 0 0 0 0xaaaac17d6000 ---------------------------------------------------------------------- 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3603:memstress 0xaaaac17c25ac 0 376 41 9314 2 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 2 100.0% n/a} 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3606:memstress 0xaaaac17c25ac 0 375 44 9155 1 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 1 100.0% n/a} 0.00% 48.48% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3606:memstress 0xaaaac17c3e88 0 180 170 65 1 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 1 100.0% n/a} 0.00% 45.45% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3603:memstress 0xaaaac17c3e88 0 180 175 70 2 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 2 100.0% n/a} Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-14-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:49 +00:00
DISPLAY_SNP_PEER,
DISPLAY_MAX,
};
static const char *display_str[DISPLAY_MAX] = {
[DISPLAY_LCL_HITM] = "Local HITMs",
[DISPLAY_RMT_HITM] = "Remote HITMs",
[DISPLAY_TOT_HITM] = "Total HITMs",
perf c2c: Sort on peer snooping for load operations This patch adds a new option 'peer' so can sort on the cache hit for peer snooping. For displaying with option 'peer', the "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" both sort with the metrics "tot_peer". As result, we can get the 'peer' display: # perf c2c report -d peer --coalesce tid,pid,iaddr,dso -N --stdio ================================================= Shared Data Cache Line Table ================================================= # # ----------- Cacheline ---------- Peer ------- Load Peer ------- Total Total Total --------- Stores -------- ----- Core Load Hit ----- - LLC Load Hit -- - RMT Load Hit -- --- Load Dram ---- # Index Address Node PA cnt Snoop Total Local Remote records Loads Stores L1Hit L1Miss N/A FB L1 L2 LclHit LclHitm RmtHit RmtHitm Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ....... ........ ....... ........ ........ # 0 0xaaaac17d6000 N/A 0 100.00% 99 99 0 18851 18851 0 0 0 0 0 18752 0 99 0 0 0 0 0 ================================================= Shared Cache Line Distribution Pareto ================================================= # # -- Peer Snoop -- ------- Store Refs ------ --------- Data address --------- ---------- cycles ---------- Total cpu Shared # Num Rmt Lcl L1 Hit L1 Miss N/A Offset Node PA cnt Pid Tid Code address rmt peer lcl peer load records cnt Symbol Object Source:Line Node{cpus %peers %stores} # ..... ....... ....... ....... ....... ....... .................. .... ...... ....... ................. .................. ........ ........ ........ ....... ........ ...................... ................ ............... .... # ---------------------------------------------------------------------- 0 0 99 0 0 0 0xaaaac17d6000 ---------------------------------------------------------------------- 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3603:memstress 0xaaaac17c25ac 0 376 41 9314 2 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 2 100.0% n/a} 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3606:memstress 0xaaaac17c25ac 0 375 44 9155 1 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 1 100.0% n/a} 0.00% 48.48% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3606:memstress 0xaaaac17c3e88 0 180 170 65 1 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 1 100.0% n/a} 0.00% 45.45% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3603:memstress 0xaaaac17c3e88 0 180 175 70 2 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 2 100.0% n/a} Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-14-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:49 +00:00
[DISPLAY_SNP_PEER] = "Peer Snoop",
};
static const struct option c2c_options[] = {
OPT_INCR('v', "verbose", &verbose, "be more verbose (show counter open errors, etc)"),
OPT_END()
};
static struct perf_c2c c2c;
static void *c2c_he_zalloc(size_t size)
{
struct c2c_hist_entry *c2c_he;
c2c_he = zalloc(size + sizeof(*c2c_he));
if (!c2c_he)
return NULL;
c2c_he->cpuset = bitmap_zalloc(c2c.cpus_cnt);
if (!c2c_he->cpuset)
goto out_free;
c2c_he->nodeset = bitmap_zalloc(c2c.nodes_cnt);
perf c2c report: Display node for cacheline address Adding the NUMA node info for the data cacheline. Adding the new column to both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto". Note the new 'Node' column next to the 'Cacheline'. $ perf c2c report --stdio ================================================= Shared Data Cache Line Table ================================================= # # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 ... Note the new 'Node' column next to the 'Offset'. ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Using the mem2node object to get the NUMA node data. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-8-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:40 +00:00
if (!c2c_he->nodeset)
goto out_free;
perf c2c report: Display node for cacheline address Adding the NUMA node info for the data cacheline. Adding the new column to both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto". Note the new 'Node' column next to the 'Cacheline'. $ perf c2c report --stdio ================================================= Shared Data Cache Line Table ================================================= # # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 ... Note the new 'Node' column next to the 'Offset'. ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Using the mem2node object to get the NUMA node data. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-8-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:40 +00:00
c2c_he->node_stats = zalloc(c2c.nodes_cnt * sizeof(*c2c_he->node_stats));
if (!c2c_he->node_stats)
goto out_free;
init_stats(&c2c_he->cstats.lcl_hitm);
init_stats(&c2c_he->cstats.rmt_hitm);
init_stats(&c2c_he->cstats.lcl_peer);
init_stats(&c2c_he->cstats.rmt_peer);
init_stats(&c2c_he->cstats.load);
return &c2c_he->he;
out_free:
zfree(&c2c_he->nodeset);
zfree(&c2c_he->cpuset);
free(c2c_he);
return NULL;
}
static void c2c_he_free(void *he)
{
struct c2c_hist_entry *c2c_he;
c2c_he = container_of(he, struct c2c_hist_entry, he);
if (c2c_he->hists) {
hists__delete_entries(&c2c_he->hists->hists);
zfree(&c2c_he->hists);
}
zfree(&c2c_he->cpuset);
zfree(&c2c_he->nodeset);
zfree(&c2c_he->nodestr);
zfree(&c2c_he->node_stats);
free(c2c_he);
}
static struct hist_entry_ops c2c_entry_ops = {
.new = c2c_he_zalloc,
.free = c2c_he_free,
};
static int c2c_hists__init(struct c2c_hists *hists,
const char *sort,
int nr_header_lines);
static struct c2c_hists*
he__get_c2c_hists(struct hist_entry *he,
const char *sort,
int nr_header_lines)
{
struct c2c_hist_entry *c2c_he;
struct c2c_hists *hists;
int ret;
c2c_he = container_of(he, struct c2c_hist_entry, he);
if (c2c_he->hists)
return c2c_he->hists;
hists = c2c_he->hists = zalloc(sizeof(*hists));
if (!hists)
return NULL;
ret = c2c_hists__init(hists, sort, nr_header_lines);
if (ret) {
free(hists);
return NULL;
}
return hists;
}
static void c2c_he__set_cpu(struct c2c_hist_entry *c2c_he,
struct perf_sample *sample)
{
if (WARN_ONCE(sample->cpu == (unsigned int) -1,
"WARNING: no sample cpu value"))
return;
__set_bit(sample->cpu, c2c_he->cpuset);
}
perf c2c report: Display node for cacheline address Adding the NUMA node info for the data cacheline. Adding the new column to both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto". Note the new 'Node' column next to the 'Cacheline'. $ perf c2c report --stdio ================================================= Shared Data Cache Line Table ================================================= # # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 ... Note the new 'Node' column next to the 'Offset'. ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Using the mem2node object to get the NUMA node data. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-8-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:40 +00:00
static void c2c_he__set_node(struct c2c_hist_entry *c2c_he,
struct perf_sample *sample)
{
int node;
if (!sample->phys_addr) {
c2c_he->paddr_zero = true;
return;
}
node = mem2node__node(&c2c.mem2node, sample->phys_addr);
if (WARN_ONCE(node < 0, "WARNING: failed to find node\n"))
return;
__set_bit(node, c2c_he->nodeset);
perf c2c report: Display node for cacheline address Adding the NUMA node info for the data cacheline. Adding the new column to both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto". Note the new 'Node' column next to the 'Cacheline'. $ perf c2c report --stdio ================================================= Shared Data Cache Line Table ================================================= # # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 ... Note the new 'Node' column next to the 'Offset'. ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Using the mem2node object to get the NUMA node data. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-8-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:40 +00:00
if (c2c_he->paddr != sample->phys_addr) {
c2c_he->paddr_cnt++;
c2c_he->paddr = sample->phys_addr;
}
}
static void compute_stats(struct c2c_hist_entry *c2c_he,
struct c2c_stats *stats,
u64 weight)
{
struct compute_stats *cstats = &c2c_he->cstats;
if (stats->rmt_hitm)
update_stats(&cstats->rmt_hitm, weight);
else if (stats->lcl_hitm)
update_stats(&cstats->lcl_hitm, weight);
else if (stats->rmt_peer)
update_stats(&cstats->rmt_peer, weight);
else if (stats->lcl_peer)
update_stats(&cstats->lcl_peer, weight);
else if (stats->load)
update_stats(&cstats->load, weight);
}
perf tool: Constify tool pointers The tool pointer (to a struct largely of function pointers) is passed around but is unchanged except at initialization. Change parameter and variable types to be const to lower the possibilities of what could happen with a tool. Reviewed-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ian Rogers <irogers@google.com> Tested-by: Adrian Hunter <adrian.hunter@intel.com> Tested-by: Leo Yan <leo.yan@arm.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: Athira Rajeev <atrajeev@linux.vnet.ibm.com> Cc: Huacai Chen <chenhuacai@kernel.org> Cc: Ilkka Koskinen <ilkka@os.amperecomputing.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.g.garry@oracle.com> Cc: Jonathan Cameron <jonathan.cameron@huawei.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Leo Yan <leo.yan@linux.dev> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Nick Desaulniers <ndesaulniers@google.com> Cc: Nick Terrell <terrelln@fb.com> Cc: Oliver Upton <oliver.upton@linux.dev> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Song Liu <song@kernel.org> Cc: Sun Haiyong <sunhaiyong@loongson.cn> Cc: Suzuki Poulouse <suzuki.poulose@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Yanteng Si <siyanteng@loongson.cn> Cc: Yicong Yang <yangyicong@hisilicon.com> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20240812204720.631678-4-irogers@google.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2024-08-12 20:46:55 +00:00
static int process_sample_event(const struct perf_tool *tool __maybe_unused,
union perf_event *event,
struct perf_sample *sample,
struct evsel *evsel,
struct machine *machine)
{
struct c2c_hists *c2c_hists = &c2c.hists;
struct c2c_hist_entry *c2c_he;
struct c2c_stats stats = { .nr_entries = 0, };
struct hist_entry *he;
struct addr_location al;
struct mem_info *mi, *mi_dup;
perf callchain: Use pthread keys for tls callchain_cursor Pthread keys are more portable than __thread and allow the association of a destructor with the key. Use the destructor to clean up TLS callchain cursors to aid understanding memory leaks. Committer notes: Had to fixup a series of unconverted places and also check for the return of get_tls_callchain_cursor() as it may fail and return NULL. In that unlikely case we now either print something to a file, if the caller was expecting to print a callchain, or return an error code to state that resolving the callchain isn't possible. In some cases this was made easier because thread__resolve_callchain() already can fail for other reasons, so this new one (cursor == NULL) can be added and the callers don't have to explicitely check for this new condition. Signed-off-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Ali Saidi <alisaidi@amazon.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Athira Rajeev <atrajeev@linux.vnet.ibm.com> Cc: Brian Robbins <brianrob@linux.microsoft.com> Cc: Changbin Du <changbin.du@huawei.com> Cc: Dmitrii Dolgov <9erthalion6@gmail.com> Cc: Fangrui Song <maskray@google.com> Cc: German Gomez <german.gomez@arm.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Ivan Babrou <ivan@cloudflare.com> Cc: James Clark <james.clark@arm.com> Cc: Jing Zhang <renyu.zj@linux.alibaba.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.g.garry@oracle.com> Cc: K Prateek Nayak <kprateek.nayak@amd.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Liam Howlett <liam.howlett@oracle.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Miguel Ojeda <ojeda@kernel.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ravi Bangoria <ravi.bangoria@amd.com> Cc: Sean Christopherson <seanjc@google.com> Cc: Steinar H. Gunderson <sesse@google.com> Cc: Suzuki Poulouse <suzuki.poulose@arm.com> Cc: Wenyu Liu <liuwenyu7@huawei.com> Cc: Will Deacon <will@kernel.org> Cc: Yang Jihong <yangjihong1@huawei.com> Cc: Ye Xingchen <ye.xingchen@zte.com.cn> Cc: Yuan Can <yuancan@huawei.com> Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20230608232823.4027869-25-irogers@google.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2023-06-08 23:28:21 +00:00
struct callchain_cursor *cursor;
int ret;
perf addr_location: Add init/exit/copy functions struct addr_location holds references to multiple reference counted objects. Add init/exit functions to make maintenance of those more consistent with the rest of the code and to try to avoid leaks. Modification of thread reference counts isn't included in this change. Committer notes: I needed to initialize result to sample->ip to make sure is set to something, fixing a compile time error, mostly keeping the previous logic as build_alloc_func_list() already does debugging/error prints about what went wrong if it takes the 'goto out'. Signed-off-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Ali Saidi <alisaidi@amazon.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Athira Rajeev <atrajeev@linux.vnet.ibm.com> Cc: Brian Robbins <brianrob@linux.microsoft.com> Cc: Changbin Du <changbin.du@huawei.com> Cc: Dmitrii Dolgov <9erthalion6@gmail.com> Cc: Fangrui Song <maskray@google.com> Cc: German Gomez <german.gomez@arm.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Ivan Babrou <ivan@cloudflare.com> Cc: James Clark <james.clark@arm.com> Cc: Jing Zhang <renyu.zj@linux.alibaba.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.g.garry@oracle.com> Cc: K Prateek Nayak <kprateek.nayak@amd.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Liam Howlett <liam.howlett@oracle.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Miguel Ojeda <ojeda@kernel.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ravi Bangoria <ravi.bangoria@amd.com> Cc: Sean Christopherson <seanjc@google.com> Cc: Steinar H. Gunderson <sesse@google.com> Cc: Suzuki Poulouse <suzuki.poulose@arm.com> Cc: Wenyu Liu <liuwenyu7@huawei.com> Cc: Will Deacon <will@kernel.org> Cc: Yang Jihong <yangjihong1@huawei.com> Cc: Ye Xingchen <ye.xingchen@zte.com.cn> Cc: Yuan Can <yuancan@huawei.com> Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20230608232823.4027869-7-irogers@google.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2023-06-08 23:28:03 +00:00
addr_location__init(&al);
if (machine__resolve(machine, &al, sample) < 0) {
pr_debug("problem processing %d event, skipping it.\n",
event->header.type);
perf addr_location: Add init/exit/copy functions struct addr_location holds references to multiple reference counted objects. Add init/exit functions to make maintenance of those more consistent with the rest of the code and to try to avoid leaks. Modification of thread reference counts isn't included in this change. Committer notes: I needed to initialize result to sample->ip to make sure is set to something, fixing a compile time error, mostly keeping the previous logic as build_alloc_func_list() already does debugging/error prints about what went wrong if it takes the 'goto out'. Signed-off-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Ali Saidi <alisaidi@amazon.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Athira Rajeev <atrajeev@linux.vnet.ibm.com> Cc: Brian Robbins <brianrob@linux.microsoft.com> Cc: Changbin Du <changbin.du@huawei.com> Cc: Dmitrii Dolgov <9erthalion6@gmail.com> Cc: Fangrui Song <maskray@google.com> Cc: German Gomez <german.gomez@arm.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Ivan Babrou <ivan@cloudflare.com> Cc: James Clark <james.clark@arm.com> Cc: Jing Zhang <renyu.zj@linux.alibaba.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.g.garry@oracle.com> Cc: K Prateek Nayak <kprateek.nayak@amd.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Liam Howlett <liam.howlett@oracle.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Miguel Ojeda <ojeda@kernel.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ravi Bangoria <ravi.bangoria@amd.com> Cc: Sean Christopherson <seanjc@google.com> Cc: Steinar H. Gunderson <sesse@google.com> Cc: Suzuki Poulouse <suzuki.poulose@arm.com> Cc: Wenyu Liu <liuwenyu7@huawei.com> Cc: Will Deacon <will@kernel.org> Cc: Yang Jihong <yangjihong1@huawei.com> Cc: Ye Xingchen <ye.xingchen@zte.com.cn> Cc: Yuan Can <yuancan@huawei.com> Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20230608232823.4027869-7-irogers@google.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2023-06-08 23:28:03 +00:00
ret = -1;
goto out;
}
if (c2c.stitch_lbr)
perf thread: Add accessor functions for thread Using accessors will make it easier to add reference count checking in later patches. Committer notes: thread->nsinfo wasn't wrapped as it is used together with nsinfo__zput(), where does a trick to set the field with a refcount being dropped to NULL, and that doesn't work well with using thread__nsinfo(thread), that loses the &thread->nsinfo pointer. When refcount checking is added to 'struct thread', later in this series, nsinfo__zput(RC_CHK_ACCESS(thread)->nsinfo) will be used to check the thread pointer. Signed-off-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Ali Saidi <alisaidi@amazon.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Athira Rajeev <atrajeev@linux.vnet.ibm.com> Cc: Brian Robbins <brianrob@linux.microsoft.com> Cc: Changbin Du <changbin.du@huawei.com> Cc: Dmitrii Dolgov <9erthalion6@gmail.com> Cc: Fangrui Song <maskray@google.com> Cc: German Gomez <german.gomez@arm.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Ivan Babrou <ivan@cloudflare.com> Cc: James Clark <james.clark@arm.com> Cc: Jing Zhang <renyu.zj@linux.alibaba.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.g.garry@oracle.com> Cc: K Prateek Nayak <kprateek.nayak@amd.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Liam Howlett <liam.howlett@oracle.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Miguel Ojeda <ojeda@kernel.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ravi Bangoria <ravi.bangoria@amd.com> Cc: Sean Christopherson <seanjc@google.com> Cc: Steinar H. Gunderson <sesse@google.com> Cc: Suzuki Poulouse <suzuki.poulose@arm.com> Cc: Wenyu Liu <liuwenyu7@huawei.com> Cc: Will Deacon <will@kernel.org> Cc: Yang Jihong <yangjihong1@huawei.com> Cc: Ye Xingchen <ye.xingchen@zte.com.cn> Cc: Yuan Can <yuancan@huawei.com> Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20230608232823.4027869-4-irogers@google.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2023-06-08 23:28:00 +00:00
thread__set_lbr_stitch_enable(al.thread, true);
perf callchain: Use pthread keys for tls callchain_cursor Pthread keys are more portable than __thread and allow the association of a destructor with the key. Use the destructor to clean up TLS callchain cursors to aid understanding memory leaks. Committer notes: Had to fixup a series of unconverted places and also check for the return of get_tls_callchain_cursor() as it may fail and return NULL. In that unlikely case we now either print something to a file, if the caller was expecting to print a callchain, or return an error code to state that resolving the callchain isn't possible. In some cases this was made easier because thread__resolve_callchain() already can fail for other reasons, so this new one (cursor == NULL) can be added and the callers don't have to explicitely check for this new condition. Signed-off-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Ali Saidi <alisaidi@amazon.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Athira Rajeev <atrajeev@linux.vnet.ibm.com> Cc: Brian Robbins <brianrob@linux.microsoft.com> Cc: Changbin Du <changbin.du@huawei.com> Cc: Dmitrii Dolgov <9erthalion6@gmail.com> Cc: Fangrui Song <maskray@google.com> Cc: German Gomez <german.gomez@arm.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Ivan Babrou <ivan@cloudflare.com> Cc: James Clark <james.clark@arm.com> Cc: Jing Zhang <renyu.zj@linux.alibaba.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.g.garry@oracle.com> Cc: K Prateek Nayak <kprateek.nayak@amd.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Liam Howlett <liam.howlett@oracle.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Miguel Ojeda <ojeda@kernel.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ravi Bangoria <ravi.bangoria@amd.com> Cc: Sean Christopherson <seanjc@google.com> Cc: Steinar H. Gunderson <sesse@google.com> Cc: Suzuki Poulouse <suzuki.poulose@arm.com> Cc: Wenyu Liu <liuwenyu7@huawei.com> Cc: Will Deacon <will@kernel.org> Cc: Yang Jihong <yangjihong1@huawei.com> Cc: Ye Xingchen <ye.xingchen@zte.com.cn> Cc: Yuan Can <yuancan@huawei.com> Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20230608232823.4027869-25-irogers@google.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2023-06-08 23:28:21 +00:00
cursor = get_tls_callchain_cursor();
ret = sample__resolve_callchain(sample, cursor, NULL,
perf c2c report: Allow to report callchains Add --call-graph option to properly setup callchain code. Adding default settings to display callchains whenever they are stored in the perf.data. Committer Notes: Testing it: [root@jouet ~]# perf c2c record -a -g sleep 5 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.331 MB perf.data (4263 samples) ] [root@jouet ~]# perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|CALLCHAIN|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|CALLCHAIN|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 [root@jouet ~]# perf c2c report --stats ================================================= Trace Event Information ================================================= Total records : 4263 Locked Load/Store Operations : 220 Load Operations : 2130 Loads - uncacheable : 1 Loads - IO : 7 Loads - Miss : 86 Loads - no mapping : 5 Load Fill Buffer Hit : 609 Load L1D hit : 612 ================================================= Trace Event Information ================================================= Total records : 4263 Locked Load/Store Operations : 220 Load Operations : 2130 Loads - uncacheable : 1 Loads - IO : 7 Loads - Miss : 86 Loads - no mapping : 5 Load Fill Buffer Hit : 609 Load L1D hit : 612 Load L2D hit : 27 Load LLC hit : 607 Load Local HITM : 15 Load Remote HITM : 0 Load Remote HIT : 0 Load Local DRAM : 176 Load Remote DRAM : 0 Load MESI State Exclusive : 176 Load MESI State Shared : 0 Load LLC Misses : 176 LLC Misses to Local DRAM : 100.0% LLC Misses to Remote DRAM : 0.0% LLC Misses to Remote cache (HIT) : 0.0% LLC Misses to Remote cache (HITM) : 0.0% Store Operations : 2133 Store - uncacheable : 0 Store - no mapping : 1 Store L1D Hit : 1967 Store L1D Miss : 165 No Page Map Rejects : 145 Unable to parse data source : 0 ================================================= Global Shared Cache Line Event Information ================================================= Total Shared Cache Lines : 15 Load HITs on shared lines : 26 Fill Buffer Hits on shared lines : 7 L1D hits on shared lines : 3 L2D hits on shared lines : 0 LLC hits on shared lines : 16 Locked Access on shared lines : 2 Store HITs on shared lines : 8 Store L1D hits on shared lines : 7 Total Merged records : 23 ================================================= c2c details ================================================= Events : cpu/mem-loads,ldlat=30/P : cpu/mem-stores/P [root@jouet ~]# [root@jouet ~]# perf c2c report Shared Data Cache Line Table (2378 entries) Total --- LLC Load Hitm -- -- Store Reference - - Load Dram - LLC Total - Core Load Hit - Cacheline records %hitm Total Lcl Rmt Total L1Hit L1Miss Lcl Rmt Ld Miss Loads FB L1 L2 - 0xffff880024380c00 10 0.00% 0 0 0 6 6 0 0 0 0 4 1 3 0 - 0.13% _raw_spin_lock_irqsave - 0.07% ep_poll sys_epoll_wait do_syscall_64 return_from_SYSCALL_64 + 0x103573 - 0.05% ep_poll_callback __wake_up_common - __wake_up_sync_key - 0.02% pipe_read __vfs_read vfs_read sys_read do_syscall_64 return_from_SYSCALL_64 0xfdad + 0.02% sock_def_readable + 0.02% ep_scan_ready_list.constprop.12 + 0.00% mutex_lock + 0.00% __wake_up_common + 0xffff880024380c40 1 0.00% 0 0 0 1 1 0 0 0 0 0 0 0 0 + 0xffff880024380c80 1 0.00% 0 0 0 0 0 0 0 0 0 1 0 0 0 - 0xffff8800243e9f00 1 0.00% 0 0 0 1 1 0 0 0 0 0 0 0 0 enqueue_entity enqueue_task_fair activate_task ttwu_do_activate try_to_wake_up wake_up_process hrtimer_wakeup __hrtimer_run_queues hrtimer_interrupt local_apic_timer_interrupt smp_apic_timer_interrupt apic_timer_interrupt cpuidle_enter call_cpuidle help ------------- And when presing 'd' to see the cacheline details: Cacheline 0xffff880024380c00 ----- HITM ----- -- Store Refs -- --------- cycles ----- cpu Rmt Lcl L1 Hit L1 Miss Off Pid Tid rmt hitm lcl hitm load cnt Symbol - 0.00% 0.00% 100.00% 0.00% 0x0 1473 1474:Chrome_ChildIOT 0 0 41 2 [k] _raw_spin_lock_irqsave [kernel] - _raw_spin_lock_irqsave - 51.52% ep_poll sys_epoll_wait do_syscall_64 return_from_SYSCALL_64 - 0x103573 47.19% 0 4.33% 0xc30bd - 35.93% ep_poll_callback __wake_up_common - __wake_up_sync_key - 18.20% pipe_read __vfs_read vfs_read sys_read do_syscall_64 return_from_SYSCALL_64 0xfdad - 17.73% sock_def_readable unix_stream_sendmsg sock_sendmsg ___sys_sendmsg __sys_sendmsg sys_sendmsg do_syscall_64 return_from_SYSCALL_64 __GI___libc_sendmsg 0x12c036af1fc0 0x16a4050 0x894928ec83485354 + 12.45% ep_scan_ready_list.constprop.12 + 0.00% 0.00% 0.00% 0.00% 0x8 1473 1474:Chrome_ChildIOT 0 0 102 1 [k] mutex_lock [kernel] + 0.00% 0.00% 0.00% 0.00% 0x38 1473 1473:chrome 0 0 88 1 [k] __wake_up_common [kernel] help Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-inykbom2f19difvsu1e18avr@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-11 16:23:48 +00:00
evsel, &al, sysctl_perf_event_max_stack);
if (ret)
goto out;
mi = sample__resolve_mem(sample, &al);
perf addr_location: Add init/exit/copy functions struct addr_location holds references to multiple reference counted objects. Add init/exit functions to make maintenance of those more consistent with the rest of the code and to try to avoid leaks. Modification of thread reference counts isn't included in this change. Committer notes: I needed to initialize result to sample->ip to make sure is set to something, fixing a compile time error, mostly keeping the previous logic as build_alloc_func_list() already does debugging/error prints about what went wrong if it takes the 'goto out'. Signed-off-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Ali Saidi <alisaidi@amazon.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Athira Rajeev <atrajeev@linux.vnet.ibm.com> Cc: Brian Robbins <brianrob@linux.microsoft.com> Cc: Changbin Du <changbin.du@huawei.com> Cc: Dmitrii Dolgov <9erthalion6@gmail.com> Cc: Fangrui Song <maskray@google.com> Cc: German Gomez <german.gomez@arm.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Ivan Babrou <ivan@cloudflare.com> Cc: James Clark <james.clark@arm.com> Cc: Jing Zhang <renyu.zj@linux.alibaba.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.g.garry@oracle.com> Cc: K Prateek Nayak <kprateek.nayak@amd.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Liam Howlett <liam.howlett@oracle.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Miguel Ojeda <ojeda@kernel.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ravi Bangoria <ravi.bangoria@amd.com> Cc: Sean Christopherson <seanjc@google.com> Cc: Steinar H. Gunderson <sesse@google.com> Cc: Suzuki Poulouse <suzuki.poulose@arm.com> Cc: Wenyu Liu <liuwenyu7@huawei.com> Cc: Will Deacon <will@kernel.org> Cc: Yang Jihong <yangjihong1@huawei.com> Cc: Ye Xingchen <ye.xingchen@zte.com.cn> Cc: Yuan Can <yuancan@huawei.com> Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20230608232823.4027869-7-irogers@google.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2023-06-08 23:28:03 +00:00
if (mi == NULL) {
ret = -ENOMEM;
goto out;
}
/*
* The mi object is released in hists__add_entry_ops,
* if it gets sorted out into existing data, so we need
* to take the copy now.
*/
mi_dup = mem_info__get(mi);
c2c_decode_stats(&stats, mi);
he = hists__add_entry_ops(&c2c_hists->hists, &c2c_entry_ops,
&al, NULL, NULL, mi, NULL,
sample, true);
if (he == NULL)
goto free_mi;
c2c_he = container_of(he, struct c2c_hist_entry, he);
c2c_add_stats(&c2c_he->stats, &stats);
c2c_add_stats(&c2c_hists->stats, &stats);
c2c_he__set_cpu(c2c_he, sample);
perf c2c report: Display node for cacheline address Adding the NUMA node info for the data cacheline. Adding the new column to both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto". Note the new 'Node' column next to the 'Cacheline'. $ perf c2c report --stdio ================================================= Shared Data Cache Line Table ================================================= # # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 ... Note the new 'Node' column next to the 'Offset'. ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Using the mem2node object to get the NUMA node data. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-8-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:40 +00:00
c2c_he__set_node(c2c_he, sample);
hists__inc_nr_samples(&c2c_hists->hists, he->filtered);
ret = hist_entry__append_callchain(he, sample);
if (!ret) {
/*
* There's already been warning about missing
* sample's cpu value. Let's account all to
* node 0 in this case, without any further
* warning.
*
* Doing node stats only for single callchain data.
*/
int cpu = sample->cpu == (unsigned int) -1 ? 0 : sample->cpu;
int node = c2c.cpu2node[cpu];
mi = mi_dup;
c2c_hists = he__get_c2c_hists(he, c2c.cl_sort, 2);
if (!c2c_hists)
goto free_mi;
he = hists__add_entry_ops(&c2c_hists->hists, &c2c_entry_ops,
&al, NULL, NULL, mi, NULL,
sample, true);
if (he == NULL)
goto free_mi;
c2c_he = container_of(he, struct c2c_hist_entry, he);
c2c_add_stats(&c2c_he->stats, &stats);
c2c_add_stats(&c2c_hists->stats, &stats);
c2c_add_stats(&c2c_he->node_stats[node], &stats);
compute_stats(c2c_he, &stats, sample->weight);
c2c_he__set_cpu(c2c_he, sample);
perf c2c report: Display node for cacheline address Adding the NUMA node info for the data cacheline. Adding the new column to both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto". Note the new 'Node' column next to the 'Cacheline'. $ perf c2c report --stdio ================================================= Shared Data Cache Line Table ================================================= # # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 ... Note the new 'Node' column next to the 'Offset'. ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Using the mem2node object to get the NUMA node data. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-8-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:40 +00:00
c2c_he__set_node(c2c_he, sample);
hists__inc_nr_samples(&c2c_hists->hists, he->filtered);
ret = hist_entry__append_callchain(he, sample);
}
out:
perf addr_location: Add init/exit/copy functions struct addr_location holds references to multiple reference counted objects. Add init/exit functions to make maintenance of those more consistent with the rest of the code and to try to avoid leaks. Modification of thread reference counts isn't included in this change. Committer notes: I needed to initialize result to sample->ip to make sure is set to something, fixing a compile time error, mostly keeping the previous logic as build_alloc_func_list() already does debugging/error prints about what went wrong if it takes the 'goto out'. Signed-off-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Ali Saidi <alisaidi@amazon.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Athira Rajeev <atrajeev@linux.vnet.ibm.com> Cc: Brian Robbins <brianrob@linux.microsoft.com> Cc: Changbin Du <changbin.du@huawei.com> Cc: Dmitrii Dolgov <9erthalion6@gmail.com> Cc: Fangrui Song <maskray@google.com> Cc: German Gomez <german.gomez@arm.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Ivan Babrou <ivan@cloudflare.com> Cc: James Clark <james.clark@arm.com> Cc: Jing Zhang <renyu.zj@linux.alibaba.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.g.garry@oracle.com> Cc: K Prateek Nayak <kprateek.nayak@amd.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Liam Howlett <liam.howlett@oracle.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Miguel Ojeda <ojeda@kernel.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ravi Bangoria <ravi.bangoria@amd.com> Cc: Sean Christopherson <seanjc@google.com> Cc: Steinar H. Gunderson <sesse@google.com> Cc: Suzuki Poulouse <suzuki.poulose@arm.com> Cc: Wenyu Liu <liuwenyu7@huawei.com> Cc: Will Deacon <will@kernel.org> Cc: Yang Jihong <yangjihong1@huawei.com> Cc: Ye Xingchen <ye.xingchen@zte.com.cn> Cc: Yuan Can <yuancan@huawei.com> Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20230608232823.4027869-7-irogers@google.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2023-06-08 23:28:03 +00:00
addr_location__exit(&al);
return ret;
free_mi:
mem_info__put(mi_dup);
mem_info__put(mi);
ret = -ENOMEM;
goto out;
}
static const char * const c2c_usage[] = {
"perf c2c {record|report}",
NULL
};
static const char * const __usage_report[] = {
"perf c2c report",
NULL
};
static const char * const *report_c2c_usage = __usage_report;
#define C2C_HEADER_MAX 2
struct c2c_header {
struct {
const char *text;
int span;
} line[C2C_HEADER_MAX];
};
struct c2c_dimension {
struct c2c_header header;
const char *name;
int width;
struct sort_entry *se;
int64_t (*cmp)(struct perf_hpp_fmt *fmt,
struct hist_entry *, struct hist_entry *);
int (*entry)(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he);
int (*color)(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he);
};
struct c2c_fmt {
struct perf_hpp_fmt fmt;
struct c2c_dimension *dim;
};
#define SYMBOL_WIDTH 30
static struct c2c_dimension dim_symbol;
static struct c2c_dimension dim_srcline;
static int symbol_width(struct hists *hists, struct sort_entry *se)
{
int width = hists__col_len(hists, se->se_width_idx);
if (!c2c.symbol_full)
width = MIN(width, SYMBOL_WIDTH);
return width;
}
static int c2c_width(struct perf_hpp_fmt *fmt,
struct perf_hpp *hpp __maybe_unused,
struct hists *hists)
{
struct c2c_fmt *c2c_fmt;
struct c2c_dimension *dim;
c2c_fmt = container_of(fmt, struct c2c_fmt, fmt);
dim = c2c_fmt->dim;
if (dim == &dim_symbol || dim == &dim_srcline)
return symbol_width(hists, dim->se);
return dim->se ? hists__col_len(hists, dim->se->se_width_idx) :
c2c_fmt->dim->width;
}
static int c2c_header(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hists *hists, int line, int *span)
{
struct perf_hpp_list *hpp_list = hists->hpp_list;
struct c2c_fmt *c2c_fmt;
struct c2c_dimension *dim;
const char *text = NULL;
int width = c2c_width(fmt, hpp, hists);
c2c_fmt = container_of(fmt, struct c2c_fmt, fmt);
dim = c2c_fmt->dim;
if (dim->se) {
text = dim->header.line[line].text;
/* Use the last line from sort_entry if not defined. */
if (!text && (line == hpp_list->nr_header_lines - 1))
text = dim->se->se_header;
} else {
text = dim->header.line[line].text;
if (*span) {
(*span)--;
return 0;
} else {
*span = dim->header.line[line].span;
}
}
if (text == NULL)
text = "";
return scnprintf(hpp->buf, hpp->size, "%*s", width, text);
}
#define HEX_STR(__s, __v) \
({ \
scnprintf(__s, sizeof(__s), "0x%" PRIx64, __v); \
__s; \
})
static int64_t
dcacheline_cmp(struct perf_hpp_fmt *fmt __maybe_unused,
struct hist_entry *left, struct hist_entry *right)
{
return sort__dcacheline_cmp(left, right);
}
static int dcacheline_entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
uint64_t addr = 0;
int width = c2c_width(fmt, hpp, he->hists);
char buf[20];
if (he->mem_info)
addr = cl_address(mem_info__daddr(he->mem_info)->addr, chk_double_cl);
return scnprintf(hpp->buf, hpp->size, "%*s", width, HEX_STR(buf, addr));
}
perf c2c report: Display node for cacheline address Adding the NUMA node info for the data cacheline. Adding the new column to both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto". Note the new 'Node' column next to the 'Cacheline'. $ perf c2c report --stdio ================================================= Shared Data Cache Line Table ================================================= # # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 ... Note the new 'Node' column next to the 'Offset'. ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Using the mem2node object to get the NUMA node data. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-8-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:40 +00:00
static int
dcacheline_node_entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
struct c2c_hist_entry *c2c_he;
int width = c2c_width(fmt, hpp, he->hists);
c2c_he = container_of(he, struct c2c_hist_entry, he);
if (WARN_ON_ONCE(!c2c_he->nodestr))
return 0;
return scnprintf(hpp->buf, hpp->size, "%*s", width, c2c_he->nodestr);
}
perf c2c report: Add cacheline address count column Adding the 'PA cnt' column grouped under data cacheline address. It shows how many times the physical addresses changed for the hist entry. It does not show the number of different physical addresses for entry, because we don't store those. We only track the number of times we got different address than we currently hold, which is not expensive and gives similar info. $ perf c2c report --stdio # ----------- Cacheline ---------- Total Tot ----- LLC Load Hitm ----- # Index Address Node PA cnt records Hitm Total Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... # 0 0xffff9ad56dca0a80 0 9 10 7.69% 2 2 0 1 0xffff9ad56dce0a80 0 9 9 7.69% 2 2 0 2 0xffff9ad37659ad80 0 1 2 3.85% 1 1 0 ... # ----- HITM ----- -- Store Refs -- --------- Data address --------- # Num Rmt Lcl L1 Hit L1 Miss Offset Node PA cnt Pid # ..... ....... ....... ....... ....... .................. .... ...... ....... # ------------------------------------------------------------- 0 0 2 3 0 0xffff9ad56dca0a80 ------------------------------------------------------------- 0.00% 0.00% 33.33% 0.00% 0x0 0 1 2510 0.00% 0.00% 33.33% 0.00% 0x4 0 1 2476 0.00% 0.00% 33.33% 0.00% 0x20 0 1 0 0.00% 100.00% 0.00% 0.00% 0x38 0 1 0 Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-10-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:42 +00:00
static int
dcacheline_node_count(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
struct c2c_hist_entry *c2c_he;
int width = c2c_width(fmt, hpp, he->hists);
c2c_he = container_of(he, struct c2c_hist_entry, he);
return scnprintf(hpp->buf, hpp->size, "%*lu", width, c2c_he->paddr_cnt);
}
static int offset_entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
uint64_t addr = 0;
int width = c2c_width(fmt, hpp, he->hists);
char buf[20];
if (he->mem_info)
addr = cl_offset(mem_info__daddr(he->mem_info)->al_addr, chk_double_cl);
return scnprintf(hpp->buf, hpp->size, "%*s", width, HEX_STR(buf, addr));
}
static int64_t
offset_cmp(struct perf_hpp_fmt *fmt __maybe_unused,
struct hist_entry *left, struct hist_entry *right)
{
uint64_t l = 0, r = 0;
if (left->mem_info)
l = cl_offset(mem_info__daddr(left->mem_info)->addr, chk_double_cl);
perf c2c: Add report option to show false sharing in adjacent cachelines Many platforms have feature of adjacent cachelines prefetch, when it is enabled, for data in RAM of 2 cachelines (2N and 2N+1) granularity, if one is fetched to cache, the other one could likely be fetched too, which sort of extends the cacheline size to double, thus the false sharing could happens in adjacent cachelines. 0Day has captured performance changed related with this [1], and some commercial software explicitly makes its hot global variables 128 bytes aligned (2 cache lines) to avoid this kind of extended false sharing. So add an option "--double-cl" for 'perf c2c report' to show false sharing in double cache line granularity, which acts just like the cacheline size is doubled. There is no change to c2c record. The hardware events of shared cacheline are still per cacheline, and this option just changes the granularity of how events are grouped and displayed. In the 'perf c2c report' output below (will-it-scale's 'pagefault2' case on old kernel): ---------------------------------------------------------------------- 26 31 2 0 0 0 0xffff888103ec6000 ---------------------------------------------------------------------- 35.48% 50.00% 0.00% 0.00% 0.00% 0x10 0 1 0xffffffff8133148b 1153 66 971 3748 74 [k] get_mem_cgroup_from_mm 6.45% 0.00% 0.00% 0.00% 0.00% 0x10 0 1 0xffffffff813396e4 570 0 1531 879 75 [k] mem_cgroup_charge 25.81% 50.00% 0.00% 0.00% 0.00% 0x54 0 1 0xffffffff81331472 949 70 593 3359 74 [k] get_mem_cgroup_from_mm 19.35% 0.00% 0.00% 0.00% 0.00% 0x54 0 1 0xffffffff81339686 1352 0 1073 1022 74 [k] mem_cgroup_charge 9.68% 0.00% 0.00% 0.00% 0.00% 0x54 0 1 0xffffffff813396d6 1401 0 863 768 74 [k] mem_cgroup_charge 3.23% 0.00% 0.00% 0.00% 0.00% 0x54 0 1 0xffffffff81333106 618 0 804 11 9 [k] uncharge_batch The offset 0x10 and 0x54 used to displayed in 2 groups, and now they are listed together to give users a hint of extended false sharing. [1]. https://lore.kernel.org/lkml/20201102091543.GM31092@shao2-debian/ Committer notes: Link: https://lore.kernel.org/r/Y+wvVNWqXb70l4uy@feng-clx Removed -a, leaving just as --double-cl, as this probably is not used so frequently and perhaps will be even auto-detected if we manage to record the MSR where this is configured. Reviewed-by: Andi Kleen <ak@linux.intel.com> Reviewed-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Feng Tang <feng.tang@intel.com> Tested-by: Leo Yan <leo.yan@linaro.org> Acked-by: Joe Mario <jmario@redhat.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Tim Chen <tim.c.chen@intel.com> Cc: Xing Zhengjun <zhengjun.xing@linux.intel.com> Link: https://lore.kernel.org/r/20230214075823.246414-1-feng.tang@intel.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2023-02-14 07:58:23 +00:00
if (right->mem_info)
r = cl_offset(mem_info__daddr(right->mem_info)->addr, chk_double_cl);
return (int64_t)(r - l);
}
static int
iaddr_entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
uint64_t addr = 0;
int width = c2c_width(fmt, hpp, he->hists);
char buf[20];
if (he->mem_info)
addr = mem_info__iaddr(he->mem_info)->addr;
return scnprintf(hpp->buf, hpp->size, "%*s", width, HEX_STR(buf, addr));
}
static int64_t
iaddr_cmp(struct perf_hpp_fmt *fmt __maybe_unused,
struct hist_entry *left, struct hist_entry *right)
{
return sort__iaddr_cmp(left, right);
}
static int
tot_hitm_entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
struct c2c_hist_entry *c2c_he;
int width = c2c_width(fmt, hpp, he->hists);
unsigned int tot_hitm;
c2c_he = container_of(he, struct c2c_hist_entry, he);
tot_hitm = c2c_he->stats.lcl_hitm + c2c_he->stats.rmt_hitm;
return scnprintf(hpp->buf, hpp->size, "%*u", width, tot_hitm);
}
static int64_t
tot_hitm_cmp(struct perf_hpp_fmt *fmt __maybe_unused,
struct hist_entry *left, struct hist_entry *right)
{
struct c2c_hist_entry *c2c_left;
struct c2c_hist_entry *c2c_right;
perf c2c: Fix return type for histogram sorting comparision functions Commit 722ddfde366f ("perf tools: Fix time sorting") changed - correctly so - hist_entry__sort to return int64. Unfortunately several of the builtin-c2c.c comparison routines only happened to work due the cast caused by the wrong return type. This causes meaningless ordering of both the cacheline list, and the cacheline details page. E.g a simple: perf c2c record -a sleep 3 perf c2c report will result in cacheline table like ================================================= Shared Data Cache Line Table ================================================= # # ------- Cacheline ---------- Total Tot - LLC Load Hitm - - Store Reference - - Load Dram - LLC Total - Core Load Hit - - LLC Load Hit - # Index Address Node PA cnt records Hitm Total Lcl Rmt Total L1Hit L1Miss Lcl Rmt Ld Miss Loads FB L1 L2 Llc Rmt # ..... .............. .... ...... ....... ...... ..... ..... ... .... ..... ...... ...... .... ...... ..... ..... ..... ... .... ....... 0 0x7f0d27ffba00 N/A 0 52 0.12% 13 6 7 12 12 0 0 7 14 40 4 16 0 0 0 1 0x7f0d27ff61c0 N/A 0 6353 14.04% 1475 801 674 779 779 0 0 718 1392 5574 1299 1967 0 115 0 2 0x7f0d26d3ec80 N/A 0 71 0.15% 16 4 12 13 13 0 0 12 24 58 1 20 0 9 0 3 0x7f0d26d3ec00 N/A 0 98 0.22% 23 17 6 19 19 0 0 6 12 79 0 40 0 10 0 i.e. with the list not being ordered by Total Hitm. Fixes: 722ddfde366f ("perf tools: Fix time sorting") Signed-off-by: Andres Freund <andres@anarazel.de> Tested-by: Michael Petlan <mpetlan@redhat.com> Acked-by: Jiri Olsa <jolsa@redhat.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: stable@vger.kernel.org # v3.16+ Link: http://lore.kernel.org/lkml/20200109043030.233746-1-andres@anarazel.de Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2020-01-09 04:30:30 +00:00
uint64_t tot_hitm_left;
uint64_t tot_hitm_right;
c2c_left = container_of(left, struct c2c_hist_entry, he);
c2c_right = container_of(right, struct c2c_hist_entry, he);
tot_hitm_left = c2c_left->stats.lcl_hitm + c2c_left->stats.rmt_hitm;
tot_hitm_right = c2c_right->stats.lcl_hitm + c2c_right->stats.rmt_hitm;
return tot_hitm_left - tot_hitm_right;
}
#define STAT_FN_ENTRY(__f) \
static int \
__f ## _entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp, \
struct hist_entry *he) \
{ \
struct c2c_hist_entry *c2c_he; \
int width = c2c_width(fmt, hpp, he->hists); \
\
c2c_he = container_of(he, struct c2c_hist_entry, he); \
return scnprintf(hpp->buf, hpp->size, "%*u", width, \
c2c_he->stats.__f); \
}
#define STAT_FN_CMP(__f) \
static int64_t \
__f ## _cmp(struct perf_hpp_fmt *fmt __maybe_unused, \
struct hist_entry *left, struct hist_entry *right) \
{ \
struct c2c_hist_entry *c2c_left, *c2c_right; \
\
c2c_left = container_of(left, struct c2c_hist_entry, he); \
c2c_right = container_of(right, struct c2c_hist_entry, he); \
perf c2c: Fix return type for histogram sorting comparision functions Commit 722ddfde366f ("perf tools: Fix time sorting") changed - correctly so - hist_entry__sort to return int64. Unfortunately several of the builtin-c2c.c comparison routines only happened to work due the cast caused by the wrong return type. This causes meaningless ordering of both the cacheline list, and the cacheline details page. E.g a simple: perf c2c record -a sleep 3 perf c2c report will result in cacheline table like ================================================= Shared Data Cache Line Table ================================================= # # ------- Cacheline ---------- Total Tot - LLC Load Hitm - - Store Reference - - Load Dram - LLC Total - Core Load Hit - - LLC Load Hit - # Index Address Node PA cnt records Hitm Total Lcl Rmt Total L1Hit L1Miss Lcl Rmt Ld Miss Loads FB L1 L2 Llc Rmt # ..... .............. .... ...... ....... ...... ..... ..... ... .... ..... ...... ...... .... ...... ..... ..... ..... ... .... ....... 0 0x7f0d27ffba00 N/A 0 52 0.12% 13 6 7 12 12 0 0 7 14 40 4 16 0 0 0 1 0x7f0d27ff61c0 N/A 0 6353 14.04% 1475 801 674 779 779 0 0 718 1392 5574 1299 1967 0 115 0 2 0x7f0d26d3ec80 N/A 0 71 0.15% 16 4 12 13 13 0 0 12 24 58 1 20 0 9 0 3 0x7f0d26d3ec00 N/A 0 98 0.22% 23 17 6 19 19 0 0 6 12 79 0 40 0 10 0 i.e. with the list not being ordered by Total Hitm. Fixes: 722ddfde366f ("perf tools: Fix time sorting") Signed-off-by: Andres Freund <andres@anarazel.de> Tested-by: Michael Petlan <mpetlan@redhat.com> Acked-by: Jiri Olsa <jolsa@redhat.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: stable@vger.kernel.org # v3.16+ Link: http://lore.kernel.org/lkml/20200109043030.233746-1-andres@anarazel.de Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2020-01-09 04:30:30 +00:00
return (uint64_t) c2c_left->stats.__f - \
(uint64_t) c2c_right->stats.__f; \
}
#define STAT_FN(__f) \
STAT_FN_ENTRY(__f) \
STAT_FN_CMP(__f)
STAT_FN(rmt_hitm)
STAT_FN(lcl_hitm)
STAT_FN(rmt_peer)
STAT_FN(lcl_peer)
STAT_FN(tot_peer)
STAT_FN(store)
STAT_FN(st_l1hit)
STAT_FN(st_l1miss)
STAT_FN(st_na)
STAT_FN(ld_fbhit)
STAT_FN(ld_l1hit)
STAT_FN(ld_l2hit)
STAT_FN(ld_llchit)
STAT_FN(rmt_hit)
static uint64_t get_load_llc_misses(struct c2c_stats *stats)
{
return stats->lcl_dram +
stats->rmt_dram +
stats->rmt_hitm +
stats->rmt_hit;
}
static uint64_t get_load_cache_hits(struct c2c_stats *stats)
{
return stats->ld_fbhit +
stats->ld_l1hit +
stats->ld_l2hit +
stats->ld_llchit +
stats->lcl_hitm;
}
static uint64_t get_stores(struct c2c_stats *stats)
{
return stats->st_l1hit +
stats->st_l1miss +
stats->st_na;
}
static uint64_t total_records(struct c2c_stats *stats)
{
return get_load_llc_misses(stats) +
get_load_cache_hits(stats) +
get_stores(stats);
}
static int
tot_recs_entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
struct c2c_hist_entry *c2c_he;
int width = c2c_width(fmt, hpp, he->hists);
uint64_t tot_recs;
c2c_he = container_of(he, struct c2c_hist_entry, he);
tot_recs = total_records(&c2c_he->stats);
return scnprintf(hpp->buf, hpp->size, "%*" PRIu64, width, tot_recs);
}
static int64_t
tot_recs_cmp(struct perf_hpp_fmt *fmt __maybe_unused,
struct hist_entry *left, struct hist_entry *right)
{
struct c2c_hist_entry *c2c_left;
struct c2c_hist_entry *c2c_right;
uint64_t tot_recs_left;
uint64_t tot_recs_right;
c2c_left = container_of(left, struct c2c_hist_entry, he);
c2c_right = container_of(right, struct c2c_hist_entry, he);
tot_recs_left = total_records(&c2c_left->stats);
tot_recs_right = total_records(&c2c_right->stats);
return tot_recs_left - tot_recs_right;
}
static uint64_t total_loads(struct c2c_stats *stats)
{
return get_load_llc_misses(stats) +
get_load_cache_hits(stats);
}
static int
tot_loads_entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
struct c2c_hist_entry *c2c_he;
int width = c2c_width(fmt, hpp, he->hists);
uint64_t tot_recs;
c2c_he = container_of(he, struct c2c_hist_entry, he);
tot_recs = total_loads(&c2c_he->stats);
return scnprintf(hpp->buf, hpp->size, "%*" PRIu64, width, tot_recs);
}
static int64_t
tot_loads_cmp(struct perf_hpp_fmt *fmt __maybe_unused,
struct hist_entry *left, struct hist_entry *right)
{
struct c2c_hist_entry *c2c_left;
struct c2c_hist_entry *c2c_right;
uint64_t tot_recs_left;
uint64_t tot_recs_right;
c2c_left = container_of(left, struct c2c_hist_entry, he);
c2c_right = container_of(right, struct c2c_hist_entry, he);
tot_recs_left = total_loads(&c2c_left->stats);
tot_recs_right = total_loads(&c2c_right->stats);
return tot_recs_left - tot_recs_right;
}
typedef double (get_percent_cb)(struct c2c_hist_entry *);
static int
percent_color(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he, get_percent_cb get_percent)
{
struct c2c_hist_entry *c2c_he;
int width = c2c_width(fmt, hpp, he->hists);
double per;
c2c_he = container_of(he, struct c2c_hist_entry, he);
per = get_percent(c2c_he);
#ifdef HAVE_SLANG_SUPPORT
if (use_browser)
return __hpp__slsmg_color_printf(hpp, "%*.2f%%", width - 1, per);
#endif
return hpp_color_scnprintf(hpp, "%*.2f%%", width - 1, per);
}
static double percent_costly_snoop(struct c2c_hist_entry *c2c_he)
{
struct c2c_hists *hists;
struct c2c_stats *stats;
struct c2c_stats *total;
int tot = 0, st = 0;
double p;
hists = container_of(c2c_he->he.hists, struct c2c_hists, hists);
stats = &c2c_he->stats;
total = &hists->stats;
switch (c2c.display) {
perf c2c: Use explicit names for display macros Perf c2c tool has an assumption that it heavily depends on HITM snoop type to detect cache false sharing, unfortunately, HITM is not supported on some architectures. Essentially, perf c2c tool wants to find some very costly snooping operations for false cache sharing, this means it's not necessarily to stick using HITM tags and we can explore other snooping types (e.g. SNOOPX_PEER). For this reason, this patch renames HITM related display macros with suffix '_HITM', so it can be distinct if later add more display types for on other snooping type. Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-10-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:45 +00:00
case DISPLAY_RMT_HITM:
st = stats->rmt_hitm;
tot = total->rmt_hitm;
break;
perf c2c: Use explicit names for display macros Perf c2c tool has an assumption that it heavily depends on HITM snoop type to detect cache false sharing, unfortunately, HITM is not supported on some architectures. Essentially, perf c2c tool wants to find some very costly snooping operations for false cache sharing, this means it's not necessarily to stick using HITM tags and we can explore other snooping types (e.g. SNOOPX_PEER). For this reason, this patch renames HITM related display macros with suffix '_HITM', so it can be distinct if later add more display types for on other snooping type. Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-10-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:45 +00:00
case DISPLAY_LCL_HITM:
st = stats->lcl_hitm;
tot = total->lcl_hitm;
break;
perf c2c: Use explicit names for display macros Perf c2c tool has an assumption that it heavily depends on HITM snoop type to detect cache false sharing, unfortunately, HITM is not supported on some architectures. Essentially, perf c2c tool wants to find some very costly snooping operations for false cache sharing, this means it's not necessarily to stick using HITM tags and we can explore other snooping types (e.g. SNOOPX_PEER). For this reason, this patch renames HITM related display macros with suffix '_HITM', so it can be distinct if later add more display types for on other snooping type. Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-10-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:45 +00:00
case DISPLAY_TOT_HITM:
st = stats->tot_hitm;
tot = total->tot_hitm;
perf c2c: Sort on peer snooping for load operations This patch adds a new option 'peer' so can sort on the cache hit for peer snooping. For displaying with option 'peer', the "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" both sort with the metrics "tot_peer". As result, we can get the 'peer' display: # perf c2c report -d peer --coalesce tid,pid,iaddr,dso -N --stdio ================================================= Shared Data Cache Line Table ================================================= # # ----------- Cacheline ---------- Peer ------- Load Peer ------- Total Total Total --------- Stores -------- ----- Core Load Hit ----- - LLC Load Hit -- - RMT Load Hit -- --- Load Dram ---- # Index Address Node PA cnt Snoop Total Local Remote records Loads Stores L1Hit L1Miss N/A FB L1 L2 LclHit LclHitm RmtHit RmtHitm Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ....... ........ ....... ........ ........ # 0 0xaaaac17d6000 N/A 0 100.00% 99 99 0 18851 18851 0 0 0 0 0 18752 0 99 0 0 0 0 0 ================================================= Shared Cache Line Distribution Pareto ================================================= # # -- Peer Snoop -- ------- Store Refs ------ --------- Data address --------- ---------- cycles ---------- Total cpu Shared # Num Rmt Lcl L1 Hit L1 Miss N/A Offset Node PA cnt Pid Tid Code address rmt peer lcl peer load records cnt Symbol Object Source:Line Node{cpus %peers %stores} # ..... ....... ....... ....... ....... ....... .................. .... ...... ....... ................. .................. ........ ........ ........ ....... ........ ...................... ................ ............... .... # ---------------------------------------------------------------------- 0 0 99 0 0 0 0xaaaac17d6000 ---------------------------------------------------------------------- 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3603:memstress 0xaaaac17c25ac 0 376 41 9314 2 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 2 100.0% n/a} 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3606:memstress 0xaaaac17c25ac 0 375 44 9155 1 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 1 100.0% n/a} 0.00% 48.48% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3606:memstress 0xaaaac17c3e88 0 180 170 65 1 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 1 100.0% n/a} 0.00% 45.45% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3603:memstress 0xaaaac17c3e88 0 180 175 70 2 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 2 100.0% n/a} Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-14-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:49 +00:00
break;
case DISPLAY_SNP_PEER:
st = stats->tot_peer;
tot = total->tot_peer;
break;
default:
break;
}
p = tot ? (double) st / tot : 0;
return 100 * p;
}
#define PERC_STR(__s, __v) \
({ \
scnprintf(__s, sizeof(__s), "%.2F%%", __v); \
__s; \
})
static int
percent_costly_snoop_entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
struct c2c_hist_entry *c2c_he;
int width = c2c_width(fmt, hpp, he->hists);
char buf[10];
double per;
c2c_he = container_of(he, struct c2c_hist_entry, he);
per = percent_costly_snoop(c2c_he);
return scnprintf(hpp->buf, hpp->size, "%*s", width, PERC_STR(buf, per));
}
static int
percent_costly_snoop_color(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
return percent_color(fmt, hpp, he, percent_costly_snoop);
}
static int64_t
percent_costly_snoop_cmp(struct perf_hpp_fmt *fmt __maybe_unused,
struct hist_entry *left, struct hist_entry *right)
{
struct c2c_hist_entry *c2c_left;
struct c2c_hist_entry *c2c_right;
double per_left;
double per_right;
c2c_left = container_of(left, struct c2c_hist_entry, he);
c2c_right = container_of(right, struct c2c_hist_entry, he);
per_left = percent_costly_snoop(c2c_left);
per_right = percent_costly_snoop(c2c_right);
return per_left - per_right;
}
static struct c2c_stats *he_stats(struct hist_entry *he)
{
struct c2c_hist_entry *c2c_he;
c2c_he = container_of(he, struct c2c_hist_entry, he);
return &c2c_he->stats;
}
static struct c2c_stats *total_stats(struct hist_entry *he)
{
struct c2c_hists *hists;
hists = container_of(he->hists, struct c2c_hists, hists);
return &hists->stats;
}
static double percent(u32 st, u32 tot)
{
return tot ? 100. * (double) st / (double) tot : 0;
}
#define PERCENT(__h, __f) percent(he_stats(__h)->__f, total_stats(__h)->__f)
#define PERCENT_FN(__f) \
static double percent_ ## __f(struct c2c_hist_entry *c2c_he) \
{ \
struct c2c_hists *hists; \
\
hists = container_of(c2c_he->he.hists, struct c2c_hists, hists); \
return percent(c2c_he->stats.__f, hists->stats.__f); \
}
PERCENT_FN(rmt_hitm)
PERCENT_FN(lcl_hitm)
PERCENT_FN(rmt_peer)
PERCENT_FN(lcl_peer)
PERCENT_FN(st_l1hit)
PERCENT_FN(st_l1miss)
PERCENT_FN(st_na)
static int
percent_rmt_hitm_entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
int width = c2c_width(fmt, hpp, he->hists);
double per = PERCENT(he, rmt_hitm);
char buf[10];
return scnprintf(hpp->buf, hpp->size, "%*s", width, PERC_STR(buf, per));
}
static int
percent_rmt_hitm_color(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
return percent_color(fmt, hpp, he, percent_rmt_hitm);
}
static int64_t
percent_rmt_hitm_cmp(struct perf_hpp_fmt *fmt __maybe_unused,
struct hist_entry *left, struct hist_entry *right)
{
double per_left;
double per_right;
per_left = PERCENT(left, rmt_hitm);
per_right = PERCENT(right, rmt_hitm);
return per_left - per_right;
}
static int
percent_lcl_hitm_entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
int width = c2c_width(fmt, hpp, he->hists);
double per = PERCENT(he, lcl_hitm);
char buf[10];
return scnprintf(hpp->buf, hpp->size, "%*s", width, PERC_STR(buf, per));
}
static int
percent_lcl_hitm_color(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
return percent_color(fmt, hpp, he, percent_lcl_hitm);
}
static int64_t
percent_lcl_hitm_cmp(struct perf_hpp_fmt *fmt __maybe_unused,
struct hist_entry *left, struct hist_entry *right)
{
double per_left;
double per_right;
per_left = PERCENT(left, lcl_hitm);
per_right = PERCENT(right, lcl_hitm);
return per_left - per_right;
}
static int
percent_lcl_peer_entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
int width = c2c_width(fmt, hpp, he->hists);
double per = PERCENT(he, lcl_peer);
char buf[10];
return scnprintf(hpp->buf, hpp->size, "%*s", width, PERC_STR(buf, per));
}
static int
percent_lcl_peer_color(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
return percent_color(fmt, hpp, he, percent_lcl_peer);
}
static int64_t
percent_lcl_peer_cmp(struct perf_hpp_fmt *fmt __maybe_unused,
struct hist_entry *left, struct hist_entry *right)
{
double per_left;
double per_right;
per_left = PERCENT(left, lcl_peer);
per_right = PERCENT(right, lcl_peer);
return per_left - per_right;
}
static int
percent_rmt_peer_entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
int width = c2c_width(fmt, hpp, he->hists);
double per = PERCENT(he, rmt_peer);
char buf[10];
return scnprintf(hpp->buf, hpp->size, "%*s", width, PERC_STR(buf, per));
}
static int
percent_rmt_peer_color(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
return percent_color(fmt, hpp, he, percent_rmt_peer);
}
static int64_t
percent_rmt_peer_cmp(struct perf_hpp_fmt *fmt __maybe_unused,
struct hist_entry *left, struct hist_entry *right)
{
double per_left;
double per_right;
per_left = PERCENT(left, rmt_peer);
per_right = PERCENT(right, rmt_peer);
return per_left - per_right;
}
static int
percent_stores_l1hit_entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
int width = c2c_width(fmt, hpp, he->hists);
double per = PERCENT(he, st_l1hit);
char buf[10];
return scnprintf(hpp->buf, hpp->size, "%*s", width, PERC_STR(buf, per));
}
static int
percent_stores_l1hit_color(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
return percent_color(fmt, hpp, he, percent_st_l1hit);
}
static int64_t
percent_stores_l1hit_cmp(struct perf_hpp_fmt *fmt __maybe_unused,
struct hist_entry *left, struct hist_entry *right)
{
double per_left;
double per_right;
per_left = PERCENT(left, st_l1hit);
per_right = PERCENT(right, st_l1hit);
return per_left - per_right;
}
static int
percent_stores_l1miss_entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
int width = c2c_width(fmt, hpp, he->hists);
double per = PERCENT(he, st_l1miss);
char buf[10];
return scnprintf(hpp->buf, hpp->size, "%*s", width, PERC_STR(buf, per));
}
static int
percent_stores_l1miss_color(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
return percent_color(fmt, hpp, he, percent_st_l1miss);
}
static int64_t
percent_stores_l1miss_cmp(struct perf_hpp_fmt *fmt __maybe_unused,
struct hist_entry *left, struct hist_entry *right)
{
double per_left;
double per_right;
per_left = PERCENT(left, st_l1miss);
per_right = PERCENT(right, st_l1miss);
return per_left - per_right;
}
static int
percent_stores_na_entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
int width = c2c_width(fmt, hpp, he->hists);
double per = PERCENT(he, st_na);
char buf[10];
return scnprintf(hpp->buf, hpp->size, "%*s", width, PERC_STR(buf, per));
}
static int
percent_stores_na_color(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
return percent_color(fmt, hpp, he, percent_st_na);
}
static int64_t
percent_stores_na_cmp(struct perf_hpp_fmt *fmt __maybe_unused,
struct hist_entry *left, struct hist_entry *right)
{
double per_left;
double per_right;
per_left = PERCENT(left, st_na);
per_right = PERCENT(right, st_na);
return per_left - per_right;
}
STAT_FN(lcl_dram)
STAT_FN(rmt_dram)
static int
pid_entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
int width = c2c_width(fmt, hpp, he->hists);
perf thread: Add accessor functions for thread Using accessors will make it easier to add reference count checking in later patches. Committer notes: thread->nsinfo wasn't wrapped as it is used together with nsinfo__zput(), where does a trick to set the field with a refcount being dropped to NULL, and that doesn't work well with using thread__nsinfo(thread), that loses the &thread->nsinfo pointer. When refcount checking is added to 'struct thread', later in this series, nsinfo__zput(RC_CHK_ACCESS(thread)->nsinfo) will be used to check the thread pointer. Signed-off-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Ali Saidi <alisaidi@amazon.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Athira Rajeev <atrajeev@linux.vnet.ibm.com> Cc: Brian Robbins <brianrob@linux.microsoft.com> Cc: Changbin Du <changbin.du@huawei.com> Cc: Dmitrii Dolgov <9erthalion6@gmail.com> Cc: Fangrui Song <maskray@google.com> Cc: German Gomez <german.gomez@arm.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Ivan Babrou <ivan@cloudflare.com> Cc: James Clark <james.clark@arm.com> Cc: Jing Zhang <renyu.zj@linux.alibaba.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.g.garry@oracle.com> Cc: K Prateek Nayak <kprateek.nayak@amd.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Liam Howlett <liam.howlett@oracle.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Miguel Ojeda <ojeda@kernel.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ravi Bangoria <ravi.bangoria@amd.com> Cc: Sean Christopherson <seanjc@google.com> Cc: Steinar H. Gunderson <sesse@google.com> Cc: Suzuki Poulouse <suzuki.poulose@arm.com> Cc: Wenyu Liu <liuwenyu7@huawei.com> Cc: Will Deacon <will@kernel.org> Cc: Yang Jihong <yangjihong1@huawei.com> Cc: Ye Xingchen <ye.xingchen@zte.com.cn> Cc: Yuan Can <yuancan@huawei.com> Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20230608232823.4027869-4-irogers@google.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2023-06-08 23:28:00 +00:00
return scnprintf(hpp->buf, hpp->size, "%*d", width, thread__pid(he->thread));
}
static int64_t
pid_cmp(struct perf_hpp_fmt *fmt __maybe_unused,
struct hist_entry *left, struct hist_entry *right)
{
perf thread: Add accessor functions for thread Using accessors will make it easier to add reference count checking in later patches. Committer notes: thread->nsinfo wasn't wrapped as it is used together with nsinfo__zput(), where does a trick to set the field with a refcount being dropped to NULL, and that doesn't work well with using thread__nsinfo(thread), that loses the &thread->nsinfo pointer. When refcount checking is added to 'struct thread', later in this series, nsinfo__zput(RC_CHK_ACCESS(thread)->nsinfo) will be used to check the thread pointer. Signed-off-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Ali Saidi <alisaidi@amazon.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Athira Rajeev <atrajeev@linux.vnet.ibm.com> Cc: Brian Robbins <brianrob@linux.microsoft.com> Cc: Changbin Du <changbin.du@huawei.com> Cc: Dmitrii Dolgov <9erthalion6@gmail.com> Cc: Fangrui Song <maskray@google.com> Cc: German Gomez <german.gomez@arm.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Ivan Babrou <ivan@cloudflare.com> Cc: James Clark <james.clark@arm.com> Cc: Jing Zhang <renyu.zj@linux.alibaba.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.g.garry@oracle.com> Cc: K Prateek Nayak <kprateek.nayak@amd.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Liam Howlett <liam.howlett@oracle.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Miguel Ojeda <ojeda@kernel.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ravi Bangoria <ravi.bangoria@amd.com> Cc: Sean Christopherson <seanjc@google.com> Cc: Steinar H. Gunderson <sesse@google.com> Cc: Suzuki Poulouse <suzuki.poulose@arm.com> Cc: Wenyu Liu <liuwenyu7@huawei.com> Cc: Will Deacon <will@kernel.org> Cc: Yang Jihong <yangjihong1@huawei.com> Cc: Ye Xingchen <ye.xingchen@zte.com.cn> Cc: Yuan Can <yuancan@huawei.com> Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20230608232823.4027869-4-irogers@google.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2023-06-08 23:28:00 +00:00
return thread__pid(left->thread) - thread__pid(right->thread);
}
static int64_t
empty_cmp(struct perf_hpp_fmt *fmt __maybe_unused,
struct hist_entry *left __maybe_unused,
struct hist_entry *right __maybe_unused)
{
return 0;
}
static int display_metrics(struct perf_hpp *hpp, u32 val, u32 sum)
{
int ret;
if (sum != 0)
ret = scnprintf(hpp->buf, hpp->size, "%5.1f%% ",
percent(val, sum));
else
ret = scnprintf(hpp->buf, hpp->size, "%6s ", "n/a");
return ret;
}
static int
node_entry(struct perf_hpp_fmt *fmt __maybe_unused, struct perf_hpp *hpp,
struct hist_entry *he)
{
struct c2c_hist_entry *c2c_he;
bool first = true;
int node;
int ret = 0;
c2c_he = container_of(he, struct c2c_hist_entry, he);
for (node = 0; node < c2c.nodes_cnt; node++) {
DECLARE_BITMAP(set, c2c.cpus_cnt);
bitmap_zero(set, c2c.cpus_cnt);
bitmap_and(set, c2c_he->cpuset, c2c.nodes[node], c2c.cpus_cnt);
if (bitmap_empty(set, c2c.cpus_cnt)) {
if (c2c.node_info == 1) {
ret = scnprintf(hpp->buf, hpp->size, "%21s", " ");
advance_hpp(hpp, ret);
}
continue;
}
if (!first) {
ret = scnprintf(hpp->buf, hpp->size, " ");
advance_hpp(hpp, ret);
}
switch (c2c.node_info) {
case 0:
ret = scnprintf(hpp->buf, hpp->size, "%2d", node);
advance_hpp(hpp, ret);
break;
case 1:
{
int num = bitmap_weight(set, c2c.cpus_cnt);
struct c2c_stats *stats = &c2c_he->node_stats[node];
ret = scnprintf(hpp->buf, hpp->size, "%2d{%2d ", node, num);
advance_hpp(hpp, ret);
switch (c2c.display) {
perf c2c: Use explicit names for display macros Perf c2c tool has an assumption that it heavily depends on HITM snoop type to detect cache false sharing, unfortunately, HITM is not supported on some architectures. Essentially, perf c2c tool wants to find some very costly snooping operations for false cache sharing, this means it's not necessarily to stick using HITM tags and we can explore other snooping types (e.g. SNOOPX_PEER). For this reason, this patch renames HITM related display macros with suffix '_HITM', so it can be distinct if later add more display types for on other snooping type. Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-10-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:45 +00:00
case DISPLAY_RMT_HITM:
ret = display_metrics(hpp, stats->rmt_hitm,
c2c_he->stats.rmt_hitm);
break;
perf c2c: Use explicit names for display macros Perf c2c tool has an assumption that it heavily depends on HITM snoop type to detect cache false sharing, unfortunately, HITM is not supported on some architectures. Essentially, perf c2c tool wants to find some very costly snooping operations for false cache sharing, this means it's not necessarily to stick using HITM tags and we can explore other snooping types (e.g. SNOOPX_PEER). For this reason, this patch renames HITM related display macros with suffix '_HITM', so it can be distinct if later add more display types for on other snooping type. Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-10-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:45 +00:00
case DISPLAY_LCL_HITM:
ret = display_metrics(hpp, stats->lcl_hitm,
c2c_he->stats.lcl_hitm);
break;
perf c2c: Use explicit names for display macros Perf c2c tool has an assumption that it heavily depends on HITM snoop type to detect cache false sharing, unfortunately, HITM is not supported on some architectures. Essentially, perf c2c tool wants to find some very costly snooping operations for false cache sharing, this means it's not necessarily to stick using HITM tags and we can explore other snooping types (e.g. SNOOPX_PEER). For this reason, this patch renames HITM related display macros with suffix '_HITM', so it can be distinct if later add more display types for on other snooping type. Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-10-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:45 +00:00
case DISPLAY_TOT_HITM:
ret = display_metrics(hpp, stats->tot_hitm,
c2c_he->stats.tot_hitm);
break;
perf c2c: Sort on peer snooping for load operations This patch adds a new option 'peer' so can sort on the cache hit for peer snooping. For displaying with option 'peer', the "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" both sort with the metrics "tot_peer". As result, we can get the 'peer' display: # perf c2c report -d peer --coalesce tid,pid,iaddr,dso -N --stdio ================================================= Shared Data Cache Line Table ================================================= # # ----------- Cacheline ---------- Peer ------- Load Peer ------- Total Total Total --------- Stores -------- ----- Core Load Hit ----- - LLC Load Hit -- - RMT Load Hit -- --- Load Dram ---- # Index Address Node PA cnt Snoop Total Local Remote records Loads Stores L1Hit L1Miss N/A FB L1 L2 LclHit LclHitm RmtHit RmtHitm Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ....... ........ ....... ........ ........ # 0 0xaaaac17d6000 N/A 0 100.00% 99 99 0 18851 18851 0 0 0 0 0 18752 0 99 0 0 0 0 0 ================================================= Shared Cache Line Distribution Pareto ================================================= # # -- Peer Snoop -- ------- Store Refs ------ --------- Data address --------- ---------- cycles ---------- Total cpu Shared # Num Rmt Lcl L1 Hit L1 Miss N/A Offset Node PA cnt Pid Tid Code address rmt peer lcl peer load records cnt Symbol Object Source:Line Node{cpus %peers %stores} # ..... ....... ....... ....... ....... ....... .................. .... ...... ....... ................. .................. ........ ........ ........ ....... ........ ...................... ................ ............... .... # ---------------------------------------------------------------------- 0 0 99 0 0 0 0xaaaac17d6000 ---------------------------------------------------------------------- 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3603:memstress 0xaaaac17c25ac 0 376 41 9314 2 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 2 100.0% n/a} 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3606:memstress 0xaaaac17c25ac 0 375 44 9155 1 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 1 100.0% n/a} 0.00% 48.48% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3606:memstress 0xaaaac17c3e88 0 180 170 65 1 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 1 100.0% n/a} 0.00% 45.45% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3603:memstress 0xaaaac17c3e88 0 180 175 70 2 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 2 100.0% n/a} Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-14-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:49 +00:00
case DISPLAY_SNP_PEER:
ret = display_metrics(hpp, stats->tot_peer,
c2c_he->stats.tot_peer);
break;
default:
break;
}
advance_hpp(hpp, ret);
if (c2c_he->stats.store > 0) {
ret = scnprintf(hpp->buf, hpp->size, "%5.1f%%}",
percent(stats->store, c2c_he->stats.store));
} else {
ret = scnprintf(hpp->buf, hpp->size, "%6s}", "n/a");
}
advance_hpp(hpp, ret);
break;
}
case 2:
ret = scnprintf(hpp->buf, hpp->size, "%2d{", node);
advance_hpp(hpp, ret);
ret = bitmap_scnprintf(set, c2c.cpus_cnt, hpp->buf, hpp->size);
advance_hpp(hpp, ret);
ret = scnprintf(hpp->buf, hpp->size, "}");
advance_hpp(hpp, ret);
break;
default:
break;
}
first = false;
}
return 0;
}
static int
mean_entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he, double mean)
{
int width = c2c_width(fmt, hpp, he->hists);
char buf[10];
scnprintf(buf, 10, "%6.0f", mean);
return scnprintf(hpp->buf, hpp->size, "%*s", width, buf);
}
#define MEAN_ENTRY(__func, __val) \
static int \
__func(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp, struct hist_entry *he) \
{ \
struct c2c_hist_entry *c2c_he; \
c2c_he = container_of(he, struct c2c_hist_entry, he); \
return mean_entry(fmt, hpp, he, avg_stats(&c2c_he->cstats.__val)); \
}
MEAN_ENTRY(mean_rmt_entry, rmt_hitm);
MEAN_ENTRY(mean_lcl_entry, lcl_hitm);
MEAN_ENTRY(mean_load_entry, load);
MEAN_ENTRY(mean_rmt_peer_entry, rmt_peer);
MEAN_ENTRY(mean_lcl_peer_entry, lcl_peer);
static int
cpucnt_entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
struct c2c_hist_entry *c2c_he;
int width = c2c_width(fmt, hpp, he->hists);
char buf[10];
c2c_he = container_of(he, struct c2c_hist_entry, he);
scnprintf(buf, 10, "%d", bitmap_weight(c2c_he->cpuset, c2c.cpus_cnt));
return scnprintf(hpp->buf, hpp->size, "%*s", width, buf);
}
perf c2c report: Add cacheline index entry It's convenient to have an index for each cacheline to help discussions about results over the phone. Add new 'Index' and 'Num' fields in main and single cacheline tables. $ perf c2c report ================================================= Shared Data Cache Line Table ================================================= # # Total Lcl ----- LLC Load Hitm ----- # Index Cacheline records Hitm Total Lcl Rmt ... # ..... .................. ....... ....... ....... ....... ....... # 0 0xffff880036233b40 1 11.11% 1 1 0 1 0xffff88009ccb2900 1 11.11% 1 1 0 2 0xffff8800b5b3bc40 7 11.11% 1 1 0 ... ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Pid ... # ..... ....... ....... ....... ....... .................. ....... # ------------------------------------------------------------- 0 0 1 0 0 0xffff880036233b40 ------------------------------------------------------------- 0.00% 100.00% 0.00% 0.00% 0x30 0 ------------------------------------------------------------- 1 0 1 0 0 0xffff88009ccb2900 ------------------------------------------------------------- 0.00% 100.00% 0.00% 0.00% 0x28 549 ... Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-4dhfagaz57tvrfjbg8nd2h4u@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-07-06 13:40:09 +00:00
static int
cl_idx_entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
perf c2c report: Add cacheline index entry It's convenient to have an index for each cacheline to help discussions about results over the phone. Add new 'Index' and 'Num' fields in main and single cacheline tables. $ perf c2c report ================================================= Shared Data Cache Line Table ================================================= # # Total Lcl ----- LLC Load Hitm ----- # Index Cacheline records Hitm Total Lcl Rmt ... # ..... .................. ....... ....... ....... ....... ....... # 0 0xffff880036233b40 1 11.11% 1 1 0 1 0xffff88009ccb2900 1 11.11% 1 1 0 2 0xffff8800b5b3bc40 7 11.11% 1 1 0 ... ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Pid ... # ..... ....... ....... ....... ....... .................. ....... # ------------------------------------------------------------- 0 0 1 0 0 0xffff880036233b40 ------------------------------------------------------------- 0.00% 100.00% 0.00% 0.00% 0x30 0 ------------------------------------------------------------- 1 0 1 0 0 0xffff88009ccb2900 ------------------------------------------------------------- 0.00% 100.00% 0.00% 0.00% 0x28 549 ... Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-4dhfagaz57tvrfjbg8nd2h4u@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-07-06 13:40:09 +00:00
struct hist_entry *he)
{
struct c2c_hist_entry *c2c_he;
int width = c2c_width(fmt, hpp, he->hists);
char buf[10];
c2c_he = container_of(he, struct c2c_hist_entry, he);
scnprintf(buf, 10, "%u", c2c_he->cacheline_idx);
return scnprintf(hpp->buf, hpp->size, "%*s", width, buf);
}
static int
cl_idx_empty_entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
perf c2c report: Add cacheline index entry It's convenient to have an index for each cacheline to help discussions about results over the phone. Add new 'Index' and 'Num' fields in main and single cacheline tables. $ perf c2c report ================================================= Shared Data Cache Line Table ================================================= # # Total Lcl ----- LLC Load Hitm ----- # Index Cacheline records Hitm Total Lcl Rmt ... # ..... .................. ....... ....... ....... ....... ....... # 0 0xffff880036233b40 1 11.11% 1 1 0 1 0xffff88009ccb2900 1 11.11% 1 1 0 2 0xffff8800b5b3bc40 7 11.11% 1 1 0 ... ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Pid ... # ..... ....... ....... ....... ....... .................. ....... # ------------------------------------------------------------- 0 0 1 0 0 0xffff880036233b40 ------------------------------------------------------------- 0.00% 100.00% 0.00% 0.00% 0x30 0 ------------------------------------------------------------- 1 0 1 0 0 0xffff88009ccb2900 ------------------------------------------------------------- 0.00% 100.00% 0.00% 0.00% 0x28 549 ... Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-4dhfagaz57tvrfjbg8nd2h4u@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-07-06 13:40:09 +00:00
struct hist_entry *he)
{
int width = c2c_width(fmt, hpp, he->hists);
return scnprintf(hpp->buf, hpp->size, "%*s", width, "");
}
#define HEADER_LOW(__h) \
{ \
.line[1] = { \
.text = __h, \
}, \
}
#define HEADER_BOTH(__h0, __h1) \
{ \
.line[0] = { \
.text = __h0, \
}, \
.line[1] = { \
.text = __h1, \
}, \
}
#define HEADER_SPAN(__h0, __h1, __s) \
{ \
.line[0] = { \
.text = __h0, \
.span = __s, \
}, \
.line[1] = { \
.text = __h1, \
}, \
}
#define HEADER_SPAN_LOW(__h) \
{ \
.line[1] = { \
.text = __h, \
}, \
}
static struct c2c_dimension dim_dcacheline = {
perf c2c report: Add cacheline address count column Adding the 'PA cnt' column grouped under data cacheline address. It shows how many times the physical addresses changed for the hist entry. It does not show the number of different physical addresses for entry, because we don't store those. We only track the number of times we got different address than we currently hold, which is not expensive and gives similar info. $ perf c2c report --stdio # ----------- Cacheline ---------- Total Tot ----- LLC Load Hitm ----- # Index Address Node PA cnt records Hitm Total Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... # 0 0xffff9ad56dca0a80 0 9 10 7.69% 2 2 0 1 0xffff9ad56dce0a80 0 9 9 7.69% 2 2 0 2 0xffff9ad37659ad80 0 1 2 3.85% 1 1 0 ... # ----- HITM ----- -- Store Refs -- --------- Data address --------- # Num Rmt Lcl L1 Hit L1 Miss Offset Node PA cnt Pid # ..... ....... ....... ....... ....... .................. .... ...... ....... # ------------------------------------------------------------- 0 0 2 3 0 0xffff9ad56dca0a80 ------------------------------------------------------------- 0.00% 0.00% 33.33% 0.00% 0x0 0 1 2510 0.00% 0.00% 33.33% 0.00% 0x4 0 1 2476 0.00% 0.00% 33.33% 0.00% 0x20 0 1 0 0.00% 100.00% 0.00% 0.00% 0x38 0 1 0 Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-10-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:42 +00:00
.header = HEADER_SPAN("--- Cacheline ----", "Address", 2),
.name = "dcacheline",
.cmp = dcacheline_cmp,
.entry = dcacheline_entry,
.width = 18,
};
perf c2c report: Display node for cacheline address Adding the NUMA node info for the data cacheline. Adding the new column to both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto". Note the new 'Node' column next to the 'Cacheline'. $ perf c2c report --stdio ================================================= Shared Data Cache Line Table ================================================= # # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 ... Note the new 'Node' column next to the 'Offset'. ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Using the mem2node object to get the NUMA node data. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-8-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:40 +00:00
static struct c2c_dimension dim_dcacheline_node = {
.header = HEADER_LOW("Node"),
.name = "dcacheline_node",
.cmp = empty_cmp,
.entry = dcacheline_node_entry,
.width = 4,
};
perf c2c report: Add cacheline address count column Adding the 'PA cnt' column grouped under data cacheline address. It shows how many times the physical addresses changed for the hist entry. It does not show the number of different physical addresses for entry, because we don't store those. We only track the number of times we got different address than we currently hold, which is not expensive and gives similar info. $ perf c2c report --stdio # ----------- Cacheline ---------- Total Tot ----- LLC Load Hitm ----- # Index Address Node PA cnt records Hitm Total Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... # 0 0xffff9ad56dca0a80 0 9 10 7.69% 2 2 0 1 0xffff9ad56dce0a80 0 9 9 7.69% 2 2 0 2 0xffff9ad37659ad80 0 1 2 3.85% 1 1 0 ... # ----- HITM ----- -- Store Refs -- --------- Data address --------- # Num Rmt Lcl L1 Hit L1 Miss Offset Node PA cnt Pid # ..... ....... ....... ....... ....... .................. .... ...... ....... # ------------------------------------------------------------- 0 0 2 3 0 0xffff9ad56dca0a80 ------------------------------------------------------------- 0.00% 0.00% 33.33% 0.00% 0x0 0 1 2510 0.00% 0.00% 33.33% 0.00% 0x4 0 1 2476 0.00% 0.00% 33.33% 0.00% 0x20 0 1 0 0.00% 100.00% 0.00% 0.00% 0x38 0 1 0 Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-10-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:42 +00:00
static struct c2c_dimension dim_dcacheline_count = {
.header = HEADER_LOW("PA cnt"),
.name = "dcacheline_count",
.cmp = empty_cmp,
.entry = dcacheline_node_count,
.width = 6,
};
static struct c2c_header header_offset_tui = HEADER_SPAN("-----", "Off", 2);
static struct c2c_dimension dim_offset = {
perf c2c report: Add cacheline address count column Adding the 'PA cnt' column grouped under data cacheline address. It shows how many times the physical addresses changed for the hist entry. It does not show the number of different physical addresses for entry, because we don't store those. We only track the number of times we got different address than we currently hold, which is not expensive and gives similar info. $ perf c2c report --stdio # ----------- Cacheline ---------- Total Tot ----- LLC Load Hitm ----- # Index Address Node PA cnt records Hitm Total Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... # 0 0xffff9ad56dca0a80 0 9 10 7.69% 2 2 0 1 0xffff9ad56dce0a80 0 9 9 7.69% 2 2 0 2 0xffff9ad37659ad80 0 1 2 3.85% 1 1 0 ... # ----- HITM ----- -- Store Refs -- --------- Data address --------- # Num Rmt Lcl L1 Hit L1 Miss Offset Node PA cnt Pid # ..... ....... ....... ....... ....... .................. .... ...... ....... # ------------------------------------------------------------- 0 0 2 3 0 0xffff9ad56dca0a80 ------------------------------------------------------------- 0.00% 0.00% 33.33% 0.00% 0x0 0 1 2510 0.00% 0.00% 33.33% 0.00% 0x4 0 1 2476 0.00% 0.00% 33.33% 0.00% 0x20 0 1 0 0.00% 100.00% 0.00% 0.00% 0x38 0 1 0 Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-10-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:42 +00:00
.header = HEADER_SPAN("--- Data address -", "Offset", 2),
.name = "offset",
.cmp = offset_cmp,
.entry = offset_entry,
.width = 18,
};
perf c2c report: Display node for cacheline address Adding the NUMA node info for the data cacheline. Adding the new column to both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto". Note the new 'Node' column next to the 'Cacheline'. $ perf c2c report --stdio ================================================= Shared Data Cache Line Table ================================================= # # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 ... Note the new 'Node' column next to the 'Offset'. ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Using the mem2node object to get the NUMA node data. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-8-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:40 +00:00
static struct c2c_dimension dim_offset_node = {
.header = HEADER_LOW("Node"),
.name = "offset_node",
.cmp = empty_cmp,
.entry = dcacheline_node_entry,
.width = 4,
};
static struct c2c_dimension dim_iaddr = {
.header = HEADER_LOW("Code address"),
.name = "iaddr",
.cmp = iaddr_cmp,
.entry = iaddr_entry,
.width = 18,
};
static struct c2c_dimension dim_tot_hitm = {
.header = HEADER_SPAN("------- Load Hitm -------", "Total", 2),
.name = "tot_hitm",
.cmp = tot_hitm_cmp,
.entry = tot_hitm_entry,
.width = 7,
};
static struct c2c_dimension dim_lcl_hitm = {
.header = HEADER_SPAN_LOW("LclHitm"),
.name = "lcl_hitm",
.cmp = lcl_hitm_cmp,
.entry = lcl_hitm_entry,
.width = 7,
};
static struct c2c_dimension dim_rmt_hitm = {
.header = HEADER_SPAN_LOW("RmtHitm"),
.name = "rmt_hitm",
.cmp = rmt_hitm_cmp,
.entry = rmt_hitm_entry,
.width = 7,
};
static struct c2c_dimension dim_tot_peer = {
.header = HEADER_SPAN("------- Load Peer -------", "Total", 2),
.name = "tot_peer",
.cmp = tot_peer_cmp,
.entry = tot_peer_entry,
.width = 7,
};
static struct c2c_dimension dim_lcl_peer = {
.header = HEADER_SPAN_LOW("Local"),
.name = "lcl_peer",
.cmp = lcl_peer_cmp,
.entry = lcl_peer_entry,
.width = 7,
};
static struct c2c_dimension dim_rmt_peer = {
.header = HEADER_SPAN_LOW("Remote"),
.name = "rmt_peer",
.cmp = rmt_peer_cmp,
.entry = rmt_peer_entry,
.width = 7,
};
static struct c2c_dimension dim_cl_rmt_hitm = {
.header = HEADER_SPAN("----- HITM -----", "Rmt", 1),
.name = "cl_rmt_hitm",
.cmp = rmt_hitm_cmp,
.entry = rmt_hitm_entry,
.width = 7,
};
static struct c2c_dimension dim_cl_lcl_hitm = {
.header = HEADER_SPAN_LOW("Lcl"),
.name = "cl_lcl_hitm",
.cmp = lcl_hitm_cmp,
.entry = lcl_hitm_entry,
.width = 7,
};
static struct c2c_dimension dim_cl_rmt_peer = {
.header = HEADER_SPAN("----- Peer -----", "Rmt", 1),
.name = "cl_rmt_peer",
.cmp = rmt_peer_cmp,
.entry = rmt_peer_entry,
.width = 7,
};
static struct c2c_dimension dim_cl_lcl_peer = {
.header = HEADER_SPAN_LOW("Lcl"),
.name = "cl_lcl_peer",
.cmp = lcl_peer_cmp,
.entry = lcl_peer_entry,
.width = 7,
};
perf c2c: Display "Total Stores" as a standalone metrics The total stores is displayed under the metrics "Store Reference", to output the same format with total records and all loads, extract the total stores number as a standalone metrics "Total Stores". After this patch, the tool shows the summary numbers ("Total records", "Total loads", "Total Stores") in the unified form. Before: # ----------- Cacheline ---------- Tot ----- LLC Load Hitm ----- Total Total ---- Store Reference ---- --- Load Dram ---- LLC ----- Core Load Hit ----- -- LLC Load Hit -- # Index Address Node PA cnt Hitm Total Lcl Rmt records Loads Total L1Hit L1Miss Lcl Rmt Ld Miss FB L1 L2 Llc Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ........ ....... ....... ....... ....... ........ ........ # 0 0x55f07d580100 0 1499 85.89% 481 481 0 7243 3879 3364 2599 765 0 0 0 548 2615 66 169 0 1 0x55f07d580080 0 1 13.93% 78 78 0 664 664 0 0 0 0 0 0 187 361 27 11 0 2 0x55f07d5800c0 0 1 0.18% 1 1 0 405 405 0 0 0 0 0 0 131 0 10 263 0 After: # ----------- Cacheline ---------- Tot ----- LLC Load Hitm ----- Total Total Total ---- Stores ---- --- Load Dram ---- LLC ----- Core Load Hit ----- -- LLC Load Hit -- # Index Address Node PA cnt Hitm Total Lcl Rmt records Loads Stores L1Hit L1Miss Lcl Rmt Ld Miss FB L1 L2 Llc Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ........ ....... ....... ....... ....... ........ ........ # 0 0x55f07d580100 0 1499 85.89% 481 481 0 7243 3879 3364 2599 765 0 0 0 548 2615 66 169 0 1 0x55f07d580080 0 1 13.93% 78 78 0 664 664 0 0 0 0 0 0 187 361 27 11 0 2 0x55f07d5800c0 0 1 0.18% 1 1 0 405 405 0 0 0 0 0 0 131 0 10 263 0 Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Joe Mario <jmario@redhat.com> Acked-by: Jiri Olsa <jolsa@redhat.com> Link: https://lore.kernel.org/r/20201014050921.5591-3-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2020-10-14 05:09:15 +00:00
static struct c2c_dimension dim_tot_stores = {
.header = HEADER_BOTH("Total", "Stores"),
.name = "tot_stores",
.cmp = store_cmp,
.entry = store_entry,
.width = 7,
};
static struct c2c_dimension dim_stores_l1hit = {
.header = HEADER_SPAN("--------- Stores --------", "L1Hit", 2),
.name = "stores_l1hit",
.cmp = st_l1hit_cmp,
.entry = st_l1hit_entry,
.width = 7,
};
static struct c2c_dimension dim_stores_l1miss = {
.header = HEADER_SPAN_LOW("L1Miss"),
.name = "stores_l1miss",
.cmp = st_l1miss_cmp,
.entry = st_l1miss_entry,
.width = 7,
};
static struct c2c_dimension dim_stores_na = {
.header = HEADER_SPAN_LOW("N/A"),
.name = "stores_na",
.cmp = st_na_cmp,
.entry = st_na_entry,
.width = 7,
};
static struct c2c_dimension dim_cl_stores_l1hit = {
.header = HEADER_SPAN("------- Store Refs ------", "L1 Hit", 2),
.name = "cl_stores_l1hit",
.cmp = st_l1hit_cmp,
.entry = st_l1hit_entry,
.width = 7,
};
static struct c2c_dimension dim_cl_stores_l1miss = {
.header = HEADER_SPAN_LOW("L1 Miss"),
.name = "cl_stores_l1miss",
.cmp = st_l1miss_cmp,
.entry = st_l1miss_entry,
.width = 7,
};
static struct c2c_dimension dim_cl_stores_na = {
.header = HEADER_SPAN_LOW("N/A"),
.name = "cl_stores_na",
.cmp = st_na_cmp,
.entry = st_na_entry,
.width = 7,
};
static struct c2c_dimension dim_ld_fbhit = {
.header = HEADER_SPAN("----- Core Load Hit -----", "FB", 2),
.name = "ld_fbhit",
.cmp = ld_fbhit_cmp,
.entry = ld_fbhit_entry,
.width = 7,
};
static struct c2c_dimension dim_ld_l1hit = {
.header = HEADER_SPAN_LOW("L1"),
.name = "ld_l1hit",
.cmp = ld_l1hit_cmp,
.entry = ld_l1hit_entry,
.width = 7,
};
static struct c2c_dimension dim_ld_l2hit = {
.header = HEADER_SPAN_LOW("L2"),
.name = "ld_l2hit",
.cmp = ld_l2hit_cmp,
.entry = ld_l2hit_entry,
.width = 7,
};
static struct c2c_dimension dim_ld_llchit = {
.header = HEADER_SPAN("- LLC Load Hit --", "LclHit", 1),
.name = "ld_lclhit",
.cmp = ld_llchit_cmp,
.entry = ld_llchit_entry,
.width = 8,
};
static struct c2c_dimension dim_ld_rmthit = {
perf c2c: Add metrics "RMT Load Hit" The metrics "LLC Ld Miss" and "Load Dram" overlap with each other for accouting items: "LLC Ld Miss" = "lcl_dram" + "rmt_dram" + "rmt_hit" + "rmt_hitm" "Load Dram" = "lcl_dram" + "rmt_dram" Furthermore, the metrics "LLC Ld Miss" is not directive to show statistics due to it contains summary value and cannot give out breakdown details. For this reason, add a new metrics "RMT Load Hit" which is used to present the remote cache hit; it contains two items: "RMT Load Hit" = remote hit ("rmt_hit") + remote hitm ("rmt_hitm") As result, the metrics "LLC Ld Miss" is perfectly divided into two metrics "RMT Load Hit" and "Load Dram". It's not necessary to keep metrics "LLC Ld Miss", so remove it. Before: # ----------- Cacheline ---------- Tot ------- Load Hitm ------- Total Total Total ---- Stores ---- ----- Core Load Hit ----- - LLC Load Hit -- LLC --- Load Dram ---- # Index Address Node PA cnt Hitm Total LclHitm RmtHitm records Loads Stores L1Hit L1Miss FB L1 L2 LclHit LclHitm Ld Miss Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ....... ....... ........ ........ # 0 0x55f07d580100 0 1499 85.89% 481 481 0 7243 3879 3364 2599 765 548 2615 66 169 481 0 0 0 1 0x55f07d580080 0 1 13.93% 78 78 0 664 664 0 0 0 187 361 27 11 78 0 0 0 2 0x55f07d5800c0 0 1 0.18% 1 1 0 405 405 0 0 0 131 0 10 263 1 0 0 0 After: # ----------- Cacheline ---------- Tot ------- Load Hitm ------- Total Total Total ---- Stores ---- ----- Core Load Hit ----- - LLC Load Hit -- - RMT Load Hit -- --- Load Dram ---- # Index Address Node PA cnt Hitm Total LclHitm RmtHitm records Loads Stores L1Hit L1Miss FB L1 L2 LclHit LclHitm RmtHit RmtHitm Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ....... ........ ....... ........ ........ # 0 0x55f07d580100 0 1499 85.89% 481 481 0 7243 3879 3364 2599 765 548 2615 66 169 481 0 0 0 0 1 0x55f07d580080 0 1 13.93% 78 78 0 664 664 0 0 0 187 361 27 11 78 0 0 0 0 2 0x55f07d5800c0 0 1 0.18% 1 1 0 405 405 0 0 0 131 0 10 263 1 0 0 0 0 Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Joe Mario <jmario@redhat.com> Acked-by: Jiri Olsa <jolsa@redhat.com> Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com> Link: https://lore.kernel.org/r/20201014050921.5591-9-leo.yan@linaro.org
2020-10-14 05:09:21 +00:00
.header = HEADER_SPAN("- RMT Load Hit --", "RmtHit", 1),
.name = "ld_rmthit",
.cmp = rmt_hit_cmp,
.entry = rmt_hit_entry,
.width = 8,
};
static struct c2c_dimension dim_tot_recs = {
.header = HEADER_BOTH("Total", "records"),
.name = "tot_recs",
.cmp = tot_recs_cmp,
.entry = tot_recs_entry,
.width = 7,
};
static struct c2c_dimension dim_tot_loads = {
.header = HEADER_BOTH("Total", "Loads"),
.name = "tot_loads",
.cmp = tot_loads_cmp,
.entry = tot_loads_entry,
.width = 7,
};
static struct c2c_header percent_costly_snoop_header[] = {
perf c2c: Use explicit names for display macros Perf c2c tool has an assumption that it heavily depends on HITM snoop type to detect cache false sharing, unfortunately, HITM is not supported on some architectures. Essentially, perf c2c tool wants to find some very costly snooping operations for false cache sharing, this means it's not necessarily to stick using HITM tags and we can explore other snooping types (e.g. SNOOPX_PEER). For this reason, this patch renames HITM related display macros with suffix '_HITM', so it can be distinct if later add more display types for on other snooping type. Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-10-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:45 +00:00
[DISPLAY_LCL_HITM] = HEADER_BOTH("Lcl", "Hitm"),
[DISPLAY_RMT_HITM] = HEADER_BOTH("Rmt", "Hitm"),
[DISPLAY_TOT_HITM] = HEADER_BOTH("Tot", "Hitm"),
perf c2c: Sort on peer snooping for load operations This patch adds a new option 'peer' so can sort on the cache hit for peer snooping. For displaying with option 'peer', the "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" both sort with the metrics "tot_peer". As result, we can get the 'peer' display: # perf c2c report -d peer --coalesce tid,pid,iaddr,dso -N --stdio ================================================= Shared Data Cache Line Table ================================================= # # ----------- Cacheline ---------- Peer ------- Load Peer ------- Total Total Total --------- Stores -------- ----- Core Load Hit ----- - LLC Load Hit -- - RMT Load Hit -- --- Load Dram ---- # Index Address Node PA cnt Snoop Total Local Remote records Loads Stores L1Hit L1Miss N/A FB L1 L2 LclHit LclHitm RmtHit RmtHitm Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ....... ........ ....... ........ ........ # 0 0xaaaac17d6000 N/A 0 100.00% 99 99 0 18851 18851 0 0 0 0 0 18752 0 99 0 0 0 0 0 ================================================= Shared Cache Line Distribution Pareto ================================================= # # -- Peer Snoop -- ------- Store Refs ------ --------- Data address --------- ---------- cycles ---------- Total cpu Shared # Num Rmt Lcl L1 Hit L1 Miss N/A Offset Node PA cnt Pid Tid Code address rmt peer lcl peer load records cnt Symbol Object Source:Line Node{cpus %peers %stores} # ..... ....... ....... ....... ....... ....... .................. .... ...... ....... ................. .................. ........ ........ ........ ....... ........ ...................... ................ ............... .... # ---------------------------------------------------------------------- 0 0 99 0 0 0 0xaaaac17d6000 ---------------------------------------------------------------------- 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3603:memstress 0xaaaac17c25ac 0 376 41 9314 2 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 2 100.0% n/a} 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3606:memstress 0xaaaac17c25ac 0 375 44 9155 1 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 1 100.0% n/a} 0.00% 48.48% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3606:memstress 0xaaaac17c3e88 0 180 170 65 1 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 1 100.0% n/a} 0.00% 45.45% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3603:memstress 0xaaaac17c3e88 0 180 175 70 2 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 2 100.0% n/a} Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-14-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:49 +00:00
[DISPLAY_SNP_PEER] = HEADER_BOTH("Peer", "Snoop"),
};
static struct c2c_dimension dim_percent_costly_snoop = {
.name = "percent_costly_snoop",
.cmp = percent_costly_snoop_cmp,
.entry = percent_costly_snoop_entry,
.color = percent_costly_snoop_color,
.width = 7,
};
static struct c2c_dimension dim_percent_rmt_hitm = {
.header = HEADER_SPAN("----- HITM -----", "RmtHitm", 1),
.name = "percent_rmt_hitm",
.cmp = percent_rmt_hitm_cmp,
.entry = percent_rmt_hitm_entry,
.color = percent_rmt_hitm_color,
.width = 7,
};
static struct c2c_dimension dim_percent_lcl_hitm = {
.header = HEADER_SPAN_LOW("LclHitm"),
.name = "percent_lcl_hitm",
.cmp = percent_lcl_hitm_cmp,
.entry = percent_lcl_hitm_entry,
.color = percent_lcl_hitm_color,
.width = 7,
};
static struct c2c_dimension dim_percent_rmt_peer = {
.header = HEADER_SPAN("-- Peer Snoop --", "Rmt", 1),
.name = "percent_rmt_peer",
.cmp = percent_rmt_peer_cmp,
.entry = percent_rmt_peer_entry,
.color = percent_rmt_peer_color,
.width = 7,
};
static struct c2c_dimension dim_percent_lcl_peer = {
.header = HEADER_SPAN_LOW("Lcl"),
.name = "percent_lcl_peer",
.cmp = percent_lcl_peer_cmp,
.entry = percent_lcl_peer_entry,
.color = percent_lcl_peer_color,
.width = 7,
};
static struct c2c_dimension dim_percent_stores_l1hit = {
.header = HEADER_SPAN("------- Store Refs ------", "L1 Hit", 2),
.name = "percent_stores_l1hit",
.cmp = percent_stores_l1hit_cmp,
.entry = percent_stores_l1hit_entry,
.color = percent_stores_l1hit_color,
.width = 7,
};
static struct c2c_dimension dim_percent_stores_l1miss = {
.header = HEADER_SPAN_LOW("L1 Miss"),
.name = "percent_stores_l1miss",
.cmp = percent_stores_l1miss_cmp,
.entry = percent_stores_l1miss_entry,
.color = percent_stores_l1miss_color,
.width = 7,
};
static struct c2c_dimension dim_percent_stores_na = {
.header = HEADER_SPAN_LOW("N/A"),
.name = "percent_stores_na",
.cmp = percent_stores_na_cmp,
.entry = percent_stores_na_entry,
.color = percent_stores_na_color,
.width = 7,
};
static struct c2c_dimension dim_dram_lcl = {
.header = HEADER_SPAN("--- Load Dram ----", "Lcl", 1),
.name = "dram_lcl",
.cmp = lcl_dram_cmp,
.entry = lcl_dram_entry,
.width = 8,
};
static struct c2c_dimension dim_dram_rmt = {
.header = HEADER_SPAN_LOW("Rmt"),
.name = "dram_rmt",
.cmp = rmt_dram_cmp,
.entry = rmt_dram_entry,
.width = 8,
};
static struct c2c_dimension dim_pid = {
.header = HEADER_LOW("Pid"),
.name = "pid",
.cmp = pid_cmp,
.entry = pid_entry,
.width = 7,
};
static struct c2c_dimension dim_tid = {
.header = HEADER_LOW("Tid"),
.name = "tid",
.se = &sort_thread,
};
static struct c2c_dimension dim_symbol = {
.name = "symbol",
.se = &sort_sym,
};
static struct c2c_dimension dim_dso = {
.header = HEADER_BOTH("Shared", "Object"),
.name = "dso",
.se = &sort_dso,
};
static struct c2c_dimension dim_node = {
.name = "node",
.cmp = empty_cmp,
.entry = node_entry,
.width = 4,
};
static struct c2c_dimension dim_mean_rmt = {
.header = HEADER_SPAN("---------- cycles ----------", "rmt hitm", 2),
.name = "mean_rmt",
.cmp = empty_cmp,
.entry = mean_rmt_entry,
.width = 8,
};
static struct c2c_dimension dim_mean_lcl = {
.header = HEADER_SPAN_LOW("lcl hitm"),
.name = "mean_lcl",
.cmp = empty_cmp,
.entry = mean_lcl_entry,
.width = 8,
};
static struct c2c_dimension dim_mean_load = {
.header = HEADER_SPAN_LOW("load"),
.name = "mean_load",
.cmp = empty_cmp,
.entry = mean_load_entry,
.width = 8,
};
static struct c2c_dimension dim_mean_rmt_peer = {
.header = HEADER_SPAN("---------- cycles ----------", "rmt peer", 2),
.name = "mean_rmt_peer",
.cmp = empty_cmp,
.entry = mean_rmt_peer_entry,
.width = 8,
};
static struct c2c_dimension dim_mean_lcl_peer = {
.header = HEADER_SPAN_LOW("lcl peer"),
.name = "mean_lcl_peer",
.cmp = empty_cmp,
.entry = mean_lcl_peer_entry,
.width = 8,
};
static struct c2c_dimension dim_cpucnt = {
.header = HEADER_BOTH("cpu", "cnt"),
.name = "cpucnt",
.cmp = empty_cmp,
.entry = cpucnt_entry,
.width = 8,
};
static struct c2c_dimension dim_srcline = {
.name = "cl_srcline",
.se = &sort_srcline,
};
perf c2c report: Add cacheline index entry It's convenient to have an index for each cacheline to help discussions about results over the phone. Add new 'Index' and 'Num' fields in main and single cacheline tables. $ perf c2c report ================================================= Shared Data Cache Line Table ================================================= # # Total Lcl ----- LLC Load Hitm ----- # Index Cacheline records Hitm Total Lcl Rmt ... # ..... .................. ....... ....... ....... ....... ....... # 0 0xffff880036233b40 1 11.11% 1 1 0 1 0xffff88009ccb2900 1 11.11% 1 1 0 2 0xffff8800b5b3bc40 7 11.11% 1 1 0 ... ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Pid ... # ..... ....... ....... ....... ....... .................. ....... # ------------------------------------------------------------- 0 0 1 0 0 0xffff880036233b40 ------------------------------------------------------------- 0.00% 100.00% 0.00% 0.00% 0x30 0 ------------------------------------------------------------- 1 0 1 0 0 0xffff88009ccb2900 ------------------------------------------------------------- 0.00% 100.00% 0.00% 0.00% 0x28 549 ... Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-4dhfagaz57tvrfjbg8nd2h4u@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-07-06 13:40:09 +00:00
static struct c2c_dimension dim_dcacheline_idx = {
.header = HEADER_LOW("Index"),
.name = "cl_idx",
.cmp = empty_cmp,
.entry = cl_idx_entry,
.width = 5,
};
static struct c2c_dimension dim_dcacheline_num = {
.header = HEADER_LOW("Num"),
.name = "cl_num",
.cmp = empty_cmp,
.entry = cl_idx_entry,
.width = 5,
};
static struct c2c_dimension dim_dcacheline_num_empty = {
.header = HEADER_LOW("Num"),
.name = "cl_num_empty",
.cmp = empty_cmp,
.entry = cl_idx_empty_entry,
.width = 5,
};
static struct c2c_dimension *dimensions[] = {
&dim_dcacheline,
perf c2c report: Display node for cacheline address Adding the NUMA node info for the data cacheline. Adding the new column to both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto". Note the new 'Node' column next to the 'Cacheline'. $ perf c2c report --stdio ================================================= Shared Data Cache Line Table ================================================= # # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 ... Note the new 'Node' column next to the 'Offset'. ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Using the mem2node object to get the NUMA node data. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-8-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:40 +00:00
&dim_dcacheline_node,
perf c2c report: Add cacheline address count column Adding the 'PA cnt' column grouped under data cacheline address. It shows how many times the physical addresses changed for the hist entry. It does not show the number of different physical addresses for entry, because we don't store those. We only track the number of times we got different address than we currently hold, which is not expensive and gives similar info. $ perf c2c report --stdio # ----------- Cacheline ---------- Total Tot ----- LLC Load Hitm ----- # Index Address Node PA cnt records Hitm Total Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... # 0 0xffff9ad56dca0a80 0 9 10 7.69% 2 2 0 1 0xffff9ad56dce0a80 0 9 9 7.69% 2 2 0 2 0xffff9ad37659ad80 0 1 2 3.85% 1 1 0 ... # ----- HITM ----- -- Store Refs -- --------- Data address --------- # Num Rmt Lcl L1 Hit L1 Miss Offset Node PA cnt Pid # ..... ....... ....... ....... ....... .................. .... ...... ....... # ------------------------------------------------------------- 0 0 2 3 0 0xffff9ad56dca0a80 ------------------------------------------------------------- 0.00% 0.00% 33.33% 0.00% 0x0 0 1 2510 0.00% 0.00% 33.33% 0.00% 0x4 0 1 2476 0.00% 0.00% 33.33% 0.00% 0x20 0 1 0 0.00% 100.00% 0.00% 0.00% 0x38 0 1 0 Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-10-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:42 +00:00
&dim_dcacheline_count,
&dim_offset,
perf c2c report: Display node for cacheline address Adding the NUMA node info for the data cacheline. Adding the new column to both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto". Note the new 'Node' column next to the 'Cacheline'. $ perf c2c report --stdio ================================================= Shared Data Cache Line Table ================================================= # # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 ... Note the new 'Node' column next to the 'Offset'. ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Using the mem2node object to get the NUMA node data. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-8-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:40 +00:00
&dim_offset_node,
&dim_iaddr,
&dim_tot_hitm,
&dim_lcl_hitm,
&dim_rmt_hitm,
&dim_tot_peer,
&dim_lcl_peer,
&dim_rmt_peer,
&dim_cl_lcl_hitm,
&dim_cl_rmt_hitm,
&dim_cl_lcl_peer,
&dim_cl_rmt_peer,
perf c2c: Display "Total Stores" as a standalone metrics The total stores is displayed under the metrics "Store Reference", to output the same format with total records and all loads, extract the total stores number as a standalone metrics "Total Stores". After this patch, the tool shows the summary numbers ("Total records", "Total loads", "Total Stores") in the unified form. Before: # ----------- Cacheline ---------- Tot ----- LLC Load Hitm ----- Total Total ---- Store Reference ---- --- Load Dram ---- LLC ----- Core Load Hit ----- -- LLC Load Hit -- # Index Address Node PA cnt Hitm Total Lcl Rmt records Loads Total L1Hit L1Miss Lcl Rmt Ld Miss FB L1 L2 Llc Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ........ ....... ....... ....... ....... ........ ........ # 0 0x55f07d580100 0 1499 85.89% 481 481 0 7243 3879 3364 2599 765 0 0 0 548 2615 66 169 0 1 0x55f07d580080 0 1 13.93% 78 78 0 664 664 0 0 0 0 0 0 187 361 27 11 0 2 0x55f07d5800c0 0 1 0.18% 1 1 0 405 405 0 0 0 0 0 0 131 0 10 263 0 After: # ----------- Cacheline ---------- Tot ----- LLC Load Hitm ----- Total Total Total ---- Stores ---- --- Load Dram ---- LLC ----- Core Load Hit ----- -- LLC Load Hit -- # Index Address Node PA cnt Hitm Total Lcl Rmt records Loads Stores L1Hit L1Miss Lcl Rmt Ld Miss FB L1 L2 Llc Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ........ ....... ....... ....... ....... ........ ........ # 0 0x55f07d580100 0 1499 85.89% 481 481 0 7243 3879 3364 2599 765 0 0 0 548 2615 66 169 0 1 0x55f07d580080 0 1 13.93% 78 78 0 664 664 0 0 0 0 0 0 187 361 27 11 0 2 0x55f07d5800c0 0 1 0.18% 1 1 0 405 405 0 0 0 0 0 0 131 0 10 263 0 Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Joe Mario <jmario@redhat.com> Acked-by: Jiri Olsa <jolsa@redhat.com> Link: https://lore.kernel.org/r/20201014050921.5591-3-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2020-10-14 05:09:15 +00:00
&dim_tot_stores,
&dim_stores_l1hit,
&dim_stores_l1miss,
&dim_stores_na,
&dim_cl_stores_l1hit,
&dim_cl_stores_l1miss,
&dim_cl_stores_na,
&dim_ld_fbhit,
&dim_ld_l1hit,
&dim_ld_l2hit,
&dim_ld_llchit,
&dim_ld_rmthit,
&dim_tot_recs,
&dim_tot_loads,
&dim_percent_costly_snoop,
&dim_percent_rmt_hitm,
&dim_percent_lcl_hitm,
&dim_percent_rmt_peer,
&dim_percent_lcl_peer,
&dim_percent_stores_l1hit,
&dim_percent_stores_l1miss,
&dim_percent_stores_na,
&dim_dram_lcl,
&dim_dram_rmt,
&dim_pid,
&dim_tid,
&dim_symbol,
&dim_dso,
&dim_node,
&dim_mean_rmt,
&dim_mean_lcl,
&dim_mean_rmt_peer,
&dim_mean_lcl_peer,
&dim_mean_load,
&dim_cpucnt,
&dim_srcline,
perf c2c report: Add cacheline index entry It's convenient to have an index for each cacheline to help discussions about results over the phone. Add new 'Index' and 'Num' fields in main and single cacheline tables. $ perf c2c report ================================================= Shared Data Cache Line Table ================================================= # # Total Lcl ----- LLC Load Hitm ----- # Index Cacheline records Hitm Total Lcl Rmt ... # ..... .................. ....... ....... ....... ....... ....... # 0 0xffff880036233b40 1 11.11% 1 1 0 1 0xffff88009ccb2900 1 11.11% 1 1 0 2 0xffff8800b5b3bc40 7 11.11% 1 1 0 ... ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Pid ... # ..... ....... ....... ....... ....... .................. ....... # ------------------------------------------------------------- 0 0 1 0 0 0xffff880036233b40 ------------------------------------------------------------- 0.00% 100.00% 0.00% 0.00% 0x30 0 ------------------------------------------------------------- 1 0 1 0 0 0xffff88009ccb2900 ------------------------------------------------------------- 0.00% 100.00% 0.00% 0.00% 0x28 549 ... Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-4dhfagaz57tvrfjbg8nd2h4u@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-07-06 13:40:09 +00:00
&dim_dcacheline_idx,
&dim_dcacheline_num,
&dim_dcacheline_num_empty,
NULL,
};
static void fmt_free(struct perf_hpp_fmt *fmt)
{
struct c2c_fmt *c2c_fmt;
c2c_fmt = container_of(fmt, struct c2c_fmt, fmt);
free(c2c_fmt);
}
static bool fmt_equal(struct perf_hpp_fmt *a, struct perf_hpp_fmt *b)
{
struct c2c_fmt *c2c_a = container_of(a, struct c2c_fmt, fmt);
struct c2c_fmt *c2c_b = container_of(b, struct c2c_fmt, fmt);
return c2c_a->dim == c2c_b->dim;
}
static struct c2c_dimension *get_dimension(const char *name)
{
unsigned int i;
for (i = 0; dimensions[i]; i++) {
struct c2c_dimension *dim = dimensions[i];
if (!strcmp(dim->name, name))
return dim;
}
return NULL;
}
static int c2c_se_entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
struct hist_entry *he)
{
struct c2c_fmt *c2c_fmt = container_of(fmt, struct c2c_fmt, fmt);
struct c2c_dimension *dim = c2c_fmt->dim;
size_t len = fmt->user_len;
if (!len) {
len = hists__col_len(he->hists, dim->se->se_width_idx);
if (dim == &dim_symbol || dim == &dim_srcline)
len = symbol_width(he->hists, dim->se);
}
return dim->se->se_snprintf(he, hpp->buf, hpp->size, len);
}
static int64_t c2c_se_cmp(struct perf_hpp_fmt *fmt,
struct hist_entry *a, struct hist_entry *b)
{
struct c2c_fmt *c2c_fmt = container_of(fmt, struct c2c_fmt, fmt);
struct c2c_dimension *dim = c2c_fmt->dim;
return dim->se->se_cmp(a, b);
}
static int64_t c2c_se_collapse(struct perf_hpp_fmt *fmt,
struct hist_entry *a, struct hist_entry *b)
{
struct c2c_fmt *c2c_fmt = container_of(fmt, struct c2c_fmt, fmt);
struct c2c_dimension *dim = c2c_fmt->dim;
int64_t (*collapse_fn)(struct hist_entry *, struct hist_entry *);
collapse_fn = dim->se->se_collapse ?: dim->se->se_cmp;
return collapse_fn(a, b);
}
static struct c2c_fmt *get_format(const char *name)
{
struct c2c_dimension *dim = get_dimension(name);
struct c2c_fmt *c2c_fmt;
struct perf_hpp_fmt *fmt;
if (!dim)
return NULL;
c2c_fmt = zalloc(sizeof(*c2c_fmt));
if (!c2c_fmt)
return NULL;
c2c_fmt->dim = dim;
fmt = &c2c_fmt->fmt;
INIT_LIST_HEAD(&fmt->list);
INIT_LIST_HEAD(&fmt->sort_list);
fmt->cmp = dim->se ? c2c_se_cmp : dim->cmp;
fmt->sort = dim->se ? c2c_se_cmp : dim->cmp;
fmt->color = dim->se ? NULL : dim->color;
fmt->entry = dim->se ? c2c_se_entry : dim->entry;
fmt->header = c2c_header;
fmt->width = c2c_width;
fmt->collapse = dim->se ? c2c_se_collapse : dim->cmp;
fmt->equal = fmt_equal;
fmt->free = fmt_free;
return c2c_fmt;
}
static int c2c_hists__init_output(struct perf_hpp_list *hpp_list, char *name)
{
struct c2c_fmt *c2c_fmt = get_format(name);
if (!c2c_fmt) {
reset_dimensions();
return output_field_add(hpp_list, name);
}
perf_hpp_list__column_register(hpp_list, &c2c_fmt->fmt);
return 0;
}
static int c2c_hists__init_sort(struct perf_hpp_list *hpp_list, char *name)
{
struct c2c_fmt *c2c_fmt = get_format(name);
struct c2c_dimension *dim;
if (!c2c_fmt) {
reset_dimensions();
return sort_dimension__add(hpp_list, name, NULL, 0);
}
dim = c2c_fmt->dim;
if (dim == &dim_dso)
hpp_list->dso = 1;
perf_hpp_list__register_sort_field(hpp_list, &c2c_fmt->fmt);
return 0;
}
#define PARSE_LIST(_list, _fn) \
do { \
char *tmp, *tok; \
ret = 0; \
\
if (!_list) \
break; \
\
for (tok = strtok_r((char *)_list, ", ", &tmp); \
tok; tok = strtok_r(NULL, ", ", &tmp)) { \
ret = _fn(hpp_list, tok); \
if (ret == -EINVAL) { \
pr_err("Invalid --fields key: `%s'", tok); \
break; \
} else if (ret == -ESRCH) { \
pr_err("Unknown --fields key: `%s'", tok); \
break; \
} \
} \
} while (0)
static int hpp_list__parse(struct perf_hpp_list *hpp_list,
const char *output_,
const char *sort_)
{
char *output = output_ ? strdup(output_) : NULL;
char *sort = sort_ ? strdup(sort_) : NULL;
int ret;
PARSE_LIST(output, c2c_hists__init_output);
PARSE_LIST(sort, c2c_hists__init_sort);
/* copy sort keys to output fields */
perf_hpp__setup_output_field(hpp_list);
/*
* We don't need other sorting keys other than those
* we already specified. It also really slows down
* the processing a lot with big number of output
* fields, so switching this off for c2c.
*/
#if 0
/* and then copy output fields to sort keys */
perf_hpp__append_sort_keys(&hists->list);
#endif
free(output);
free(sort);
return ret;
}
static int c2c_hists__init(struct c2c_hists *hists,
const char *sort,
int nr_header_lines)
{
__hists__init(&hists->hists, &hists->list);
/*
* Initialize only with sort fields, we need to resort
* later anyway, and that's where we add output fields
* as well.
*/
perf_hpp_list__init(&hists->list);
/* Overload number of header lines.*/
hists->list.nr_header_lines = nr_header_lines;
return hpp_list__parse(&hists->list, NULL, sort);
}
static int c2c_hists__reinit(struct c2c_hists *c2c_hists,
const char *output,
const char *sort)
{
perf_hpp__reset_output_field(&c2c_hists->list);
return hpp_list__parse(&c2c_hists->list, output, sort);
}
#define DISPLAY_LINE_LIMIT 0.001
static u8 filter_display(u32 val, u32 sum)
{
if (sum == 0 || ((double)val / sum) < DISPLAY_LINE_LIMIT)
return HIST_FILTER__C2C;
return 0;
}
static bool he__display(struct hist_entry *he, struct c2c_stats *stats)
{
struct c2c_hist_entry *c2c_he;
if (c2c.show_all)
return true;
c2c_he = container_of(he, struct c2c_hist_entry, he);
switch (c2c.display) {
perf c2c: Use explicit names for display macros Perf c2c tool has an assumption that it heavily depends on HITM snoop type to detect cache false sharing, unfortunately, HITM is not supported on some architectures. Essentially, perf c2c tool wants to find some very costly snooping operations for false cache sharing, this means it's not necessarily to stick using HITM tags and we can explore other snooping types (e.g. SNOOPX_PEER). For this reason, this patch renames HITM related display macros with suffix '_HITM', so it can be distinct if later add more display types for on other snooping type. Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-10-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:45 +00:00
case DISPLAY_LCL_HITM:
he->filtered = filter_display(c2c_he->stats.lcl_hitm,
stats->lcl_hitm);
break;
perf c2c: Use explicit names for display macros Perf c2c tool has an assumption that it heavily depends on HITM snoop type to detect cache false sharing, unfortunately, HITM is not supported on some architectures. Essentially, perf c2c tool wants to find some very costly snooping operations for false cache sharing, this means it's not necessarily to stick using HITM tags and we can explore other snooping types (e.g. SNOOPX_PEER). For this reason, this patch renames HITM related display macros with suffix '_HITM', so it can be distinct if later add more display types for on other snooping type. Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-10-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:45 +00:00
case DISPLAY_RMT_HITM:
he->filtered = filter_display(c2c_he->stats.rmt_hitm,
stats->rmt_hitm);
break;
perf c2c: Use explicit names for display macros Perf c2c tool has an assumption that it heavily depends on HITM snoop type to detect cache false sharing, unfortunately, HITM is not supported on some architectures. Essentially, perf c2c tool wants to find some very costly snooping operations for false cache sharing, this means it's not necessarily to stick using HITM tags and we can explore other snooping types (e.g. SNOOPX_PEER). For this reason, this patch renames HITM related display macros with suffix '_HITM', so it can be distinct if later add more display types for on other snooping type. Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-10-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:45 +00:00
case DISPLAY_TOT_HITM:
he->filtered = filter_display(c2c_he->stats.tot_hitm,
stats->tot_hitm);
break;
perf c2c: Sort on peer snooping for load operations This patch adds a new option 'peer' so can sort on the cache hit for peer snooping. For displaying with option 'peer', the "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" both sort with the metrics "tot_peer". As result, we can get the 'peer' display: # perf c2c report -d peer --coalesce tid,pid,iaddr,dso -N --stdio ================================================= Shared Data Cache Line Table ================================================= # # ----------- Cacheline ---------- Peer ------- Load Peer ------- Total Total Total --------- Stores -------- ----- Core Load Hit ----- - LLC Load Hit -- - RMT Load Hit -- --- Load Dram ---- # Index Address Node PA cnt Snoop Total Local Remote records Loads Stores L1Hit L1Miss N/A FB L1 L2 LclHit LclHitm RmtHit RmtHitm Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ....... ........ ....... ........ ........ # 0 0xaaaac17d6000 N/A 0 100.00% 99 99 0 18851 18851 0 0 0 0 0 18752 0 99 0 0 0 0 0 ================================================= Shared Cache Line Distribution Pareto ================================================= # # -- Peer Snoop -- ------- Store Refs ------ --------- Data address --------- ---------- cycles ---------- Total cpu Shared # Num Rmt Lcl L1 Hit L1 Miss N/A Offset Node PA cnt Pid Tid Code address rmt peer lcl peer load records cnt Symbol Object Source:Line Node{cpus %peers %stores} # ..... ....... ....... ....... ....... ....... .................. .... ...... ....... ................. .................. ........ ........ ........ ....... ........ ...................... ................ ............... .... # ---------------------------------------------------------------------- 0 0 99 0 0 0 0xaaaac17d6000 ---------------------------------------------------------------------- 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3603:memstress 0xaaaac17c25ac 0 376 41 9314 2 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 2 100.0% n/a} 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3606:memstress 0xaaaac17c25ac 0 375 44 9155 1 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 1 100.0% n/a} 0.00% 48.48% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3606:memstress 0xaaaac17c3e88 0 180 170 65 1 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 1 100.0% n/a} 0.00% 45.45% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3603:memstress 0xaaaac17c3e88 0 180 175 70 2 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 2 100.0% n/a} Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-14-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:49 +00:00
case DISPLAY_SNP_PEER:
he->filtered = filter_display(c2c_he->stats.tot_peer,
stats->tot_peer);
break;
default:
break;
}
return he->filtered == 0;
}
static inline bool is_valid_hist_entry(struct hist_entry *he)
{
struct c2c_hist_entry *c2c_he;
bool has_record = false;
c2c_he = container_of(he, struct c2c_hist_entry, he);
/* It's a valid entry if contains stores */
if (c2c_he->stats.store)
return true;
switch (c2c.display) {
perf c2c: Use explicit names for display macros Perf c2c tool has an assumption that it heavily depends on HITM snoop type to detect cache false sharing, unfortunately, HITM is not supported on some architectures. Essentially, perf c2c tool wants to find some very costly snooping operations for false cache sharing, this means it's not necessarily to stick using HITM tags and we can explore other snooping types (e.g. SNOOPX_PEER). For this reason, this patch renames HITM related display macros with suffix '_HITM', so it can be distinct if later add more display types for on other snooping type. Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-10-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:45 +00:00
case DISPLAY_LCL_HITM:
has_record = !!c2c_he->stats.lcl_hitm;
break;
perf c2c: Use explicit names for display macros Perf c2c tool has an assumption that it heavily depends on HITM snoop type to detect cache false sharing, unfortunately, HITM is not supported on some architectures. Essentially, perf c2c tool wants to find some very costly snooping operations for false cache sharing, this means it's not necessarily to stick using HITM tags and we can explore other snooping types (e.g. SNOOPX_PEER). For this reason, this patch renames HITM related display macros with suffix '_HITM', so it can be distinct if later add more display types for on other snooping type. Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-10-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:45 +00:00
case DISPLAY_RMT_HITM:
has_record = !!c2c_he->stats.rmt_hitm;
break;
perf c2c: Use explicit names for display macros Perf c2c tool has an assumption that it heavily depends on HITM snoop type to detect cache false sharing, unfortunately, HITM is not supported on some architectures. Essentially, perf c2c tool wants to find some very costly snooping operations for false cache sharing, this means it's not necessarily to stick using HITM tags and we can explore other snooping types (e.g. SNOOPX_PEER). For this reason, this patch renames HITM related display macros with suffix '_HITM', so it can be distinct if later add more display types for on other snooping type. Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-10-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:45 +00:00
case DISPLAY_TOT_HITM:
has_record = !!c2c_he->stats.tot_hitm;
break;
perf c2c: Sort on peer snooping for load operations This patch adds a new option 'peer' so can sort on the cache hit for peer snooping. For displaying with option 'peer', the "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" both sort with the metrics "tot_peer". As result, we can get the 'peer' display: # perf c2c report -d peer --coalesce tid,pid,iaddr,dso -N --stdio ================================================= Shared Data Cache Line Table ================================================= # # ----------- Cacheline ---------- Peer ------- Load Peer ------- Total Total Total --------- Stores -------- ----- Core Load Hit ----- - LLC Load Hit -- - RMT Load Hit -- --- Load Dram ---- # Index Address Node PA cnt Snoop Total Local Remote records Loads Stores L1Hit L1Miss N/A FB L1 L2 LclHit LclHitm RmtHit RmtHitm Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ....... ........ ....... ........ ........ # 0 0xaaaac17d6000 N/A 0 100.00% 99 99 0 18851 18851 0 0 0 0 0 18752 0 99 0 0 0 0 0 ================================================= Shared Cache Line Distribution Pareto ================================================= # # -- Peer Snoop -- ------- Store Refs ------ --------- Data address --------- ---------- cycles ---------- Total cpu Shared # Num Rmt Lcl L1 Hit L1 Miss N/A Offset Node PA cnt Pid Tid Code address rmt peer lcl peer load records cnt Symbol Object Source:Line Node{cpus %peers %stores} # ..... ....... ....... ....... ....... ....... .................. .... ...... ....... ................. .................. ........ ........ ........ ....... ........ ...................... ................ ............... .... # ---------------------------------------------------------------------- 0 0 99 0 0 0 0xaaaac17d6000 ---------------------------------------------------------------------- 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3603:memstress 0xaaaac17c25ac 0 376 41 9314 2 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 2 100.0% n/a} 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3606:memstress 0xaaaac17c25ac 0 375 44 9155 1 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 1 100.0% n/a} 0.00% 48.48% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3606:memstress 0xaaaac17c3e88 0 180 170 65 1 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 1 100.0% n/a} 0.00% 45.45% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3603:memstress 0xaaaac17c3e88 0 180 175 70 2 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 2 100.0% n/a} Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-14-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:49 +00:00
case DISPLAY_SNP_PEER:
has_record = !!c2c_he->stats.tot_peer;
default:
break;
}
return has_record;
}
perf c2c report: Display node for cacheline address Adding the NUMA node info for the data cacheline. Adding the new column to both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto". Note the new 'Node' column next to the 'Cacheline'. $ perf c2c report --stdio ================================================= Shared Data Cache Line Table ================================================= # # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 ... Note the new 'Node' column next to the 'Offset'. ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Using the mem2node object to get the NUMA node data. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-8-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:40 +00:00
static void set_node_width(struct c2c_hist_entry *c2c_he, int len)
{
struct c2c_dimension *dim;
dim = &c2c.hists == c2c_he->hists ?
&dim_dcacheline_node : &dim_offset_node;
if (len > dim->width)
dim->width = len;
}
static int set_nodestr(struct c2c_hist_entry *c2c_he)
{
char buf[30];
int len;
if (c2c_he->nodestr)
return 0;
if (!bitmap_empty(c2c_he->nodeset, c2c.nodes_cnt)) {
perf c2c report: Display node for cacheline address Adding the NUMA node info for the data cacheline. Adding the new column to both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto". Note the new 'Node' column next to the 'Cacheline'. $ perf c2c report --stdio ================================================= Shared Data Cache Line Table ================================================= # # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 ... Note the new 'Node' column next to the 'Offset'. ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Using the mem2node object to get the NUMA node data. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-8-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:40 +00:00
len = bitmap_scnprintf(c2c_he->nodeset, c2c.nodes_cnt,
buf, sizeof(buf));
} else {
len = scnprintf(buf, sizeof(buf), "N/A");
}
set_node_width(c2c_he, len);
c2c_he->nodestr = strdup(buf);
return c2c_he->nodestr ? 0 : -ENOMEM;
}
static void calc_width(struct c2c_hist_entry *c2c_he)
{
struct c2c_hists *c2c_hists;
c2c_hists = container_of(c2c_he->he.hists, struct c2c_hists, hists);
hists__calc_col_len(&c2c_hists->hists, &c2c_he->he);
perf c2c report: Display node for cacheline address Adding the NUMA node info for the data cacheline. Adding the new column to both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto". Note the new 'Node' column next to the 'Cacheline'. $ perf c2c report --stdio ================================================= Shared Data Cache Line Table ================================================= # # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 ... Note the new 'Node' column next to the 'Offset'. ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Using the mem2node object to get the NUMA node data. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-8-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:40 +00:00
set_nodestr(c2c_he);
}
static int filter_cb(struct hist_entry *he, void *arg __maybe_unused)
{
struct c2c_hist_entry *c2c_he;
c2c_he = container_of(he, struct c2c_hist_entry, he);
if (c2c.show_src && !he->srcline)
he->srcline = hist_entry__srcline(he);
calc_width(c2c_he);
if (!is_valid_hist_entry(he))
he->filtered = HIST_FILTER__C2C;
return 0;
}
static int resort_cl_cb(struct hist_entry *he, void *arg __maybe_unused)
{
struct c2c_hist_entry *c2c_he;
struct c2c_hists *c2c_hists;
bool display = he__display(he, &c2c.shared_clines_stats);
c2c_he = container_of(he, struct c2c_hist_entry, he);
c2c_hists = c2c_he->hists;
if (display && c2c_hists) {
perf c2c report: Add cacheline index entry It's convenient to have an index for each cacheline to help discussions about results over the phone. Add new 'Index' and 'Num' fields in main and single cacheline tables. $ perf c2c report ================================================= Shared Data Cache Line Table ================================================= # # Total Lcl ----- LLC Load Hitm ----- # Index Cacheline records Hitm Total Lcl Rmt ... # ..... .................. ....... ....... ....... ....... ....... # 0 0xffff880036233b40 1 11.11% 1 1 0 1 0xffff88009ccb2900 1 11.11% 1 1 0 2 0xffff8800b5b3bc40 7 11.11% 1 1 0 ... ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Pid ... # ..... ....... ....... ....... ....... .................. ....... # ------------------------------------------------------------- 0 0 1 0 0 0xffff880036233b40 ------------------------------------------------------------- 0.00% 100.00% 0.00% 0.00% 0x30 0 ------------------------------------------------------------- 1 0 1 0 0 0xffff88009ccb2900 ------------------------------------------------------------- 0.00% 100.00% 0.00% 0.00% 0x28 549 ... Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-4dhfagaz57tvrfjbg8nd2h4u@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-07-06 13:40:09 +00:00
static unsigned int idx;
c2c_he->cacheline_idx = idx++;
calc_width(c2c_he);
perf c2c report: Add cacheline index entry It's convenient to have an index for each cacheline to help discussions about results over the phone. Add new 'Index' and 'Num' fields in main and single cacheline tables. $ perf c2c report ================================================= Shared Data Cache Line Table ================================================= # # Total Lcl ----- LLC Load Hitm ----- # Index Cacheline records Hitm Total Lcl Rmt ... # ..... .................. ....... ....... ....... ....... ....... # 0 0xffff880036233b40 1 11.11% 1 1 0 1 0xffff88009ccb2900 1 11.11% 1 1 0 2 0xffff8800b5b3bc40 7 11.11% 1 1 0 ... ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Pid ... # ..... ....... ....... ....... ....... .................. ....... # ------------------------------------------------------------- 0 0 1 0 0 0xffff880036233b40 ------------------------------------------------------------- 0.00% 100.00% 0.00% 0.00% 0x30 0 ------------------------------------------------------------- 1 0 1 0 0 0xffff88009ccb2900 ------------------------------------------------------------- 0.00% 100.00% 0.00% 0.00% 0x28 549 ... Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-4dhfagaz57tvrfjbg8nd2h4u@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-07-06 13:40:09 +00:00
c2c_hists__reinit(c2c_hists, c2c.cl_output, c2c.cl_resort);
hists__collapse_resort(&c2c_hists->hists, NULL);
hists__output_resort_cb(&c2c_hists->hists, NULL, filter_cb);
}
return 0;
}
perf c2c: Refactor node header The node header array contains 3 items, each item is used for one of the 3 flavors for node accessing info. To extend sorting on other snooping type and not always stick to HITMs, the second header string "Node{cpus %hitms %stores}" should be adjusted (e.g. it's changed as "Node{cpus %peer %stores}"). For this reason, this patch changes the node header array to three flat variables and uses switch-case in function setup_nodes_header(), thus it is easier for altering the header string. Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-12-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:47 +00:00
static struct c2c_header header_node_0 = HEADER_LOW("Node");
perf c2c: Sort on peer snooping for load operations This patch adds a new option 'peer' so can sort on the cache hit for peer snooping. For displaying with option 'peer', the "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" both sort with the metrics "tot_peer". As result, we can get the 'peer' display: # perf c2c report -d peer --coalesce tid,pid,iaddr,dso -N --stdio ================================================= Shared Data Cache Line Table ================================================= # # ----------- Cacheline ---------- Peer ------- Load Peer ------- Total Total Total --------- Stores -------- ----- Core Load Hit ----- - LLC Load Hit -- - RMT Load Hit -- --- Load Dram ---- # Index Address Node PA cnt Snoop Total Local Remote records Loads Stores L1Hit L1Miss N/A FB L1 L2 LclHit LclHitm RmtHit RmtHitm Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ....... ........ ....... ........ ........ # 0 0xaaaac17d6000 N/A 0 100.00% 99 99 0 18851 18851 0 0 0 0 0 18752 0 99 0 0 0 0 0 ================================================= Shared Cache Line Distribution Pareto ================================================= # # -- Peer Snoop -- ------- Store Refs ------ --------- Data address --------- ---------- cycles ---------- Total cpu Shared # Num Rmt Lcl L1 Hit L1 Miss N/A Offset Node PA cnt Pid Tid Code address rmt peer lcl peer load records cnt Symbol Object Source:Line Node{cpus %peers %stores} # ..... ....... ....... ....... ....... ....... .................. .... ...... ....... ................. .................. ........ ........ ........ ....... ........ ...................... ................ ............... .... # ---------------------------------------------------------------------- 0 0 99 0 0 0 0xaaaac17d6000 ---------------------------------------------------------------------- 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3603:memstress 0xaaaac17c25ac 0 376 41 9314 2 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 2 100.0% n/a} 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3606:memstress 0xaaaac17c25ac 0 375 44 9155 1 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 1 100.0% n/a} 0.00% 48.48% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3606:memstress 0xaaaac17c3e88 0 180 170 65 1 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 1 100.0% n/a} 0.00% 45.45% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3603:memstress 0xaaaac17c3e88 0 180 175 70 2 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 2 100.0% n/a} Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-14-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:49 +00:00
static struct c2c_header header_node_1_hitms_stores =
HEADER_LOW("Node{cpus %hitms %stores}");
static struct c2c_header header_node_1_peers_stores =
HEADER_LOW("Node{cpus %peers %stores}");
perf c2c: Refactor node header The node header array contains 3 items, each item is used for one of the 3 flavors for node accessing info. To extend sorting on other snooping type and not always stick to HITMs, the second header string "Node{cpus %hitms %stores}" should be adjusted (e.g. it's changed as "Node{cpus %peer %stores}"). For this reason, this patch changes the node header array to three flat variables and uses switch-case in function setup_nodes_header(), thus it is easier for altering the header string. Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-12-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:47 +00:00
static struct c2c_header header_node_2 = HEADER_LOW("Node{cpu list}");
static void setup_nodes_header(void)
{
perf c2c: Refactor node header The node header array contains 3 items, each item is used for one of the 3 flavors for node accessing info. To extend sorting on other snooping type and not always stick to HITMs, the second header string "Node{cpus %hitms %stores}" should be adjusted (e.g. it's changed as "Node{cpus %peer %stores}"). For this reason, this patch changes the node header array to three flat variables and uses switch-case in function setup_nodes_header(), thus it is easier for altering the header string. Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-12-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:47 +00:00
switch (c2c.node_info) {
case 0:
dim_node.header = header_node_0;
break;
case 1:
perf c2c: Sort on peer snooping for load operations This patch adds a new option 'peer' so can sort on the cache hit for peer snooping. For displaying with option 'peer', the "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" both sort with the metrics "tot_peer". As result, we can get the 'peer' display: # perf c2c report -d peer --coalesce tid,pid,iaddr,dso -N --stdio ================================================= Shared Data Cache Line Table ================================================= # # ----------- Cacheline ---------- Peer ------- Load Peer ------- Total Total Total --------- Stores -------- ----- Core Load Hit ----- - LLC Load Hit -- - RMT Load Hit -- --- Load Dram ---- # Index Address Node PA cnt Snoop Total Local Remote records Loads Stores L1Hit L1Miss N/A FB L1 L2 LclHit LclHitm RmtHit RmtHitm Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ....... ........ ....... ........ ........ # 0 0xaaaac17d6000 N/A 0 100.00% 99 99 0 18851 18851 0 0 0 0 0 18752 0 99 0 0 0 0 0 ================================================= Shared Cache Line Distribution Pareto ================================================= # # -- Peer Snoop -- ------- Store Refs ------ --------- Data address --------- ---------- cycles ---------- Total cpu Shared # Num Rmt Lcl L1 Hit L1 Miss N/A Offset Node PA cnt Pid Tid Code address rmt peer lcl peer load records cnt Symbol Object Source:Line Node{cpus %peers %stores} # ..... ....... ....... ....... ....... ....... .................. .... ...... ....... ................. .................. ........ ........ ........ ....... ........ ...................... ................ ............... .... # ---------------------------------------------------------------------- 0 0 99 0 0 0 0xaaaac17d6000 ---------------------------------------------------------------------- 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3603:memstress 0xaaaac17c25ac 0 376 41 9314 2 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 2 100.0% n/a} 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3606:memstress 0xaaaac17c25ac 0 375 44 9155 1 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 1 100.0% n/a} 0.00% 48.48% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3606:memstress 0xaaaac17c3e88 0 180 170 65 1 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 1 100.0% n/a} 0.00% 45.45% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3603:memstress 0xaaaac17c3e88 0 180 175 70 2 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 2 100.0% n/a} Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-14-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:49 +00:00
if (c2c.display == DISPLAY_SNP_PEER)
dim_node.header = header_node_1_peers_stores;
else
dim_node.header = header_node_1_hitms_stores;
perf c2c: Refactor node header The node header array contains 3 items, each item is used for one of the 3 flavors for node accessing info. To extend sorting on other snooping type and not always stick to HITMs, the second header string "Node{cpus %hitms %stores}" should be adjusted (e.g. it's changed as "Node{cpus %peer %stores}"). For this reason, this patch changes the node header array to three flat variables and uses switch-case in function setup_nodes_header(), thus it is easier for altering the header string. Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-12-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:47 +00:00
break;
case 2:
dim_node.header = header_node_2;
break;
default:
break;
}
return;
}
static int setup_nodes(struct perf_session *session)
{
struct numa_node *n;
unsigned long **nodes;
perf cpumap: Give CPUs their own type A common problem is confusing CPU map indices with the CPU, by wrapping the CPU with a struct then this is avoided. This approach is similar to atomic_t. Committer notes: To make it build with BUILD_BPF_SKEL=1 these files needed the conversions to 'struct perf_cpu' usage: tools/perf/util/bpf_counter.c tools/perf/util/bpf_counter_cgroup.c tools/perf/util/bpf_ftrace.c Also perf_env__get_cpu() was removed back in "perf cpumap: Switch cpu_map__build_map to cpu function". Additionally these needed to be fixed for the ARM builds to complete: tools/perf/arch/arm/util/cs-etm.c tools/perf/arch/arm64/util/pmu.c Suggested-by: John Garry <john.garry@huawei.com> Signed-off-by: Ian Rogers <irogers@google.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Paul Clarke <pc@us.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Riccardo Mancini <rickyman7@gmail.com> Cc: Stephane Eranian <eranian@google.com> Cc: Suzuki Poulouse <suzuki.poulose@arm.com> Cc: Vineet Singh <vineet.singh@intel.com> Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Cc: zhengjun.xing@intel.com Link: https://lore.kernel.org/r/20220105061351.120843-49-irogers@google.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-01-05 06:13:51 +00:00
int node, idx;
struct perf_cpu cpu;
int *cpu2node;
if (c2c.node_info > 2)
c2c.node_info = 2;
c2c.nodes_cnt = session->header.env.nr_numa_nodes;
c2c.cpus_cnt = session->header.env.nr_cpus_avail;
n = session->header.env.numa_nodes;
if (!n)
return -EINVAL;
nodes = zalloc(sizeof(unsigned long *) * c2c.nodes_cnt);
if (!nodes)
return -ENOMEM;
c2c.nodes = nodes;
cpu2node = zalloc(sizeof(int) * c2c.cpus_cnt);
if (!cpu2node)
return -ENOMEM;
perf cpumap: Give CPUs their own type A common problem is confusing CPU map indices with the CPU, by wrapping the CPU with a struct then this is avoided. This approach is similar to atomic_t. Committer notes: To make it build with BUILD_BPF_SKEL=1 these files needed the conversions to 'struct perf_cpu' usage: tools/perf/util/bpf_counter.c tools/perf/util/bpf_counter_cgroup.c tools/perf/util/bpf_ftrace.c Also perf_env__get_cpu() was removed back in "perf cpumap: Switch cpu_map__build_map to cpu function". Additionally these needed to be fixed for the ARM builds to complete: tools/perf/arch/arm/util/cs-etm.c tools/perf/arch/arm64/util/pmu.c Suggested-by: John Garry <john.garry@huawei.com> Signed-off-by: Ian Rogers <irogers@google.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Paul Clarke <pc@us.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Riccardo Mancini <rickyman7@gmail.com> Cc: Stephane Eranian <eranian@google.com> Cc: Suzuki Poulouse <suzuki.poulose@arm.com> Cc: Vineet Singh <vineet.singh@intel.com> Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Cc: zhengjun.xing@intel.com Link: https://lore.kernel.org/r/20220105061351.120843-49-irogers@google.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-01-05 06:13:51 +00:00
for (idx = 0; idx < c2c.cpus_cnt; idx++)
cpu2node[idx] = -1;
c2c.cpu2node = cpu2node;
for (node = 0; node < c2c.nodes_cnt; node++) {
struct perf_cpu_map *map = n[node].map;
unsigned long *set;
set = bitmap_zalloc(c2c.cpus_cnt);
if (!set)
return -ENOMEM;
nodes[node] = set;
perf cpumap: Clean up use of perf_cpu_map__has_any_cpu_or_is_empty Most uses of what was perf_cpu_map__empty but is now perf_cpu_map__has_any_cpu_or_is_empty want to do something with the CPU map if it contains CPUs. Replace uses of perf_cpu_map__has_any_cpu_or_is_empty with other helpers so that CPUs within the map can be handled. Reviewed-by: James Clark <james.clark@arm.com> Signed-off-by: Ian Rogers <irogers@google.com> Acked-by: Namhyung Kim <namhyung@kernel.org> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Alexandre Ghiti <alexghiti@rivosinc.com> Cc: Andrew Jones <ajones@ventanamicro.com> Cc: André Almeida <andrealmeid@igalia.com> Cc: Athira Rajeev <atrajeev@linux.vnet.ibm.com> Cc: Atish Patra <atishp@rivosinc.com> Cc: Changbin Du <changbin.du@huawei.com> Cc: Darren Hart <dvhart@infradead.org> Cc: Davidlohr Bueso <dave@stgolabs.net> Cc: Huacai Chen <chenhuacai@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.g.garry@oracle.com> Cc: K Prateek Nayak <kprateek.nayak@amd.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Nick Desaulniers <ndesaulniers@google.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Paran Lee <p4ranlee@gmail.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ravi Bangoria <ravi.bangoria@amd.com> Cc: Sandipan Das <sandipan.das@amd.com> Cc: Sean Christopherson <seanjc@google.com> Cc: Steinar H. Gunderson <sesse@google.com> Cc: Suzuki Poulouse <suzuki.poulose@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Will Deacon <will@kernel.org> Cc: Yang Jihong <yangjihong1@huawei.com> Cc: Yang Li <yang.lee@linux.alibaba.com> Cc: Yanteng Si <siyanteng@loongson.cn> Link: https://lore.kernel.org/r/20240202234057.2085863-6-irogers@google.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2024-02-02 23:40:54 +00:00
perf_cpu_map__for_each_cpu_skip_any(cpu, idx, map) {
__set_bit(cpu.cpu, set);
perf cpumap: Give CPUs their own type A common problem is confusing CPU map indices with the CPU, by wrapping the CPU with a struct then this is avoided. This approach is similar to atomic_t. Committer notes: To make it build with BUILD_BPF_SKEL=1 these files needed the conversions to 'struct perf_cpu' usage: tools/perf/util/bpf_counter.c tools/perf/util/bpf_counter_cgroup.c tools/perf/util/bpf_ftrace.c Also perf_env__get_cpu() was removed back in "perf cpumap: Switch cpu_map__build_map to cpu function". Additionally these needed to be fixed for the ARM builds to complete: tools/perf/arch/arm/util/cs-etm.c tools/perf/arch/arm64/util/pmu.c Suggested-by: John Garry <john.garry@huawei.com> Signed-off-by: Ian Rogers <irogers@google.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Paul Clarke <pc@us.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Riccardo Mancini <rickyman7@gmail.com> Cc: Stephane Eranian <eranian@google.com> Cc: Suzuki Poulouse <suzuki.poulose@arm.com> Cc: Vineet Singh <vineet.singh@intel.com> Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Cc: zhengjun.xing@intel.com Link: https://lore.kernel.org/r/20220105061351.120843-49-irogers@google.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-01-05 06:13:51 +00:00
if (WARN_ONCE(cpu2node[cpu.cpu] != -1, "node/cpu topology bug"))
return -EINVAL;
perf cpumap: Give CPUs their own type A common problem is confusing CPU map indices with the CPU, by wrapping the CPU with a struct then this is avoided. This approach is similar to atomic_t. Committer notes: To make it build with BUILD_BPF_SKEL=1 these files needed the conversions to 'struct perf_cpu' usage: tools/perf/util/bpf_counter.c tools/perf/util/bpf_counter_cgroup.c tools/perf/util/bpf_ftrace.c Also perf_env__get_cpu() was removed back in "perf cpumap: Switch cpu_map__build_map to cpu function". Additionally these needed to be fixed for the ARM builds to complete: tools/perf/arch/arm/util/cs-etm.c tools/perf/arch/arm64/util/pmu.c Suggested-by: John Garry <john.garry@huawei.com> Signed-off-by: Ian Rogers <irogers@google.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Paul Clarke <pc@us.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Riccardo Mancini <rickyman7@gmail.com> Cc: Stephane Eranian <eranian@google.com> Cc: Suzuki Poulouse <suzuki.poulose@arm.com> Cc: Vineet Singh <vineet.singh@intel.com> Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Cc: zhengjun.xing@intel.com Link: https://lore.kernel.org/r/20220105061351.120843-49-irogers@google.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-01-05 06:13:51 +00:00
cpu2node[cpu.cpu] = node;
}
}
setup_nodes_header();
return 0;
}
#define HAS_HITMS(__h) ((__h)->stats.lcl_hitm || (__h)->stats.rmt_hitm)
perf c2c: Sort on peer snooping for load operations This patch adds a new option 'peer' so can sort on the cache hit for peer snooping. For displaying with option 'peer', the "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" both sort with the metrics "tot_peer". As result, we can get the 'peer' display: # perf c2c report -d peer --coalesce tid,pid,iaddr,dso -N --stdio ================================================= Shared Data Cache Line Table ================================================= # # ----------- Cacheline ---------- Peer ------- Load Peer ------- Total Total Total --------- Stores -------- ----- Core Load Hit ----- - LLC Load Hit -- - RMT Load Hit -- --- Load Dram ---- # Index Address Node PA cnt Snoop Total Local Remote records Loads Stores L1Hit L1Miss N/A FB L1 L2 LclHit LclHitm RmtHit RmtHitm Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ....... ........ ....... ........ ........ # 0 0xaaaac17d6000 N/A 0 100.00% 99 99 0 18851 18851 0 0 0 0 0 18752 0 99 0 0 0 0 0 ================================================= Shared Cache Line Distribution Pareto ================================================= # # -- Peer Snoop -- ------- Store Refs ------ --------- Data address --------- ---------- cycles ---------- Total cpu Shared # Num Rmt Lcl L1 Hit L1 Miss N/A Offset Node PA cnt Pid Tid Code address rmt peer lcl peer load records cnt Symbol Object Source:Line Node{cpus %peers %stores} # ..... ....... ....... ....... ....... ....... .................. .... ...... ....... ................. .................. ........ ........ ........ ....... ........ ...................... ................ ............... .... # ---------------------------------------------------------------------- 0 0 99 0 0 0 0xaaaac17d6000 ---------------------------------------------------------------------- 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3603:memstress 0xaaaac17c25ac 0 376 41 9314 2 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 2 100.0% n/a} 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3606:memstress 0xaaaac17c25ac 0 375 44 9155 1 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 1 100.0% n/a} 0.00% 48.48% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3606:memstress 0xaaaac17c3e88 0 180 170 65 1 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 1 100.0% n/a} 0.00% 45.45% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3603:memstress 0xaaaac17c3e88 0 180 175 70 2 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 2 100.0% n/a} Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-14-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:49 +00:00
#define HAS_PEER(__h) ((__h)->stats.lcl_peer || (__h)->stats.rmt_peer)
static int resort_shared_cl_cb(struct hist_entry *he, void *arg __maybe_unused)
{
struct c2c_hist_entry *c2c_he;
c2c_he = container_of(he, struct c2c_hist_entry, he);
perf c2c: Sort on peer snooping for load operations This patch adds a new option 'peer' so can sort on the cache hit for peer snooping. For displaying with option 'peer', the "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" both sort with the metrics "tot_peer". As result, we can get the 'peer' display: # perf c2c report -d peer --coalesce tid,pid,iaddr,dso -N --stdio ================================================= Shared Data Cache Line Table ================================================= # # ----------- Cacheline ---------- Peer ------- Load Peer ------- Total Total Total --------- Stores -------- ----- Core Load Hit ----- - LLC Load Hit -- - RMT Load Hit -- --- Load Dram ---- # Index Address Node PA cnt Snoop Total Local Remote records Loads Stores L1Hit L1Miss N/A FB L1 L2 LclHit LclHitm RmtHit RmtHitm Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ....... ........ ....... ........ ........ # 0 0xaaaac17d6000 N/A 0 100.00% 99 99 0 18851 18851 0 0 0 0 0 18752 0 99 0 0 0 0 0 ================================================= Shared Cache Line Distribution Pareto ================================================= # # -- Peer Snoop -- ------- Store Refs ------ --------- Data address --------- ---------- cycles ---------- Total cpu Shared # Num Rmt Lcl L1 Hit L1 Miss N/A Offset Node PA cnt Pid Tid Code address rmt peer lcl peer load records cnt Symbol Object Source:Line Node{cpus %peers %stores} # ..... ....... ....... ....... ....... ....... .................. .... ...... ....... ................. .................. ........ ........ ........ ....... ........ ...................... ................ ............... .... # ---------------------------------------------------------------------- 0 0 99 0 0 0 0xaaaac17d6000 ---------------------------------------------------------------------- 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3603:memstress 0xaaaac17c25ac 0 376 41 9314 2 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 2 100.0% n/a} 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3606:memstress 0xaaaac17c25ac 0 375 44 9155 1 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 1 100.0% n/a} 0.00% 48.48% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3606:memstress 0xaaaac17c3e88 0 180 170 65 1 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 1 100.0% n/a} 0.00% 45.45% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3603:memstress 0xaaaac17c3e88 0 180 175 70 2 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 2 100.0% n/a} Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-14-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:49 +00:00
if (HAS_HITMS(c2c_he) || HAS_PEER(c2c_he)) {
c2c.shared_clines++;
c2c_add_stats(&c2c.shared_clines_stats, &c2c_he->stats);
}
return 0;
}
static int hists__iterate_cb(struct hists *hists, hists__resort_cb_t cb)
{
struct rb_node *next = rb_first_cached(&hists->entries);
int ret = 0;
while (next) {
struct hist_entry *he;
he = rb_entry(next, struct hist_entry, rb_node);
ret = cb(he, NULL);
if (ret)
break;
next = rb_next(&he->rb_node);
}
return ret;
}
perf c2c report: Add global stats stdio output Display global stats table as part of the stdio output or when --stats option is speicified: $ perf c2c report --stats ================================================= Trace Event Information ================================================= Total records : 41237 Locked Load/Store Operations : 4075 Load Operations : 20526 Loads - uncacheable : 0 Loads - IO : 0 Loads - Miss : 552 Loads - no mapping : 31 Load Fill Buffer Hit : 7333 Load L1D hit : 6398 Load L2D hit : 144 Load LLC hit : 4889 Load Local HITM : 1185 Load Remote HITM : 838 Load Remote HIT : 52 Load Local DRAM : 183 Load Remote DRAM : 106 Load MESI State Exclusive : 289 Load MESI State Shared : 0 Load LLC Misses : 1179 LLC Misses to Local DRAM : 15.5% LLC Misses to Remote DRAM : 9.0% LLC Misses to Remote cache (HIT) : 4.4% LLC Misses to Remote cache (HITM) : 71.1% Store Operations : 20711 Store - uncacheable : 0 Store - no mapping : 1 Store L1D Hit : 20158 Store L1D Miss : 552 No Page Map Rejects : 7 Unable to parse data source : 0 Original-patch-by: Dick Fowles <rfowles@redhat.com> Original-patch-by: Don Zickus <dzickus@redhat.com> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-qkyvao3qsrnwazf0w1jvsh7z@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-02 18:01:59 +00:00
static void print_c2c__display_stats(FILE *out)
{
int llc_misses;
struct c2c_stats *stats = &c2c.hists.stats;
llc_misses = get_load_llc_misses(stats);
perf c2c report: Add global stats stdio output Display global stats table as part of the stdio output or when --stats option is speicified: $ perf c2c report --stats ================================================= Trace Event Information ================================================= Total records : 41237 Locked Load/Store Operations : 4075 Load Operations : 20526 Loads - uncacheable : 0 Loads - IO : 0 Loads - Miss : 552 Loads - no mapping : 31 Load Fill Buffer Hit : 7333 Load L1D hit : 6398 Load L2D hit : 144 Load LLC hit : 4889 Load Local HITM : 1185 Load Remote HITM : 838 Load Remote HIT : 52 Load Local DRAM : 183 Load Remote DRAM : 106 Load MESI State Exclusive : 289 Load MESI State Shared : 0 Load LLC Misses : 1179 LLC Misses to Local DRAM : 15.5% LLC Misses to Remote DRAM : 9.0% LLC Misses to Remote cache (HIT) : 4.4% LLC Misses to Remote cache (HITM) : 71.1% Store Operations : 20711 Store - uncacheable : 0 Store - no mapping : 1 Store L1D Hit : 20158 Store L1D Miss : 552 No Page Map Rejects : 7 Unable to parse data source : 0 Original-patch-by: Dick Fowles <rfowles@redhat.com> Original-patch-by: Don Zickus <dzickus@redhat.com> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-qkyvao3qsrnwazf0w1jvsh7z@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-02 18:01:59 +00:00
fprintf(out, "=================================================\n");
fprintf(out, " Trace Event Information \n");
fprintf(out, "=================================================\n");
fprintf(out, " Total records : %10d\n", stats->nr_entries);
fprintf(out, " Locked Load/Store Operations : %10d\n", stats->locks);
fprintf(out, " Load Operations : %10d\n", stats->load);
fprintf(out, " Loads - uncacheable : %10d\n", stats->ld_uncache);
fprintf(out, " Loads - IO : %10d\n", stats->ld_io);
fprintf(out, " Loads - Miss : %10d\n", stats->ld_miss);
fprintf(out, " Loads - no mapping : %10d\n", stats->ld_noadrs);
fprintf(out, " Load Fill Buffer Hit : %10d\n", stats->ld_fbhit);
fprintf(out, " Load L1D hit : %10d\n", stats->ld_l1hit);
fprintf(out, " Load L2D hit : %10d\n", stats->ld_l2hit);
fprintf(out, " Load LLC hit : %10d\n", stats->ld_llchit + stats->lcl_hitm);
fprintf(out, " Load Local HITM : %10d\n", stats->lcl_hitm);
fprintf(out, " Load Remote HITM : %10d\n", stats->rmt_hitm);
fprintf(out, " Load Remote HIT : %10d\n", stats->rmt_hit);
fprintf(out, " Load Local DRAM : %10d\n", stats->lcl_dram);
fprintf(out, " Load Remote DRAM : %10d\n", stats->rmt_dram);
fprintf(out, " Load MESI State Exclusive : %10d\n", stats->ld_excl);
fprintf(out, " Load MESI State Shared : %10d\n", stats->ld_shared);
fprintf(out, " Load LLC Misses : %10d\n", llc_misses);
fprintf(out, " Load access blocked by data : %10d\n", stats->blk_data);
fprintf(out, " Load access blocked by address : %10d\n", stats->blk_addr);
fprintf(out, " Load HIT Local Peer : %10d\n", stats->lcl_peer);
fprintf(out, " Load HIT Remote Peer : %10d\n", stats->rmt_peer);
perf c2c report: Add global stats stdio output Display global stats table as part of the stdio output or when --stats option is speicified: $ perf c2c report --stats ================================================= Trace Event Information ================================================= Total records : 41237 Locked Load/Store Operations : 4075 Load Operations : 20526 Loads - uncacheable : 0 Loads - IO : 0 Loads - Miss : 552 Loads - no mapping : 31 Load Fill Buffer Hit : 7333 Load L1D hit : 6398 Load L2D hit : 144 Load LLC hit : 4889 Load Local HITM : 1185 Load Remote HITM : 838 Load Remote HIT : 52 Load Local DRAM : 183 Load Remote DRAM : 106 Load MESI State Exclusive : 289 Load MESI State Shared : 0 Load LLC Misses : 1179 LLC Misses to Local DRAM : 15.5% LLC Misses to Remote DRAM : 9.0% LLC Misses to Remote cache (HIT) : 4.4% LLC Misses to Remote cache (HITM) : 71.1% Store Operations : 20711 Store - uncacheable : 0 Store - no mapping : 1 Store L1D Hit : 20158 Store L1D Miss : 552 No Page Map Rejects : 7 Unable to parse data source : 0 Original-patch-by: Dick Fowles <rfowles@redhat.com> Original-patch-by: Don Zickus <dzickus@redhat.com> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-qkyvao3qsrnwazf0w1jvsh7z@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-02 18:01:59 +00:00
fprintf(out, " LLC Misses to Local DRAM : %10.1f%%\n", ((double)stats->lcl_dram/(double)llc_misses) * 100.);
fprintf(out, " LLC Misses to Remote DRAM : %10.1f%%\n", ((double)stats->rmt_dram/(double)llc_misses) * 100.);
fprintf(out, " LLC Misses to Remote cache (HIT) : %10.1f%%\n", ((double)stats->rmt_hit /(double)llc_misses) * 100.);
fprintf(out, " LLC Misses to Remote cache (HITM) : %10.1f%%\n", ((double)stats->rmt_hitm/(double)llc_misses) * 100.);
fprintf(out, " Store Operations : %10d\n", stats->store);
fprintf(out, " Store - uncacheable : %10d\n", stats->st_uncache);
fprintf(out, " Store - no mapping : %10d\n", stats->st_noadrs);
fprintf(out, " Store L1D Hit : %10d\n", stats->st_l1hit);
fprintf(out, " Store L1D Miss : %10d\n", stats->st_l1miss);
fprintf(out, " Store No available memory level : %10d\n", stats->st_na);
perf c2c report: Add global stats stdio output Display global stats table as part of the stdio output or when --stats option is speicified: $ perf c2c report --stats ================================================= Trace Event Information ================================================= Total records : 41237 Locked Load/Store Operations : 4075 Load Operations : 20526 Loads - uncacheable : 0 Loads - IO : 0 Loads - Miss : 552 Loads - no mapping : 31 Load Fill Buffer Hit : 7333 Load L1D hit : 6398 Load L2D hit : 144 Load LLC hit : 4889 Load Local HITM : 1185 Load Remote HITM : 838 Load Remote HIT : 52 Load Local DRAM : 183 Load Remote DRAM : 106 Load MESI State Exclusive : 289 Load MESI State Shared : 0 Load LLC Misses : 1179 LLC Misses to Local DRAM : 15.5% LLC Misses to Remote DRAM : 9.0% LLC Misses to Remote cache (HIT) : 4.4% LLC Misses to Remote cache (HITM) : 71.1% Store Operations : 20711 Store - uncacheable : 0 Store - no mapping : 1 Store L1D Hit : 20158 Store L1D Miss : 552 No Page Map Rejects : 7 Unable to parse data source : 0 Original-patch-by: Dick Fowles <rfowles@redhat.com> Original-patch-by: Don Zickus <dzickus@redhat.com> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-qkyvao3qsrnwazf0w1jvsh7z@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-02 18:01:59 +00:00
fprintf(out, " No Page Map Rejects : %10d\n", stats->nomap);
fprintf(out, " Unable to parse data source : %10d\n", stats->noparse);
}
static void print_shared_cacheline_info(FILE *out)
{
struct c2c_stats *stats = &c2c.shared_clines_stats;
int hitm_cnt = stats->lcl_hitm + stats->rmt_hitm;
fprintf(out, "=================================================\n");
fprintf(out, " Global Shared Cache Line Event Information \n");
fprintf(out, "=================================================\n");
fprintf(out, " Total Shared Cache Lines : %10d\n", c2c.shared_clines);
fprintf(out, " Load HITs on shared lines : %10d\n", stats->load);
fprintf(out, " Fill Buffer Hits on shared lines : %10d\n", stats->ld_fbhit);
fprintf(out, " L1D hits on shared lines : %10d\n", stats->ld_l1hit);
fprintf(out, " L2D hits on shared lines : %10d\n", stats->ld_l2hit);
fprintf(out, " LLC hits on shared lines : %10d\n", stats->ld_llchit + stats->lcl_hitm);
fprintf(out, " Load hits on peer cache or nodes : %10d\n", stats->lcl_peer + stats->rmt_peer);
fprintf(out, " Locked Access on shared lines : %10d\n", stats->locks);
fprintf(out, " Blocked Access on shared lines : %10d\n", stats->blk_data + stats->blk_addr);
fprintf(out, " Store HITs on shared lines : %10d\n", stats->store);
fprintf(out, " Store L1D hits on shared lines : %10d\n", stats->st_l1hit);
fprintf(out, " Store No available memory level : %10d\n", stats->st_na);
fprintf(out, " Total Merged records : %10d\n", hitm_cnt + stats->store);
}
perf c2c report: Add stdio output support Adding the --stdio option output support. The output tables are dumped directly to the stdio. $ perf c2c report ================================================= Shared Data Cache Line Table ================================================= # # Total ----- LLC Load Hitm ----- ---- Store Reference ---- --- Load Dram ---- LLC Total ----- Core Load Hit ----- -- LLC Load Hit -- # Cacheline records %hitm Total Lcl Rmt Total L1Hit L1Miss Lcl Rmt Ld Miss Loads FB L1 L2 Llc Rmt # .................. ....... ....... ....... ....... ....... ....... ....... ....... ........ ........ ....... ....... ....... ....... ....... ........ ........ # 0xffff88000235f840 17 0.00% 0 0 0 17 17 0 0 0 0 0 0 0 0 0 0 ... ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address ---------- cycles ---------- cpu Shared # Rmt Lcl L1 Hit L1 Miss Offset Pid Tid rmt hitm lcl hitm load cnt Symbol Object Node # ....... ....... ....... ....... .................. ....... ..................... ........ ........ ........ ........ .................... ................. .... # ------------------------------------------------------ 0 0 17 0 0xffff88000235f840 ------------------------------------------------------ 0.00% 0.00% 5.88% 0.00% 0x0 11474 11474:kworker/u16:5 0 0 0 1 [k] rmap_walk_file [kernel.kallsyms] 0 0.00% 0.00% 5.88% 0.00% 0x10 11474 11474:kworker/u16:5 0 0 0 1 [k] lock_page_memcg [kernel.kallsyms] 0 0.00% 0.00% 11.76% 0.00% 0x20 11474 11474:kworker/u16:5 0 0 0 1 [k] page_mapping [kernel.kallsyms] 0 0.00% 0.00% 64.71% 0.00% 0x28 11474 11474:kworker/u16:5 0 0 0 1 [k] __test_set_page_writeback [kernel.kallsyms] 0 0.00% 0.00% 11.76% 0.00% 0x30 11474 11474:kworker/u16:5 0 0 0 1 [k] page_mapped [kernel.kallsyms] 0 ... Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-eorco9r0oeesjve77pkkg43s@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-03 12:32:56 +00:00
static void print_cacheline(struct c2c_hists *c2c_hists,
struct hist_entry *he_cl,
struct perf_hpp_list *hpp_list,
FILE *out)
{
char bf[1000];
struct perf_hpp hpp = {
.buf = bf,
.size = 1000,
};
static bool once;
if (!once) {
hists__fprintf_headers(&c2c_hists->hists, out);
once = true;
} else {
fprintf(out, "\n");
}
fprintf(out, " ----------------------------------------------------------------------\n");
perf c2c report: Add stdio output support Adding the --stdio option output support. The output tables are dumped directly to the stdio. $ perf c2c report ================================================= Shared Data Cache Line Table ================================================= # # Total ----- LLC Load Hitm ----- ---- Store Reference ---- --- Load Dram ---- LLC Total ----- Core Load Hit ----- -- LLC Load Hit -- # Cacheline records %hitm Total Lcl Rmt Total L1Hit L1Miss Lcl Rmt Ld Miss Loads FB L1 L2 Llc Rmt # .................. ....... ....... ....... ....... ....... ....... ....... ....... ........ ........ ....... ....... ....... ....... ....... ........ ........ # 0xffff88000235f840 17 0.00% 0 0 0 17 17 0 0 0 0 0 0 0 0 0 0 ... ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address ---------- cycles ---------- cpu Shared # Rmt Lcl L1 Hit L1 Miss Offset Pid Tid rmt hitm lcl hitm load cnt Symbol Object Node # ....... ....... ....... ....... .................. ....... ..................... ........ ........ ........ ........ .................... ................. .... # ------------------------------------------------------ 0 0 17 0 0xffff88000235f840 ------------------------------------------------------ 0.00% 0.00% 5.88% 0.00% 0x0 11474 11474:kworker/u16:5 0 0 0 1 [k] rmap_walk_file [kernel.kallsyms] 0 0.00% 0.00% 5.88% 0.00% 0x10 11474 11474:kworker/u16:5 0 0 0 1 [k] lock_page_memcg [kernel.kallsyms] 0 0.00% 0.00% 11.76% 0.00% 0x20 11474 11474:kworker/u16:5 0 0 0 1 [k] page_mapping [kernel.kallsyms] 0 0.00% 0.00% 64.71% 0.00% 0x28 11474 11474:kworker/u16:5 0 0 0 1 [k] __test_set_page_writeback [kernel.kallsyms] 0 0.00% 0.00% 11.76% 0.00% 0x30 11474 11474:kworker/u16:5 0 0 0 1 [k] page_mapped [kernel.kallsyms] 0 ... Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-eorco9r0oeesjve77pkkg43s@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-03 12:32:56 +00:00
__hist_entry__snprintf(he_cl, &hpp, hpp_list);
fprintf(out, "%s\n", bf);
fprintf(out, " ----------------------------------------------------------------------\n");
perf c2c report: Add stdio output support Adding the --stdio option output support. The output tables are dumped directly to the stdio. $ perf c2c report ================================================= Shared Data Cache Line Table ================================================= # # Total ----- LLC Load Hitm ----- ---- Store Reference ---- --- Load Dram ---- LLC Total ----- Core Load Hit ----- -- LLC Load Hit -- # Cacheline records %hitm Total Lcl Rmt Total L1Hit L1Miss Lcl Rmt Ld Miss Loads FB L1 L2 Llc Rmt # .................. ....... ....... ....... ....... ....... ....... ....... ....... ........ ........ ....... ....... ....... ....... ....... ........ ........ # 0xffff88000235f840 17 0.00% 0 0 0 17 17 0 0 0 0 0 0 0 0 0 0 ... ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address ---------- cycles ---------- cpu Shared # Rmt Lcl L1 Hit L1 Miss Offset Pid Tid rmt hitm lcl hitm load cnt Symbol Object Node # ....... ....... ....... ....... .................. ....... ..................... ........ ........ ........ ........ .................... ................. .... # ------------------------------------------------------ 0 0 17 0 0xffff88000235f840 ------------------------------------------------------ 0.00% 0.00% 5.88% 0.00% 0x0 11474 11474:kworker/u16:5 0 0 0 1 [k] rmap_walk_file [kernel.kallsyms] 0 0.00% 0.00% 5.88% 0.00% 0x10 11474 11474:kworker/u16:5 0 0 0 1 [k] lock_page_memcg [kernel.kallsyms] 0 0.00% 0.00% 11.76% 0.00% 0x20 11474 11474:kworker/u16:5 0 0 0 1 [k] page_mapping [kernel.kallsyms] 0 0.00% 0.00% 64.71% 0.00% 0x28 11474 11474:kworker/u16:5 0 0 0 1 [k] __test_set_page_writeback [kernel.kallsyms] 0 0.00% 0.00% 11.76% 0.00% 0x30 11474 11474:kworker/u16:5 0 0 0 1 [k] page_mapped [kernel.kallsyms] 0 ... Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-eorco9r0oeesjve77pkkg43s@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-03 12:32:56 +00:00
hists__fprintf(&c2c_hists->hists, false, 0, 0, 0, out, false);
perf c2c report: Add stdio output support Adding the --stdio option output support. The output tables are dumped directly to the stdio. $ perf c2c report ================================================= Shared Data Cache Line Table ================================================= # # Total ----- LLC Load Hitm ----- ---- Store Reference ---- --- Load Dram ---- LLC Total ----- Core Load Hit ----- -- LLC Load Hit -- # Cacheline records %hitm Total Lcl Rmt Total L1Hit L1Miss Lcl Rmt Ld Miss Loads FB L1 L2 Llc Rmt # .................. ....... ....... ....... ....... ....... ....... ....... ....... ........ ........ ....... ....... ....... ....... ....... ........ ........ # 0xffff88000235f840 17 0.00% 0 0 0 17 17 0 0 0 0 0 0 0 0 0 0 ... ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address ---------- cycles ---------- cpu Shared # Rmt Lcl L1 Hit L1 Miss Offset Pid Tid rmt hitm lcl hitm load cnt Symbol Object Node # ....... ....... ....... ....... .................. ....... ..................... ........ ........ ........ ........ .................... ................. .... # ------------------------------------------------------ 0 0 17 0 0xffff88000235f840 ------------------------------------------------------ 0.00% 0.00% 5.88% 0.00% 0x0 11474 11474:kworker/u16:5 0 0 0 1 [k] rmap_walk_file [kernel.kallsyms] 0 0.00% 0.00% 5.88% 0.00% 0x10 11474 11474:kworker/u16:5 0 0 0 1 [k] lock_page_memcg [kernel.kallsyms] 0 0.00% 0.00% 11.76% 0.00% 0x20 11474 11474:kworker/u16:5 0 0 0 1 [k] page_mapping [kernel.kallsyms] 0 0.00% 0.00% 64.71% 0.00% 0x28 11474 11474:kworker/u16:5 0 0 0 1 [k] __test_set_page_writeback [kernel.kallsyms] 0 0.00% 0.00% 11.76% 0.00% 0x30 11474 11474:kworker/u16:5 0 0 0 1 [k] page_mapped [kernel.kallsyms] 0 ... Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-eorco9r0oeesjve77pkkg43s@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-03 12:32:56 +00:00
}
static void print_pareto(FILE *out)
{
struct perf_hpp_list hpp_list;
struct rb_node *nd;
int ret;
const char *cl_output;
perf c2c: Sort on peer snooping for load operations This patch adds a new option 'peer' so can sort on the cache hit for peer snooping. For displaying with option 'peer', the "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" both sort with the metrics "tot_peer". As result, we can get the 'peer' display: # perf c2c report -d peer --coalesce tid,pid,iaddr,dso -N --stdio ================================================= Shared Data Cache Line Table ================================================= # # ----------- Cacheline ---------- Peer ------- Load Peer ------- Total Total Total --------- Stores -------- ----- Core Load Hit ----- - LLC Load Hit -- - RMT Load Hit -- --- Load Dram ---- # Index Address Node PA cnt Snoop Total Local Remote records Loads Stores L1Hit L1Miss N/A FB L1 L2 LclHit LclHitm RmtHit RmtHitm Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ....... ........ ....... ........ ........ # 0 0xaaaac17d6000 N/A 0 100.00% 99 99 0 18851 18851 0 0 0 0 0 18752 0 99 0 0 0 0 0 ================================================= Shared Cache Line Distribution Pareto ================================================= # # -- Peer Snoop -- ------- Store Refs ------ --------- Data address --------- ---------- cycles ---------- Total cpu Shared # Num Rmt Lcl L1 Hit L1 Miss N/A Offset Node PA cnt Pid Tid Code address rmt peer lcl peer load records cnt Symbol Object Source:Line Node{cpus %peers %stores} # ..... ....... ....... ....... ....... ....... .................. .... ...... ....... ................. .................. ........ ........ ........ ....... ........ ...................... ................ ............... .... # ---------------------------------------------------------------------- 0 0 99 0 0 0 0xaaaac17d6000 ---------------------------------------------------------------------- 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3603:memstress 0xaaaac17c25ac 0 376 41 9314 2 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 2 100.0% n/a} 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3606:memstress 0xaaaac17c25ac 0 375 44 9155 1 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 1 100.0% n/a} 0.00% 48.48% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3606:memstress 0xaaaac17c3e88 0 180 170 65 1 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 1 100.0% n/a} 0.00% 45.45% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3603:memstress 0xaaaac17c3e88 0 180 175 70 2 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 2 100.0% n/a} Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-14-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:49 +00:00
if (c2c.display != DISPLAY_SNP_PEER)
cl_output = "cl_num,"
"cl_rmt_hitm,"
"cl_lcl_hitm,"
"cl_stores_l1hit,"
"cl_stores_l1miss,"
"cl_stores_na,"
"dcacheline";
else
cl_output = "cl_num,"
"cl_rmt_peer,"
"cl_lcl_peer,"
"cl_stores_l1hit,"
"cl_stores_l1miss,"
"cl_stores_na,"
"dcacheline";
perf c2c report: Add stdio output support Adding the --stdio option output support. The output tables are dumped directly to the stdio. $ perf c2c report ================================================= Shared Data Cache Line Table ================================================= # # Total ----- LLC Load Hitm ----- ---- Store Reference ---- --- Load Dram ---- LLC Total ----- Core Load Hit ----- -- LLC Load Hit -- # Cacheline records %hitm Total Lcl Rmt Total L1Hit L1Miss Lcl Rmt Ld Miss Loads FB L1 L2 Llc Rmt # .................. ....... ....... ....... ....... ....... ....... ....... ....... ........ ........ ....... ....... ....... ....... ....... ........ ........ # 0xffff88000235f840 17 0.00% 0 0 0 17 17 0 0 0 0 0 0 0 0 0 0 ... ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address ---------- cycles ---------- cpu Shared # Rmt Lcl L1 Hit L1 Miss Offset Pid Tid rmt hitm lcl hitm load cnt Symbol Object Node # ....... ....... ....... ....... .................. ....... ..................... ........ ........ ........ ........ .................... ................. .... # ------------------------------------------------------ 0 0 17 0 0xffff88000235f840 ------------------------------------------------------ 0.00% 0.00% 5.88% 0.00% 0x0 11474 11474:kworker/u16:5 0 0 0 1 [k] rmap_walk_file [kernel.kallsyms] 0 0.00% 0.00% 5.88% 0.00% 0x10 11474 11474:kworker/u16:5 0 0 0 1 [k] lock_page_memcg [kernel.kallsyms] 0 0.00% 0.00% 11.76% 0.00% 0x20 11474 11474:kworker/u16:5 0 0 0 1 [k] page_mapping [kernel.kallsyms] 0 0.00% 0.00% 64.71% 0.00% 0x28 11474 11474:kworker/u16:5 0 0 0 1 [k] __test_set_page_writeback [kernel.kallsyms] 0 0.00% 0.00% 11.76% 0.00% 0x30 11474 11474:kworker/u16:5 0 0 0 1 [k] page_mapped [kernel.kallsyms] 0 ... Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-eorco9r0oeesjve77pkkg43s@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-03 12:32:56 +00:00
perf_hpp_list__init(&hpp_list);
ret = hpp_list__parse(&hpp_list, cl_output, NULL);
perf c2c report: Add stdio output support Adding the --stdio option output support. The output tables are dumped directly to the stdio. $ perf c2c report ================================================= Shared Data Cache Line Table ================================================= # # Total ----- LLC Load Hitm ----- ---- Store Reference ---- --- Load Dram ---- LLC Total ----- Core Load Hit ----- -- LLC Load Hit -- # Cacheline records %hitm Total Lcl Rmt Total L1Hit L1Miss Lcl Rmt Ld Miss Loads FB L1 L2 Llc Rmt # .................. ....... ....... ....... ....... ....... ....... ....... ....... ........ ........ ....... ....... ....... ....... ....... ........ ........ # 0xffff88000235f840 17 0.00% 0 0 0 17 17 0 0 0 0 0 0 0 0 0 0 ... ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address ---------- cycles ---------- cpu Shared # Rmt Lcl L1 Hit L1 Miss Offset Pid Tid rmt hitm lcl hitm load cnt Symbol Object Node # ....... ....... ....... ....... .................. ....... ..................... ........ ........ ........ ........ .................... ................. .... # ------------------------------------------------------ 0 0 17 0 0xffff88000235f840 ------------------------------------------------------ 0.00% 0.00% 5.88% 0.00% 0x0 11474 11474:kworker/u16:5 0 0 0 1 [k] rmap_walk_file [kernel.kallsyms] 0 0.00% 0.00% 5.88% 0.00% 0x10 11474 11474:kworker/u16:5 0 0 0 1 [k] lock_page_memcg [kernel.kallsyms] 0 0.00% 0.00% 11.76% 0.00% 0x20 11474 11474:kworker/u16:5 0 0 0 1 [k] page_mapping [kernel.kallsyms] 0 0.00% 0.00% 64.71% 0.00% 0x28 11474 11474:kworker/u16:5 0 0 0 1 [k] __test_set_page_writeback [kernel.kallsyms] 0 0.00% 0.00% 11.76% 0.00% 0x30 11474 11474:kworker/u16:5 0 0 0 1 [k] page_mapped [kernel.kallsyms] 0 ... Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-eorco9r0oeesjve77pkkg43s@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-03 12:32:56 +00:00
if (WARN_ONCE(ret, "failed to setup sort entries\n"))
return;
nd = rb_first_cached(&c2c.hists.hists.entries);
perf c2c report: Add stdio output support Adding the --stdio option output support. The output tables are dumped directly to the stdio. $ perf c2c report ================================================= Shared Data Cache Line Table ================================================= # # Total ----- LLC Load Hitm ----- ---- Store Reference ---- --- Load Dram ---- LLC Total ----- Core Load Hit ----- -- LLC Load Hit -- # Cacheline records %hitm Total Lcl Rmt Total L1Hit L1Miss Lcl Rmt Ld Miss Loads FB L1 L2 Llc Rmt # .................. ....... ....... ....... ....... ....... ....... ....... ....... ........ ........ ....... ....... ....... ....... ....... ........ ........ # 0xffff88000235f840 17 0.00% 0 0 0 17 17 0 0 0 0 0 0 0 0 0 0 ... ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address ---------- cycles ---------- cpu Shared # Rmt Lcl L1 Hit L1 Miss Offset Pid Tid rmt hitm lcl hitm load cnt Symbol Object Node # ....... ....... ....... ....... .................. ....... ..................... ........ ........ ........ ........ .................... ................. .... # ------------------------------------------------------ 0 0 17 0 0xffff88000235f840 ------------------------------------------------------ 0.00% 0.00% 5.88% 0.00% 0x0 11474 11474:kworker/u16:5 0 0 0 1 [k] rmap_walk_file [kernel.kallsyms] 0 0.00% 0.00% 5.88% 0.00% 0x10 11474 11474:kworker/u16:5 0 0 0 1 [k] lock_page_memcg [kernel.kallsyms] 0 0.00% 0.00% 11.76% 0.00% 0x20 11474 11474:kworker/u16:5 0 0 0 1 [k] page_mapping [kernel.kallsyms] 0 0.00% 0.00% 64.71% 0.00% 0x28 11474 11474:kworker/u16:5 0 0 0 1 [k] __test_set_page_writeback [kernel.kallsyms] 0 0.00% 0.00% 11.76% 0.00% 0x30 11474 11474:kworker/u16:5 0 0 0 1 [k] page_mapped [kernel.kallsyms] 0 ... Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-eorco9r0oeesjve77pkkg43s@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-03 12:32:56 +00:00
for (; nd; nd = rb_next(nd)) {
struct hist_entry *he = rb_entry(nd, struct hist_entry, rb_node);
struct c2c_hist_entry *c2c_he;
if (he->filtered)
continue;
c2c_he = container_of(he, struct c2c_hist_entry, he);
print_cacheline(c2c_he->hists, he, &hpp_list, out);
}
}
static void print_c2c_info(FILE *out, struct perf_session *session)
{
struct evlist *evlist = session->evlist;
struct evsel *evsel;
bool first = true;
fprintf(out, "=================================================\n");
fprintf(out, " c2c details \n");
fprintf(out, "=================================================\n");
evlist__for_each_entry(evlist, evsel) {
fprintf(out, "%-36s: %s\n", first ? " Events" : "", evsel__name(evsel));
first = false;
}
fprintf(out, " Cachelines sort on : %s\n",
display_str[c2c.display]);
fprintf(out, " Cacheline data grouping : %s\n", c2c.cl_sort);
}
static void perf_c2c__hists_fprintf(FILE *out, struct perf_session *session)
perf c2c report: Add stdio output support Adding the --stdio option output support. The output tables are dumped directly to the stdio. $ perf c2c report ================================================= Shared Data Cache Line Table ================================================= # # Total ----- LLC Load Hitm ----- ---- Store Reference ---- --- Load Dram ---- LLC Total ----- Core Load Hit ----- -- LLC Load Hit -- # Cacheline records %hitm Total Lcl Rmt Total L1Hit L1Miss Lcl Rmt Ld Miss Loads FB L1 L2 Llc Rmt # .................. ....... ....... ....... ....... ....... ....... ....... ....... ........ ........ ....... ....... ....... ....... ....... ........ ........ # 0xffff88000235f840 17 0.00% 0 0 0 17 17 0 0 0 0 0 0 0 0 0 0 ... ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address ---------- cycles ---------- cpu Shared # Rmt Lcl L1 Hit L1 Miss Offset Pid Tid rmt hitm lcl hitm load cnt Symbol Object Node # ....... ....... ....... ....... .................. ....... ..................... ........ ........ ........ ........ .................... ................. .... # ------------------------------------------------------ 0 0 17 0 0xffff88000235f840 ------------------------------------------------------ 0.00% 0.00% 5.88% 0.00% 0x0 11474 11474:kworker/u16:5 0 0 0 1 [k] rmap_walk_file [kernel.kallsyms] 0 0.00% 0.00% 5.88% 0.00% 0x10 11474 11474:kworker/u16:5 0 0 0 1 [k] lock_page_memcg [kernel.kallsyms] 0 0.00% 0.00% 11.76% 0.00% 0x20 11474 11474:kworker/u16:5 0 0 0 1 [k] page_mapping [kernel.kallsyms] 0 0.00% 0.00% 64.71% 0.00% 0x28 11474 11474:kworker/u16:5 0 0 0 1 [k] __test_set_page_writeback [kernel.kallsyms] 0 0.00% 0.00% 11.76% 0.00% 0x30 11474 11474:kworker/u16:5 0 0 0 1 [k] page_mapped [kernel.kallsyms] 0 ... Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-eorco9r0oeesjve77pkkg43s@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-03 12:32:56 +00:00
{
setup_pager();
perf c2c report: Add global stats stdio output Display global stats table as part of the stdio output or when --stats option is speicified: $ perf c2c report --stats ================================================= Trace Event Information ================================================= Total records : 41237 Locked Load/Store Operations : 4075 Load Operations : 20526 Loads - uncacheable : 0 Loads - IO : 0 Loads - Miss : 552 Loads - no mapping : 31 Load Fill Buffer Hit : 7333 Load L1D hit : 6398 Load L2D hit : 144 Load LLC hit : 4889 Load Local HITM : 1185 Load Remote HITM : 838 Load Remote HIT : 52 Load Local DRAM : 183 Load Remote DRAM : 106 Load MESI State Exclusive : 289 Load MESI State Shared : 0 Load LLC Misses : 1179 LLC Misses to Local DRAM : 15.5% LLC Misses to Remote DRAM : 9.0% LLC Misses to Remote cache (HIT) : 4.4% LLC Misses to Remote cache (HITM) : 71.1% Store Operations : 20711 Store - uncacheable : 0 Store - no mapping : 1 Store L1D Hit : 20158 Store L1D Miss : 552 No Page Map Rejects : 7 Unable to parse data source : 0 Original-patch-by: Dick Fowles <rfowles@redhat.com> Original-patch-by: Don Zickus <dzickus@redhat.com> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-qkyvao3qsrnwazf0w1jvsh7z@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-02 18:01:59 +00:00
print_c2c__display_stats(out);
fprintf(out, "\n");
print_shared_cacheline_info(out);
fprintf(out, "\n");
print_c2c_info(out, session);
perf c2c report: Add global stats stdio output Display global stats table as part of the stdio output or when --stats option is speicified: $ perf c2c report --stats ================================================= Trace Event Information ================================================= Total records : 41237 Locked Load/Store Operations : 4075 Load Operations : 20526 Loads - uncacheable : 0 Loads - IO : 0 Loads - Miss : 552 Loads - no mapping : 31 Load Fill Buffer Hit : 7333 Load L1D hit : 6398 Load L2D hit : 144 Load LLC hit : 4889 Load Local HITM : 1185 Load Remote HITM : 838 Load Remote HIT : 52 Load Local DRAM : 183 Load Remote DRAM : 106 Load MESI State Exclusive : 289 Load MESI State Shared : 0 Load LLC Misses : 1179 LLC Misses to Local DRAM : 15.5% LLC Misses to Remote DRAM : 9.0% LLC Misses to Remote cache (HIT) : 4.4% LLC Misses to Remote cache (HITM) : 71.1% Store Operations : 20711 Store - uncacheable : 0 Store - no mapping : 1 Store L1D Hit : 20158 Store L1D Miss : 552 No Page Map Rejects : 7 Unable to parse data source : 0 Original-patch-by: Dick Fowles <rfowles@redhat.com> Original-patch-by: Don Zickus <dzickus@redhat.com> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-qkyvao3qsrnwazf0w1jvsh7z@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-02 18:01:59 +00:00
if (c2c.stats_only)
return;
perf c2c report: Add stdio output support Adding the --stdio option output support. The output tables are dumped directly to the stdio. $ perf c2c report ================================================= Shared Data Cache Line Table ================================================= # # Total ----- LLC Load Hitm ----- ---- Store Reference ---- --- Load Dram ---- LLC Total ----- Core Load Hit ----- -- LLC Load Hit -- # Cacheline records %hitm Total Lcl Rmt Total L1Hit L1Miss Lcl Rmt Ld Miss Loads FB L1 L2 Llc Rmt # .................. ....... ....... ....... ....... ....... ....... ....... ....... ........ ........ ....... ....... ....... ....... ....... ........ ........ # 0xffff88000235f840 17 0.00% 0 0 0 17 17 0 0 0 0 0 0 0 0 0 0 ... ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address ---------- cycles ---------- cpu Shared # Rmt Lcl L1 Hit L1 Miss Offset Pid Tid rmt hitm lcl hitm load cnt Symbol Object Node # ....... ....... ....... ....... .................. ....... ..................... ........ ........ ........ ........ .................... ................. .... # ------------------------------------------------------ 0 0 17 0 0xffff88000235f840 ------------------------------------------------------ 0.00% 0.00% 5.88% 0.00% 0x0 11474 11474:kworker/u16:5 0 0 0 1 [k] rmap_walk_file [kernel.kallsyms] 0 0.00% 0.00% 5.88% 0.00% 0x10 11474 11474:kworker/u16:5 0 0 0 1 [k] lock_page_memcg [kernel.kallsyms] 0 0.00% 0.00% 11.76% 0.00% 0x20 11474 11474:kworker/u16:5 0 0 0 1 [k] page_mapping [kernel.kallsyms] 0 0.00% 0.00% 64.71% 0.00% 0x28 11474 11474:kworker/u16:5 0 0 0 1 [k] __test_set_page_writeback [kernel.kallsyms] 0 0.00% 0.00% 11.76% 0.00% 0x30 11474 11474:kworker/u16:5 0 0 0 1 [k] page_mapped [kernel.kallsyms] 0 ... Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-eorco9r0oeesjve77pkkg43s@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-03 12:32:56 +00:00
fprintf(out, "\n");
fprintf(out, "=================================================\n");
fprintf(out, " Shared Data Cache Line Table \n");
fprintf(out, "=================================================\n");
fprintf(out, "#\n");
hists__fprintf(&c2c.hists.hists, true, 0, 0, 0, stdout, true);
perf c2c report: Add stdio output support Adding the --stdio option output support. The output tables are dumped directly to the stdio. $ perf c2c report ================================================= Shared Data Cache Line Table ================================================= # # Total ----- LLC Load Hitm ----- ---- Store Reference ---- --- Load Dram ---- LLC Total ----- Core Load Hit ----- -- LLC Load Hit -- # Cacheline records %hitm Total Lcl Rmt Total L1Hit L1Miss Lcl Rmt Ld Miss Loads FB L1 L2 Llc Rmt # .................. ....... ....... ....... ....... ....... ....... ....... ....... ........ ........ ....... ....... ....... ....... ....... ........ ........ # 0xffff88000235f840 17 0.00% 0 0 0 17 17 0 0 0 0 0 0 0 0 0 0 ... ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address ---------- cycles ---------- cpu Shared # Rmt Lcl L1 Hit L1 Miss Offset Pid Tid rmt hitm lcl hitm load cnt Symbol Object Node # ....... ....... ....... ....... .................. ....... ..................... ........ ........ ........ ........ .................... ................. .... # ------------------------------------------------------ 0 0 17 0 0xffff88000235f840 ------------------------------------------------------ 0.00% 0.00% 5.88% 0.00% 0x0 11474 11474:kworker/u16:5 0 0 0 1 [k] rmap_walk_file [kernel.kallsyms] 0 0.00% 0.00% 5.88% 0.00% 0x10 11474 11474:kworker/u16:5 0 0 0 1 [k] lock_page_memcg [kernel.kallsyms] 0 0.00% 0.00% 11.76% 0.00% 0x20 11474 11474:kworker/u16:5 0 0 0 1 [k] page_mapping [kernel.kallsyms] 0 0.00% 0.00% 64.71% 0.00% 0x28 11474 11474:kworker/u16:5 0 0 0 1 [k] __test_set_page_writeback [kernel.kallsyms] 0 0.00% 0.00% 11.76% 0.00% 0x30 11474 11474:kworker/u16:5 0 0 0 1 [k] page_mapped [kernel.kallsyms] 0 ... Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-eorco9r0oeesjve77pkkg43s@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-03 12:32:56 +00:00
fprintf(out, "\n");
fprintf(out, "=================================================\n");
fprintf(out, " Shared Cache Line Distribution Pareto \n");
fprintf(out, "=================================================\n");
fprintf(out, "#\n");
print_pareto(out);
}
#ifdef HAVE_SLANG_SUPPORT
static void c2c_browser__update_nr_entries(struct hist_browser *hb)
{
u64 nr_entries = 0;
struct rb_node *nd = rb_first_cached(&hb->hists->entries);
while (nd) {
struct hist_entry *he = rb_entry(nd, struct hist_entry, rb_node);
if (!he->filtered)
nr_entries++;
nd = rb_next(nd);
}
hb->nr_non_filtered_entries = nr_entries;
}
struct c2c_cacheline_browser {
struct hist_browser hb;
struct hist_entry *he;
};
static int
perf_c2c_cacheline_browser__title(struct hist_browser *browser,
char *bf, size_t size)
{
struct c2c_cacheline_browser *cl_browser;
struct hist_entry *he;
uint64_t addr = 0;
cl_browser = container_of(browser, struct c2c_cacheline_browser, hb);
he = cl_browser->he;
if (he->mem_info)
addr = cl_address(mem_info__daddr(he->mem_info)->addr, chk_double_cl);
scnprintf(bf, size, "Cacheline 0x%lx", addr);
return 0;
}
static struct c2c_cacheline_browser*
c2c_cacheline_browser__new(struct hists *hists, struct hist_entry *he)
{
struct c2c_cacheline_browser *browser;
browser = zalloc(sizeof(*browser));
if (browser) {
hist_browser__init(&browser->hb, hists);
browser->hb.c2c_filter = true;
browser->hb.title = perf_c2c_cacheline_browser__title;
browser->he = he;
}
return browser;
}
static int perf_c2c__browse_cacheline(struct hist_entry *he)
{
struct c2c_hist_entry *c2c_he;
struct c2c_hists *c2c_hists;
struct c2c_cacheline_browser *cl_browser;
struct hist_browser *browser;
int key = -1;
perf tools: Replace automatic const char[] variables by statics An automatic const char[] variable gets initialized at runtime, just like any other automatic variable. For long strings, that uses a lot of stack and wastes time building the string; e.g. for the "No %s allocation events..." case one has: 444516: 48 b8 4e 6f 20 25 73 20 61 6c movabs $0x6c61207325206f4e,%rax # "No %s al" ... 444674: 48 89 45 80 mov %rax,-0x80(%rbp) 444678: 48 b8 6c 6f 63 61 74 69 6f 6e movabs $0x6e6f697461636f6c,%rax # "location" 444682: 48 89 45 88 mov %rax,-0x78(%rbp) 444686: 48 b8 20 65 76 65 6e 74 73 20 movabs $0x2073746e65766520,%rax # " events " 444690: 66 44 89 55 c4 mov %r10w,-0x3c(%rbp) 444695: 48 89 45 90 mov %rax,-0x70(%rbp) 444699: 48 b8 66 6f 75 6e 64 2e 20 20 movabs $0x20202e646e756f66,%rax Make them all static so that the compiler just references objects in .rodata. Committer testing: Ok, using dwarves's codiff tool: $ codiff --functions /tmp/perf.before ~/bin/perf builtin-sched.c: cmd_sched | -48 1 function changed, 48 bytes removed, diff: -48 builtin-report.c: cmd_report | -32 1 function changed, 32 bytes removed, diff: -32 builtin-kmem.c: cmd_kmem | -64 build_alloc_func_list | -50 2 functions changed, 114 bytes removed, diff: -114 builtin-c2c.c: perf_c2c__report | -390 1 function changed, 390 bytes removed, diff: -390 ui/browsers/header.c: tui__header_window | -104 1 function changed, 104 bytes removed, diff: -104 /home/acme/bin/perf: 9 functions changed, 688 bytes removed, diff: -688 Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Acked-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20181102230624.20064-1-linux@rasmusvillemoes.dk Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-11-02 23:06:23 +00:00
static const char help[] =
" ENTER Toggle callchains (if present) \n"
" n Toggle Node details info \n"
" s Toggle full length of symbol and source line columns \n"
" q Return back to cacheline list \n";
perf c2c report: Fix crash for empty browser 'perf c2c' scans read/write accesses and tries to find false sharing cases, so when the events it wants were not asked for or ended up not taking place, we get no histograms. So do not try to display entry details if there's not any. Currently this ends up in crash: $ perf c2c report # then press 'd' perf: Segmentation fault $ Committer testing: Before: Record a perf.data file without events of interest to 'perf c2c report', then call it and press 'd': # perf record sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.001 MB perf.data (6 samples) ] # perf c2c report perf: Segmentation fault -------- backtrace -------- perf[0x5b1d2a] /lib64/libc.so.6(+0x346df)[0x7fcb566e36df] perf[0x46fcae] perf[0x4a9f1e] perf[0x4aa220] perf(main+0x301)[0x42c561] /lib64/libc.so.6(__libc_start_main+0xe9)[0x7fcb566cff29] perf(_start+0x29)[0x42c999] # After the patch the segfault doesn't take place, a follow up patch to tell the user why nothing changes when 'd' is pressed would be good. Reported-by: rodia@autistici.org Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Fixes: f1c5fd4d0bb9 ("perf c2c report: Add TUI cacheline browser") Link: http://lkml.kernel.org/r/20180724062008.26126-1-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-07-24 06:20:08 +00:00
if (!he)
return 0;
/* Display compact version first. */
c2c.symbol_full = false;
c2c_he = container_of(he, struct c2c_hist_entry, he);
c2c_hists = c2c_he->hists;
cl_browser = c2c_cacheline_browser__new(&c2c_hists->hists, he);
if (cl_browser == NULL)
return -1;
browser = &cl_browser->hb;
/* reset abort key so that it can get Ctrl-C as a key */
SLang_reset_tty();
SLang_init_tty(0, 0, 0);
c2c_browser__update_nr_entries(browser);
while (1) {
key = hist_browser__run(browser, "? - help", true, 0);
switch (key) {
case 's':
c2c.symbol_full = !c2c.symbol_full;
break;
case 'n':
c2c.node_info = (c2c.node_info + 1) % 3;
setup_nodes_header();
break;
case 'q':
goto out;
case '?':
ui_browser__help_window(&browser->b, help);
break;
default:
break;
}
}
out:
free(cl_browser);
return 0;
}
static int perf_c2c_browser__title(struct hist_browser *browser,
char *bf, size_t size)
{
scnprintf(bf, size,
"Shared Data Cache Line Table "
"(%lu entries, sorted on %s)",
browser->nr_non_filtered_entries,
display_str[c2c.display]);
return 0;
}
static struct hist_browser*
perf_c2c_browser__new(struct hists *hists)
{
struct hist_browser *browser = hist_browser__new(hists);
if (browser) {
browser->title = perf_c2c_browser__title;
browser->c2c_filter = true;
}
return browser;
}
static int perf_c2c__hists_browse(struct hists *hists)
{
struct hist_browser *browser;
int key = -1;
perf tools: Replace automatic const char[] variables by statics An automatic const char[] variable gets initialized at runtime, just like any other automatic variable. For long strings, that uses a lot of stack and wastes time building the string; e.g. for the "No %s allocation events..." case one has: 444516: 48 b8 4e 6f 20 25 73 20 61 6c movabs $0x6c61207325206f4e,%rax # "No %s al" ... 444674: 48 89 45 80 mov %rax,-0x80(%rbp) 444678: 48 b8 6c 6f 63 61 74 69 6f 6e movabs $0x6e6f697461636f6c,%rax # "location" 444682: 48 89 45 88 mov %rax,-0x78(%rbp) 444686: 48 b8 20 65 76 65 6e 74 73 20 movabs $0x2073746e65766520,%rax # " events " 444690: 66 44 89 55 c4 mov %r10w,-0x3c(%rbp) 444695: 48 89 45 90 mov %rax,-0x70(%rbp) 444699: 48 b8 66 6f 75 6e 64 2e 20 20 movabs $0x20202e646e756f66,%rax Make them all static so that the compiler just references objects in .rodata. Committer testing: Ok, using dwarves's codiff tool: $ codiff --functions /tmp/perf.before ~/bin/perf builtin-sched.c: cmd_sched | -48 1 function changed, 48 bytes removed, diff: -48 builtin-report.c: cmd_report | -32 1 function changed, 32 bytes removed, diff: -32 builtin-kmem.c: cmd_kmem | -64 build_alloc_func_list | -50 2 functions changed, 114 bytes removed, diff: -114 builtin-c2c.c: perf_c2c__report | -390 1 function changed, 390 bytes removed, diff: -390 ui/browsers/header.c: tui__header_window | -104 1 function changed, 104 bytes removed, diff: -104 /home/acme/bin/perf: 9 functions changed, 688 bytes removed, diff: -688 Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Acked-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20181102230624.20064-1-linux@rasmusvillemoes.dk Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-11-02 23:06:23 +00:00
static const char help[] =
" d Display cacheline details \n"
" ENTER Toggle callchains (if present) \n"
" q Quit \n";
browser = perf_c2c_browser__new(hists);
if (browser == NULL)
return -1;
/* reset abort key so that it can get Ctrl-C as a key */
SLang_reset_tty();
SLang_init_tty(0, 0, 0);
c2c_browser__update_nr_entries(browser);
while (1) {
key = hist_browser__run(browser, "? - help", true, 0);
switch (key) {
case 'q':
goto out;
case 'd':
perf_c2c__browse_cacheline(browser->he_selection);
break;
case '?':
ui_browser__help_window(&browser->b, help);
break;
default:
break;
}
}
out:
hist_browser__delete(browser);
return 0;
}
static void perf_c2c_display(struct perf_session *session)
{
perf c2c: Fix display bug when using pipe Currently 'perf c2c report' determines display mode using the --stdio option, but it could be a problem if stdout is not a tty since setup_browser falls back to stdio in this case. But perf c2c didn't know this and tried to use TUI browser anyway. It should check "use_browser" variable instead. For example, the following command showed nothing and broke terminal setting. Now it's fixed.. $ perf c2c report | head ================================================= Trace Event Information ================================================= Total records : 136 Locked Load/Store Operations : 6 Load Operations : 62 Loads - uncacheable : 0 Loads - IO : 1 Loads - Miss : 7 Loads - no mapping : 2 Committer notes: When trying it without a proper perf.data file it results in a stuck terminal, just as Namhyung reported above: [acme@jouet ~]$ perf c2c report | head WARNING: no sample cpu value[acme@jouet ~]$ One has to kill it from some other xterm. Confirm that this patch fixes it: After: $ perf c2c report | head WARNING: no sample cpu value================================================= Trace Event Information ================================================= Total records : 14 Locked Load/Store Operations : 0 Load Operations : 0 Loads - uncacheable : 0 Loads - IO : 0 Loads - Miss : 0 Loads - no mapping : 0 $ Signed-off-by: Namhyung Kim <namhyung@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Acked-by: Jiri Olsa <jolsa@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: kernel-team@lge.com Link: http://lkml.kernel.org/r/20170307150851.22304-6-namhyung@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2017-03-07 15:08:33 +00:00
if (use_browser == 0)
perf_c2c__hists_fprintf(stdout, session);
else
perf_c2c__hists_browse(&c2c.hists.hists);
}
#else
static void perf_c2c_display(struct perf_session *session)
{
use_browser = 0;
perf_c2c__hists_fprintf(stdout, session);
}
#endif /* HAVE_SLANG_SUPPORT */
perf c2c report: Add span header over cacheline data Forcing the NUMA node output to be grouped with the "Cacheline" column in both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" tables. Before: # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 After: # ------- Cacheline ------ Total Tot ----- LLC Load Hitm ----- # Index Address Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 Before: # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 After: # ----- HITM ----- -- Store Refs -- ----- Data address ----- # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-9-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:41 +00:00
static char *fill_line(const char *orig, int len)
{
perf c2c report: Add span header over cacheline data Forcing the NUMA node output to be grouped with the "Cacheline" column in both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" tables. Before: # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 After: # ------- Cacheline ------ Total Tot ----- LLC Load Hitm ----- # Index Address Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 Before: # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 After: # ----- HITM ----- -- Store Refs -- ----- Data address ----- # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-9-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:41 +00:00
int i, j, olen = strlen(orig);
char *buf;
buf = zalloc(len + 1);
if (!buf)
return NULL;
j = len / 2 - olen / 2;
for (i = 0; i < j - 1; i++)
buf[i] = '-';
buf[i++] = ' ';
strcpy(buf + i, orig);
i += olen;
buf[i++] = ' ';
for (; i < len; i++)
buf[i] = '-';
return buf;
}
static int ui_quirks(void)
{
const char *nodestr = "Data address";
char *buf;
if (!c2c.use_stdio) {
dim_offset.width = 5;
dim_offset.header = header_offset_tui;
perf c2c: Add report option to show false sharing in adjacent cachelines Many platforms have feature of adjacent cachelines prefetch, when it is enabled, for data in RAM of 2 cachelines (2N and 2N+1) granularity, if one is fetched to cache, the other one could likely be fetched too, which sort of extends the cacheline size to double, thus the false sharing could happens in adjacent cachelines. 0Day has captured performance changed related with this [1], and some commercial software explicitly makes its hot global variables 128 bytes aligned (2 cache lines) to avoid this kind of extended false sharing. So add an option "--double-cl" for 'perf c2c report' to show false sharing in double cache line granularity, which acts just like the cacheline size is doubled. There is no change to c2c record. The hardware events of shared cacheline are still per cacheline, and this option just changes the granularity of how events are grouped and displayed. In the 'perf c2c report' output below (will-it-scale's 'pagefault2' case on old kernel): ---------------------------------------------------------------------- 26 31 2 0 0 0 0xffff888103ec6000 ---------------------------------------------------------------------- 35.48% 50.00% 0.00% 0.00% 0.00% 0x10 0 1 0xffffffff8133148b 1153 66 971 3748 74 [k] get_mem_cgroup_from_mm 6.45% 0.00% 0.00% 0.00% 0.00% 0x10 0 1 0xffffffff813396e4 570 0 1531 879 75 [k] mem_cgroup_charge 25.81% 50.00% 0.00% 0.00% 0.00% 0x54 0 1 0xffffffff81331472 949 70 593 3359 74 [k] get_mem_cgroup_from_mm 19.35% 0.00% 0.00% 0.00% 0.00% 0x54 0 1 0xffffffff81339686 1352 0 1073 1022 74 [k] mem_cgroup_charge 9.68% 0.00% 0.00% 0.00% 0.00% 0x54 0 1 0xffffffff813396d6 1401 0 863 768 74 [k] mem_cgroup_charge 3.23% 0.00% 0.00% 0.00% 0.00% 0x54 0 1 0xffffffff81333106 618 0 804 11 9 [k] uncharge_batch The offset 0x10 and 0x54 used to displayed in 2 groups, and now they are listed together to give users a hint of extended false sharing. [1]. https://lore.kernel.org/lkml/20201102091543.GM31092@shao2-debian/ Committer notes: Link: https://lore.kernel.org/r/Y+wvVNWqXb70l4uy@feng-clx Removed -a, leaving just as --double-cl, as this probably is not used so frequently and perhaps will be even auto-detected if we manage to record the MSR where this is configured. Reviewed-by: Andi Kleen <ak@linux.intel.com> Reviewed-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Feng Tang <feng.tang@intel.com> Tested-by: Leo Yan <leo.yan@linaro.org> Acked-by: Joe Mario <jmario@redhat.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Tim Chen <tim.c.chen@intel.com> Cc: Xing Zhengjun <zhengjun.xing@linux.intel.com> Link: https://lore.kernel.org/r/20230214075823.246414-1-feng.tang@intel.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2023-02-14 07:58:23 +00:00
nodestr = chk_double_cl ? "Double-CL" : "CL";
}
dim_percent_costly_snoop.header = percent_costly_snoop_header[c2c.display];
perf c2c report: Add span header over cacheline data Forcing the NUMA node output to be grouped with the "Cacheline" column in both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" tables. Before: # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 After: # ------- Cacheline ------ Total Tot ----- LLC Load Hitm ----- # Index Address Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 Before: # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 After: # ----- HITM ----- -- Store Refs -- ----- Data address ----- # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-9-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:41 +00:00
/* Fix the zero line for dcacheline column. */
perf c2c: Add report option to show false sharing in adjacent cachelines Many platforms have feature of adjacent cachelines prefetch, when it is enabled, for data in RAM of 2 cachelines (2N and 2N+1) granularity, if one is fetched to cache, the other one could likely be fetched too, which sort of extends the cacheline size to double, thus the false sharing could happens in adjacent cachelines. 0Day has captured performance changed related with this [1], and some commercial software explicitly makes its hot global variables 128 bytes aligned (2 cache lines) to avoid this kind of extended false sharing. So add an option "--double-cl" for 'perf c2c report' to show false sharing in double cache line granularity, which acts just like the cacheline size is doubled. There is no change to c2c record. The hardware events of shared cacheline are still per cacheline, and this option just changes the granularity of how events are grouped and displayed. In the 'perf c2c report' output below (will-it-scale's 'pagefault2' case on old kernel): ---------------------------------------------------------------------- 26 31 2 0 0 0 0xffff888103ec6000 ---------------------------------------------------------------------- 35.48% 50.00% 0.00% 0.00% 0.00% 0x10 0 1 0xffffffff8133148b 1153 66 971 3748 74 [k] get_mem_cgroup_from_mm 6.45% 0.00% 0.00% 0.00% 0.00% 0x10 0 1 0xffffffff813396e4 570 0 1531 879 75 [k] mem_cgroup_charge 25.81% 50.00% 0.00% 0.00% 0.00% 0x54 0 1 0xffffffff81331472 949 70 593 3359 74 [k] get_mem_cgroup_from_mm 19.35% 0.00% 0.00% 0.00% 0.00% 0x54 0 1 0xffffffff81339686 1352 0 1073 1022 74 [k] mem_cgroup_charge 9.68% 0.00% 0.00% 0.00% 0.00% 0x54 0 1 0xffffffff813396d6 1401 0 863 768 74 [k] mem_cgroup_charge 3.23% 0.00% 0.00% 0.00% 0.00% 0x54 0 1 0xffffffff81333106 618 0 804 11 9 [k] uncharge_batch The offset 0x10 and 0x54 used to displayed in 2 groups, and now they are listed together to give users a hint of extended false sharing. [1]. https://lore.kernel.org/lkml/20201102091543.GM31092@shao2-debian/ Committer notes: Link: https://lore.kernel.org/r/Y+wvVNWqXb70l4uy@feng-clx Removed -a, leaving just as --double-cl, as this probably is not used so frequently and perhaps will be even auto-detected if we manage to record the MSR where this is configured. Reviewed-by: Andi Kleen <ak@linux.intel.com> Reviewed-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Feng Tang <feng.tang@intel.com> Tested-by: Leo Yan <leo.yan@linaro.org> Acked-by: Joe Mario <jmario@redhat.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Tim Chen <tim.c.chen@intel.com> Cc: Xing Zhengjun <zhengjun.xing@linux.intel.com> Link: https://lore.kernel.org/r/20230214075823.246414-1-feng.tang@intel.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2023-02-14 07:58:23 +00:00
buf = fill_line(chk_double_cl ? "Double-Cacheline" : "Cacheline",
dim_dcacheline.width +
dim_dcacheline_node.width +
dim_dcacheline_count.width + 4);
perf c2c report: Add span header over cacheline data Forcing the NUMA node output to be grouped with the "Cacheline" column in both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" tables. Before: # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 After: # ------- Cacheline ------ Total Tot ----- LLC Load Hitm ----- # Index Address Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 Before: # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 After: # ----- HITM ----- -- Store Refs -- ----- Data address ----- # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-9-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:41 +00:00
if (!buf)
return -ENOMEM;
dim_dcacheline.header.line[0].text = buf;
/* Fix the zero line for offset column. */
buf = fill_line(nodestr, dim_offset.width +
perf c2c report: Add cacheline address count column Adding the 'PA cnt' column grouped under data cacheline address. It shows how many times the physical addresses changed for the hist entry. It does not show the number of different physical addresses for entry, because we don't store those. We only track the number of times we got different address than we currently hold, which is not expensive and gives similar info. $ perf c2c report --stdio # ----------- Cacheline ---------- Total Tot ----- LLC Load Hitm ----- # Index Address Node PA cnt records Hitm Total Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... # 0 0xffff9ad56dca0a80 0 9 10 7.69% 2 2 0 1 0xffff9ad56dce0a80 0 9 9 7.69% 2 2 0 2 0xffff9ad37659ad80 0 1 2 3.85% 1 1 0 ... # ----- HITM ----- -- Store Refs -- --------- Data address --------- # Num Rmt Lcl L1 Hit L1 Miss Offset Node PA cnt Pid # ..... ....... ....... ....... ....... .................. .... ...... ....... # ------------------------------------------------------------- 0 0 2 3 0 0xffff9ad56dca0a80 ------------------------------------------------------------- 0.00% 0.00% 33.33% 0.00% 0x0 0 1 2510 0.00% 0.00% 33.33% 0.00% 0x4 0 1 2476 0.00% 0.00% 33.33% 0.00% 0x20 0 1 0 0.00% 100.00% 0.00% 0.00% 0x38 0 1 0 Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-10-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:42 +00:00
dim_offset_node.width +
dim_dcacheline_count.width + 4);
perf c2c report: Add span header over cacheline data Forcing the NUMA node output to be grouped with the "Cacheline" column in both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" tables. Before: # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 After: # ------- Cacheline ------ Total Tot ----- LLC Load Hitm ----- # Index Address Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 Before: # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 After: # ----- HITM ----- -- Store Refs -- ----- Data address ----- # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-9-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:41 +00:00
if (!buf)
return -ENOMEM;
dim_offset.header.line[0].text = buf;
return 0;
}
perf c2c report: Allow to report callchains Add --call-graph option to properly setup callchain code. Adding default settings to display callchains whenever they are stored in the perf.data. Committer Notes: Testing it: [root@jouet ~]# perf c2c record -a -g sleep 5 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.331 MB perf.data (4263 samples) ] [root@jouet ~]# perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|CALLCHAIN|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|CALLCHAIN|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 [root@jouet ~]# perf c2c report --stats ================================================= Trace Event Information ================================================= Total records : 4263 Locked Load/Store Operations : 220 Load Operations : 2130 Loads - uncacheable : 1 Loads - IO : 7 Loads - Miss : 86 Loads - no mapping : 5 Load Fill Buffer Hit : 609 Load L1D hit : 612 ================================================= Trace Event Information ================================================= Total records : 4263 Locked Load/Store Operations : 220 Load Operations : 2130 Loads - uncacheable : 1 Loads - IO : 7 Loads - Miss : 86 Loads - no mapping : 5 Load Fill Buffer Hit : 609 Load L1D hit : 612 Load L2D hit : 27 Load LLC hit : 607 Load Local HITM : 15 Load Remote HITM : 0 Load Remote HIT : 0 Load Local DRAM : 176 Load Remote DRAM : 0 Load MESI State Exclusive : 176 Load MESI State Shared : 0 Load LLC Misses : 176 LLC Misses to Local DRAM : 100.0% LLC Misses to Remote DRAM : 0.0% LLC Misses to Remote cache (HIT) : 0.0% LLC Misses to Remote cache (HITM) : 0.0% Store Operations : 2133 Store - uncacheable : 0 Store - no mapping : 1 Store L1D Hit : 1967 Store L1D Miss : 165 No Page Map Rejects : 145 Unable to parse data source : 0 ================================================= Global Shared Cache Line Event Information ================================================= Total Shared Cache Lines : 15 Load HITs on shared lines : 26 Fill Buffer Hits on shared lines : 7 L1D hits on shared lines : 3 L2D hits on shared lines : 0 LLC hits on shared lines : 16 Locked Access on shared lines : 2 Store HITs on shared lines : 8 Store L1D hits on shared lines : 7 Total Merged records : 23 ================================================= c2c details ================================================= Events : cpu/mem-loads,ldlat=30/P : cpu/mem-stores/P [root@jouet ~]# [root@jouet ~]# perf c2c report Shared Data Cache Line Table (2378 entries) Total --- LLC Load Hitm -- -- Store Reference - - Load Dram - LLC Total - Core Load Hit - Cacheline records %hitm Total Lcl Rmt Total L1Hit L1Miss Lcl Rmt Ld Miss Loads FB L1 L2 - 0xffff880024380c00 10 0.00% 0 0 0 6 6 0 0 0 0 4 1 3 0 - 0.13% _raw_spin_lock_irqsave - 0.07% ep_poll sys_epoll_wait do_syscall_64 return_from_SYSCALL_64 + 0x103573 - 0.05% ep_poll_callback __wake_up_common - __wake_up_sync_key - 0.02% pipe_read __vfs_read vfs_read sys_read do_syscall_64 return_from_SYSCALL_64 0xfdad + 0.02% sock_def_readable + 0.02% ep_scan_ready_list.constprop.12 + 0.00% mutex_lock + 0.00% __wake_up_common + 0xffff880024380c40 1 0.00% 0 0 0 1 1 0 0 0 0 0 0 0 0 + 0xffff880024380c80 1 0.00% 0 0 0 0 0 0 0 0 0 1 0 0 0 - 0xffff8800243e9f00 1 0.00% 0 0 0 1 1 0 0 0 0 0 0 0 0 enqueue_entity enqueue_task_fair activate_task ttwu_do_activate try_to_wake_up wake_up_process hrtimer_wakeup __hrtimer_run_queues hrtimer_interrupt local_apic_timer_interrupt smp_apic_timer_interrupt apic_timer_interrupt cpuidle_enter call_cpuidle help ------------- And when presing 'd' to see the cacheline details: Cacheline 0xffff880024380c00 ----- HITM ----- -- Store Refs -- --------- cycles ----- cpu Rmt Lcl L1 Hit L1 Miss Off Pid Tid rmt hitm lcl hitm load cnt Symbol - 0.00% 0.00% 100.00% 0.00% 0x0 1473 1474:Chrome_ChildIOT 0 0 41 2 [k] _raw_spin_lock_irqsave [kernel] - _raw_spin_lock_irqsave - 51.52% ep_poll sys_epoll_wait do_syscall_64 return_from_SYSCALL_64 - 0x103573 47.19% 0 4.33% 0xc30bd - 35.93% ep_poll_callback __wake_up_common - __wake_up_sync_key - 18.20% pipe_read __vfs_read vfs_read sys_read do_syscall_64 return_from_SYSCALL_64 0xfdad - 17.73% sock_def_readable unix_stream_sendmsg sock_sendmsg ___sys_sendmsg __sys_sendmsg sys_sendmsg do_syscall_64 return_from_SYSCALL_64 __GI___libc_sendmsg 0x12c036af1fc0 0x16a4050 0x894928ec83485354 + 12.45% ep_scan_ready_list.constprop.12 + 0.00% 0.00% 0.00% 0.00% 0x8 1473 1474:Chrome_ChildIOT 0 0 102 1 [k] mutex_lock [kernel] + 0.00% 0.00% 0.00% 0.00% 0x38 1473 1473:chrome 0 0 88 1 [k] __wake_up_common [kernel] help Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-inykbom2f19difvsu1e18avr@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-11 16:23:48 +00:00
#define CALLCHAIN_DEFAULT_OPT "graph,0.5,caller,function,percent"
const char callchain_help[] = "Display call graph (stack chain/backtrace):\n\n"
CALLCHAIN_REPORT_HELP
"\n\t\t\t\tDefault: " CALLCHAIN_DEFAULT_OPT;
static int
parse_callchain_opt(const struct option *opt, const char *arg, int unset)
{
struct callchain_param *callchain = opt->value;
callchain->enabled = !unset;
/*
* --no-call-graph
*/
if (unset) {
symbol_conf.use_callchain = false;
callchain->mode = CHAIN_NONE;
return 0;
}
return parse_callchain_report_opt(arg);
}
static int setup_callchain(struct evlist *evlist)
perf c2c report: Allow to report callchains Add --call-graph option to properly setup callchain code. Adding default settings to display callchains whenever they are stored in the perf.data. Committer Notes: Testing it: [root@jouet ~]# perf c2c record -a -g sleep 5 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.331 MB perf.data (4263 samples) ] [root@jouet ~]# perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|CALLCHAIN|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|CALLCHAIN|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 [root@jouet ~]# perf c2c report --stats ================================================= Trace Event Information ================================================= Total records : 4263 Locked Load/Store Operations : 220 Load Operations : 2130 Loads - uncacheable : 1 Loads - IO : 7 Loads - Miss : 86 Loads - no mapping : 5 Load Fill Buffer Hit : 609 Load L1D hit : 612 ================================================= Trace Event Information ================================================= Total records : 4263 Locked Load/Store Operations : 220 Load Operations : 2130 Loads - uncacheable : 1 Loads - IO : 7 Loads - Miss : 86 Loads - no mapping : 5 Load Fill Buffer Hit : 609 Load L1D hit : 612 Load L2D hit : 27 Load LLC hit : 607 Load Local HITM : 15 Load Remote HITM : 0 Load Remote HIT : 0 Load Local DRAM : 176 Load Remote DRAM : 0 Load MESI State Exclusive : 176 Load MESI State Shared : 0 Load LLC Misses : 176 LLC Misses to Local DRAM : 100.0% LLC Misses to Remote DRAM : 0.0% LLC Misses to Remote cache (HIT) : 0.0% LLC Misses to Remote cache (HITM) : 0.0% Store Operations : 2133 Store - uncacheable : 0 Store - no mapping : 1 Store L1D Hit : 1967 Store L1D Miss : 165 No Page Map Rejects : 145 Unable to parse data source : 0 ================================================= Global Shared Cache Line Event Information ================================================= Total Shared Cache Lines : 15 Load HITs on shared lines : 26 Fill Buffer Hits on shared lines : 7 L1D hits on shared lines : 3 L2D hits on shared lines : 0 LLC hits on shared lines : 16 Locked Access on shared lines : 2 Store HITs on shared lines : 8 Store L1D hits on shared lines : 7 Total Merged records : 23 ================================================= c2c details ================================================= Events : cpu/mem-loads,ldlat=30/P : cpu/mem-stores/P [root@jouet ~]# [root@jouet ~]# perf c2c report Shared Data Cache Line Table (2378 entries) Total --- LLC Load Hitm -- -- Store Reference - - Load Dram - LLC Total - Core Load Hit - Cacheline records %hitm Total Lcl Rmt Total L1Hit L1Miss Lcl Rmt Ld Miss Loads FB L1 L2 - 0xffff880024380c00 10 0.00% 0 0 0 6 6 0 0 0 0 4 1 3 0 - 0.13% _raw_spin_lock_irqsave - 0.07% ep_poll sys_epoll_wait do_syscall_64 return_from_SYSCALL_64 + 0x103573 - 0.05% ep_poll_callback __wake_up_common - __wake_up_sync_key - 0.02% pipe_read __vfs_read vfs_read sys_read do_syscall_64 return_from_SYSCALL_64 0xfdad + 0.02% sock_def_readable + 0.02% ep_scan_ready_list.constprop.12 + 0.00% mutex_lock + 0.00% __wake_up_common + 0xffff880024380c40 1 0.00% 0 0 0 1 1 0 0 0 0 0 0 0 0 + 0xffff880024380c80 1 0.00% 0 0 0 0 0 0 0 0 0 1 0 0 0 - 0xffff8800243e9f00 1 0.00% 0 0 0 1 1 0 0 0 0 0 0 0 0 enqueue_entity enqueue_task_fair activate_task ttwu_do_activate try_to_wake_up wake_up_process hrtimer_wakeup __hrtimer_run_queues hrtimer_interrupt local_apic_timer_interrupt smp_apic_timer_interrupt apic_timer_interrupt cpuidle_enter call_cpuidle help ------------- And when presing 'd' to see the cacheline details: Cacheline 0xffff880024380c00 ----- HITM ----- -- Store Refs -- --------- cycles ----- cpu Rmt Lcl L1 Hit L1 Miss Off Pid Tid rmt hitm lcl hitm load cnt Symbol - 0.00% 0.00% 100.00% 0.00% 0x0 1473 1474:Chrome_ChildIOT 0 0 41 2 [k] _raw_spin_lock_irqsave [kernel] - _raw_spin_lock_irqsave - 51.52% ep_poll sys_epoll_wait do_syscall_64 return_from_SYSCALL_64 - 0x103573 47.19% 0 4.33% 0xc30bd - 35.93% ep_poll_callback __wake_up_common - __wake_up_sync_key - 18.20% pipe_read __vfs_read vfs_read sys_read do_syscall_64 return_from_SYSCALL_64 0xfdad - 17.73% sock_def_readable unix_stream_sendmsg sock_sendmsg ___sys_sendmsg __sys_sendmsg sys_sendmsg do_syscall_64 return_from_SYSCALL_64 __GI___libc_sendmsg 0x12c036af1fc0 0x16a4050 0x894928ec83485354 + 12.45% ep_scan_ready_list.constprop.12 + 0.00% 0.00% 0.00% 0.00% 0x8 1473 1474:Chrome_ChildIOT 0 0 102 1 [k] mutex_lock [kernel] + 0.00% 0.00% 0.00% 0.00% 0x38 1473 1473:chrome 0 0 88 1 [k] __wake_up_common [kernel] help Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-inykbom2f19difvsu1e18avr@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-11 16:23:48 +00:00
{
u64 sample_type = evlist__combined_sample_type(evlist);
perf c2c report: Allow to report callchains Add --call-graph option to properly setup callchain code. Adding default settings to display callchains whenever they are stored in the perf.data. Committer Notes: Testing it: [root@jouet ~]# perf c2c record -a -g sleep 5 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.331 MB perf.data (4263 samples) ] [root@jouet ~]# perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|CALLCHAIN|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|CALLCHAIN|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 [root@jouet ~]# perf c2c report --stats ================================================= Trace Event Information ================================================= Total records : 4263 Locked Load/Store Operations : 220 Load Operations : 2130 Loads - uncacheable : 1 Loads - IO : 7 Loads - Miss : 86 Loads - no mapping : 5 Load Fill Buffer Hit : 609 Load L1D hit : 612 ================================================= Trace Event Information ================================================= Total records : 4263 Locked Load/Store Operations : 220 Load Operations : 2130 Loads - uncacheable : 1 Loads - IO : 7 Loads - Miss : 86 Loads - no mapping : 5 Load Fill Buffer Hit : 609 Load L1D hit : 612 Load L2D hit : 27 Load LLC hit : 607 Load Local HITM : 15 Load Remote HITM : 0 Load Remote HIT : 0 Load Local DRAM : 176 Load Remote DRAM : 0 Load MESI State Exclusive : 176 Load MESI State Shared : 0 Load LLC Misses : 176 LLC Misses to Local DRAM : 100.0% LLC Misses to Remote DRAM : 0.0% LLC Misses to Remote cache (HIT) : 0.0% LLC Misses to Remote cache (HITM) : 0.0% Store Operations : 2133 Store - uncacheable : 0 Store - no mapping : 1 Store L1D Hit : 1967 Store L1D Miss : 165 No Page Map Rejects : 145 Unable to parse data source : 0 ================================================= Global Shared Cache Line Event Information ================================================= Total Shared Cache Lines : 15 Load HITs on shared lines : 26 Fill Buffer Hits on shared lines : 7 L1D hits on shared lines : 3 L2D hits on shared lines : 0 LLC hits on shared lines : 16 Locked Access on shared lines : 2 Store HITs on shared lines : 8 Store L1D hits on shared lines : 7 Total Merged records : 23 ================================================= c2c details ================================================= Events : cpu/mem-loads,ldlat=30/P : cpu/mem-stores/P [root@jouet ~]# [root@jouet ~]# perf c2c report Shared Data Cache Line Table (2378 entries) Total --- LLC Load Hitm -- -- Store Reference - - Load Dram - LLC Total - Core Load Hit - Cacheline records %hitm Total Lcl Rmt Total L1Hit L1Miss Lcl Rmt Ld Miss Loads FB L1 L2 - 0xffff880024380c00 10 0.00% 0 0 0 6 6 0 0 0 0 4 1 3 0 - 0.13% _raw_spin_lock_irqsave - 0.07% ep_poll sys_epoll_wait do_syscall_64 return_from_SYSCALL_64 + 0x103573 - 0.05% ep_poll_callback __wake_up_common - __wake_up_sync_key - 0.02% pipe_read __vfs_read vfs_read sys_read do_syscall_64 return_from_SYSCALL_64 0xfdad + 0.02% sock_def_readable + 0.02% ep_scan_ready_list.constprop.12 + 0.00% mutex_lock + 0.00% __wake_up_common + 0xffff880024380c40 1 0.00% 0 0 0 1 1 0 0 0 0 0 0 0 0 + 0xffff880024380c80 1 0.00% 0 0 0 0 0 0 0 0 0 1 0 0 0 - 0xffff8800243e9f00 1 0.00% 0 0 0 1 1 0 0 0 0 0 0 0 0 enqueue_entity enqueue_task_fair activate_task ttwu_do_activate try_to_wake_up wake_up_process hrtimer_wakeup __hrtimer_run_queues hrtimer_interrupt local_apic_timer_interrupt smp_apic_timer_interrupt apic_timer_interrupt cpuidle_enter call_cpuidle help ------------- And when presing 'd' to see the cacheline details: Cacheline 0xffff880024380c00 ----- HITM ----- -- Store Refs -- --------- cycles ----- cpu Rmt Lcl L1 Hit L1 Miss Off Pid Tid rmt hitm lcl hitm load cnt Symbol - 0.00% 0.00% 100.00% 0.00% 0x0 1473 1474:Chrome_ChildIOT 0 0 41 2 [k] _raw_spin_lock_irqsave [kernel] - _raw_spin_lock_irqsave - 51.52% ep_poll sys_epoll_wait do_syscall_64 return_from_SYSCALL_64 - 0x103573 47.19% 0 4.33% 0xc30bd - 35.93% ep_poll_callback __wake_up_common - __wake_up_sync_key - 18.20% pipe_read __vfs_read vfs_read sys_read do_syscall_64 return_from_SYSCALL_64 0xfdad - 17.73% sock_def_readable unix_stream_sendmsg sock_sendmsg ___sys_sendmsg __sys_sendmsg sys_sendmsg do_syscall_64 return_from_SYSCALL_64 __GI___libc_sendmsg 0x12c036af1fc0 0x16a4050 0x894928ec83485354 + 12.45% ep_scan_ready_list.constprop.12 + 0.00% 0.00% 0.00% 0.00% 0x8 1473 1474:Chrome_ChildIOT 0 0 102 1 [k] mutex_lock [kernel] + 0.00% 0.00% 0.00% 0.00% 0x38 1473 1473:chrome 0 0 88 1 [k] __wake_up_common [kernel] help Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-inykbom2f19difvsu1e18avr@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-11 16:23:48 +00:00
enum perf_call_graph_mode mode = CALLCHAIN_NONE;
if ((sample_type & PERF_SAMPLE_REGS_USER) &&
perf unwind: Do not look just at the global callchain_param.record_mode When setting up DWARF callchains on specific events, without using 'record' or 'trace' --call-graph, but instead doing it like: perf trace -e cycles/call-graph=dwarf/ The unwind__prepare_access() call in thread__insert_map() when we process PERF_RECORD_MMAP(2) metadata events were not being performed, precluding us from using per-event DWARF callchains, handling them just when we asked for all events to be DWARF, using "--call-graph dwarf". We do it in the PERF_RECORD_MMAP because we have to look at one of the executable maps to figure out the executable type (64-bit, 32-bit) of the DSO laid out in that mmap. Also to look at the architecture where the perf.data file was recorded. All this probably should be deferred to when we process a sample for some thread that has callchains, so that we do this processing only for the threads with samples, not for all of them. For now, fix using DWARF on specific events. Before: # perf trace --no-syscalls -e probe_libc:inet_pton/call-graph=dwarf/ ping -6 -c 1 ::1 PING ::1(::1) 56 data bytes 64 bytes from ::1: icmp_seq=1 ttl=64 time=0.048 ms --- ::1 ping statistics --- 1 packets transmitted, 1 received, 0% packet loss, time 0ms rtt min/avg/max/mdev = 0.048/0.048/0.048/0.000 ms 0.000 probe_libc:inet_pton:(7fe9597bb350)) Problem processing probe_libc:inet_pton callchain, skipping... # After: # perf trace --no-syscalls -e probe_libc:inet_pton/call-graph=dwarf/ ping -6 -c 1 ::1 PING ::1(::1) 56 data bytes 64 bytes from ::1: icmp_seq=1 ttl=64 time=0.060 ms --- ::1 ping statistics --- 1 packets transmitted, 1 received, 0% packet loss, time 0ms rtt min/avg/max/mdev = 0.060/0.060/0.060/0.000 ms 0.000 probe_libc:inet_pton:(7fd4aa930350)) __inet_pton (inlined) gaih_inet.constprop.7 (/usr/lib64/libc-2.26.so) __GI_getaddrinfo (inlined) [0xffffaa804e51af3f] (/usr/bin/ping) __libc_start_main (/usr/lib64/libc-2.26.so) [0xffffaa804e51b379] (/usr/bin/ping) # # perf trace --call-graph=dwarf --no-syscalls -e probe_libc:inet_pton/call-graph=dwarf/ ping -6 -c 1 ::1 PING ::1(::1) 56 data bytes 64 bytes from ::1: icmp_seq=1 ttl=64 time=0.057 ms --- ::1 ping statistics --- 1 packets transmitted, 1 received, 0% packet loss, time 0ms rtt min/avg/max/mdev = 0.057/0.057/0.057/0.000 ms 0.000 probe_libc:inet_pton:(7f9363b9e350)) __inet_pton (inlined) gaih_inet.constprop.7 (/usr/lib64/libc-2.26.so) __GI_getaddrinfo (inlined) [0xffffa9e8a14e0f3f] (/usr/bin/ping) __libc_start_main (/usr/lib64/libc-2.26.so) [0xffffa9e8a14e1379] (/usr/bin/ping) # # perf trace --call-graph=fp --no-syscalls -e probe_libc:inet_pton/call-graph=dwarf/ ping -6 -c 1 ::1 PING ::1(::1) 56 data bytes 64 bytes from ::1: icmp_seq=1 ttl=64 time=0.077 ms --- ::1 ping statistics --- 1 packets transmitted, 1 received, 0% packet loss, time 0ms rtt min/avg/max/mdev = 0.077/0.077/0.077/0.000 ms 0.000 probe_libc:inet_pton:(7f4947e1c350)) __inet_pton (inlined) gaih_inet.constprop.7 (/usr/lib64/libc-2.26.so) __GI_getaddrinfo (inlined) [0xffffaa716d88ef3f] (/usr/bin/ping) __libc_start_main (/usr/lib64/libc-2.26.so) [0xffffaa716d88f379] (/usr/bin/ping) # # perf trace --no-syscalls -e probe_libc:inet_pton/call-graph=fp/ ping -6 -c 1 ::1 PING ::1(::1) 56 data bytes 64 bytes from ::1: icmp_seq=1 ttl=64 time=0.078 ms --- ::1 ping statistics --- 1 packets transmitted, 1 received, 0% packet loss, time 0ms rtt min/avg/max/mdev = 0.078/0.078/0.078/0.000 ms 0.000 probe_libc:inet_pton:(7fa157696350)) __GI___inet_pton (/usr/lib64/libc-2.26.so) getaddrinfo (/usr/lib64/libc-2.26.so) [0xffffa9ba39c74f40] (/usr/bin/ping) # Acked-by: Namhyung Kim <namhyung@kernel.org> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Hendrick Brueckner <brueckner@linux.vnet.ibm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Thomas Richter <tmricht@linux.vnet.ibm.com> Cc: Wang Nan <wangnan0@huawei.com> Link: https://lkml.kernel.org/r/20180116182650.GE16107@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-01-15 19:48:46 +00:00
(sample_type & PERF_SAMPLE_STACK_USER)) {
perf c2c report: Allow to report callchains Add --call-graph option to properly setup callchain code. Adding default settings to display callchains whenever they are stored in the perf.data. Committer Notes: Testing it: [root@jouet ~]# perf c2c record -a -g sleep 5 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.331 MB perf.data (4263 samples) ] [root@jouet ~]# perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|CALLCHAIN|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|CALLCHAIN|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 [root@jouet ~]# perf c2c report --stats ================================================= Trace Event Information ================================================= Total records : 4263 Locked Load/Store Operations : 220 Load Operations : 2130 Loads - uncacheable : 1 Loads - IO : 7 Loads - Miss : 86 Loads - no mapping : 5 Load Fill Buffer Hit : 609 Load L1D hit : 612 ================================================= Trace Event Information ================================================= Total records : 4263 Locked Load/Store Operations : 220 Load Operations : 2130 Loads - uncacheable : 1 Loads - IO : 7 Loads - Miss : 86 Loads - no mapping : 5 Load Fill Buffer Hit : 609 Load L1D hit : 612 Load L2D hit : 27 Load LLC hit : 607 Load Local HITM : 15 Load Remote HITM : 0 Load Remote HIT : 0 Load Local DRAM : 176 Load Remote DRAM : 0 Load MESI State Exclusive : 176 Load MESI State Shared : 0 Load LLC Misses : 176 LLC Misses to Local DRAM : 100.0% LLC Misses to Remote DRAM : 0.0% LLC Misses to Remote cache (HIT) : 0.0% LLC Misses to Remote cache (HITM) : 0.0% Store Operations : 2133 Store - uncacheable : 0 Store - no mapping : 1 Store L1D Hit : 1967 Store L1D Miss : 165 No Page Map Rejects : 145 Unable to parse data source : 0 ================================================= Global Shared Cache Line Event Information ================================================= Total Shared Cache Lines : 15 Load HITs on shared lines : 26 Fill Buffer Hits on shared lines : 7 L1D hits on shared lines : 3 L2D hits on shared lines : 0 LLC hits on shared lines : 16 Locked Access on shared lines : 2 Store HITs on shared lines : 8 Store L1D hits on shared lines : 7 Total Merged records : 23 ================================================= c2c details ================================================= Events : cpu/mem-loads,ldlat=30/P : cpu/mem-stores/P [root@jouet ~]# [root@jouet ~]# perf c2c report Shared Data Cache Line Table (2378 entries) Total --- LLC Load Hitm -- -- Store Reference - - Load Dram - LLC Total - Core Load Hit - Cacheline records %hitm Total Lcl Rmt Total L1Hit L1Miss Lcl Rmt Ld Miss Loads FB L1 L2 - 0xffff880024380c00 10 0.00% 0 0 0 6 6 0 0 0 0 4 1 3 0 - 0.13% _raw_spin_lock_irqsave - 0.07% ep_poll sys_epoll_wait do_syscall_64 return_from_SYSCALL_64 + 0x103573 - 0.05% ep_poll_callback __wake_up_common - __wake_up_sync_key - 0.02% pipe_read __vfs_read vfs_read sys_read do_syscall_64 return_from_SYSCALL_64 0xfdad + 0.02% sock_def_readable + 0.02% ep_scan_ready_list.constprop.12 + 0.00% mutex_lock + 0.00% __wake_up_common + 0xffff880024380c40 1 0.00% 0 0 0 1 1 0 0 0 0 0 0 0 0 + 0xffff880024380c80 1 0.00% 0 0 0 0 0 0 0 0 0 1 0 0 0 - 0xffff8800243e9f00 1 0.00% 0 0 0 1 1 0 0 0 0 0 0 0 0 enqueue_entity enqueue_task_fair activate_task ttwu_do_activate try_to_wake_up wake_up_process hrtimer_wakeup __hrtimer_run_queues hrtimer_interrupt local_apic_timer_interrupt smp_apic_timer_interrupt apic_timer_interrupt cpuidle_enter call_cpuidle help ------------- And when presing 'd' to see the cacheline details: Cacheline 0xffff880024380c00 ----- HITM ----- -- Store Refs -- --------- cycles ----- cpu Rmt Lcl L1 Hit L1 Miss Off Pid Tid rmt hitm lcl hitm load cnt Symbol - 0.00% 0.00% 100.00% 0.00% 0x0 1473 1474:Chrome_ChildIOT 0 0 41 2 [k] _raw_spin_lock_irqsave [kernel] - _raw_spin_lock_irqsave - 51.52% ep_poll sys_epoll_wait do_syscall_64 return_from_SYSCALL_64 - 0x103573 47.19% 0 4.33% 0xc30bd - 35.93% ep_poll_callback __wake_up_common - __wake_up_sync_key - 18.20% pipe_read __vfs_read vfs_read sys_read do_syscall_64 return_from_SYSCALL_64 0xfdad - 17.73% sock_def_readable unix_stream_sendmsg sock_sendmsg ___sys_sendmsg __sys_sendmsg sys_sendmsg do_syscall_64 return_from_SYSCALL_64 __GI___libc_sendmsg 0x12c036af1fc0 0x16a4050 0x894928ec83485354 + 12.45% ep_scan_ready_list.constprop.12 + 0.00% 0.00% 0.00% 0.00% 0x8 1473 1474:Chrome_ChildIOT 0 0 102 1 [k] mutex_lock [kernel] + 0.00% 0.00% 0.00% 0.00% 0x38 1473 1473:chrome 0 0 88 1 [k] __wake_up_common [kernel] help Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-inykbom2f19difvsu1e18avr@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-11 16:23:48 +00:00
mode = CALLCHAIN_DWARF;
perf unwind: Do not look just at the global callchain_param.record_mode When setting up DWARF callchains on specific events, without using 'record' or 'trace' --call-graph, but instead doing it like: perf trace -e cycles/call-graph=dwarf/ The unwind__prepare_access() call in thread__insert_map() when we process PERF_RECORD_MMAP(2) metadata events were not being performed, precluding us from using per-event DWARF callchains, handling them just when we asked for all events to be DWARF, using "--call-graph dwarf". We do it in the PERF_RECORD_MMAP because we have to look at one of the executable maps to figure out the executable type (64-bit, 32-bit) of the DSO laid out in that mmap. Also to look at the architecture where the perf.data file was recorded. All this probably should be deferred to when we process a sample for some thread that has callchains, so that we do this processing only for the threads with samples, not for all of them. For now, fix using DWARF on specific events. Before: # perf trace --no-syscalls -e probe_libc:inet_pton/call-graph=dwarf/ ping -6 -c 1 ::1 PING ::1(::1) 56 data bytes 64 bytes from ::1: icmp_seq=1 ttl=64 time=0.048 ms --- ::1 ping statistics --- 1 packets transmitted, 1 received, 0% packet loss, time 0ms rtt min/avg/max/mdev = 0.048/0.048/0.048/0.000 ms 0.000 probe_libc:inet_pton:(7fe9597bb350)) Problem processing probe_libc:inet_pton callchain, skipping... # After: # perf trace --no-syscalls -e probe_libc:inet_pton/call-graph=dwarf/ ping -6 -c 1 ::1 PING ::1(::1) 56 data bytes 64 bytes from ::1: icmp_seq=1 ttl=64 time=0.060 ms --- ::1 ping statistics --- 1 packets transmitted, 1 received, 0% packet loss, time 0ms rtt min/avg/max/mdev = 0.060/0.060/0.060/0.000 ms 0.000 probe_libc:inet_pton:(7fd4aa930350)) __inet_pton (inlined) gaih_inet.constprop.7 (/usr/lib64/libc-2.26.so) __GI_getaddrinfo (inlined) [0xffffaa804e51af3f] (/usr/bin/ping) __libc_start_main (/usr/lib64/libc-2.26.so) [0xffffaa804e51b379] (/usr/bin/ping) # # perf trace --call-graph=dwarf --no-syscalls -e probe_libc:inet_pton/call-graph=dwarf/ ping -6 -c 1 ::1 PING ::1(::1) 56 data bytes 64 bytes from ::1: icmp_seq=1 ttl=64 time=0.057 ms --- ::1 ping statistics --- 1 packets transmitted, 1 received, 0% packet loss, time 0ms rtt min/avg/max/mdev = 0.057/0.057/0.057/0.000 ms 0.000 probe_libc:inet_pton:(7f9363b9e350)) __inet_pton (inlined) gaih_inet.constprop.7 (/usr/lib64/libc-2.26.so) __GI_getaddrinfo (inlined) [0xffffa9e8a14e0f3f] (/usr/bin/ping) __libc_start_main (/usr/lib64/libc-2.26.so) [0xffffa9e8a14e1379] (/usr/bin/ping) # # perf trace --call-graph=fp --no-syscalls -e probe_libc:inet_pton/call-graph=dwarf/ ping -6 -c 1 ::1 PING ::1(::1) 56 data bytes 64 bytes from ::1: icmp_seq=1 ttl=64 time=0.077 ms --- ::1 ping statistics --- 1 packets transmitted, 1 received, 0% packet loss, time 0ms rtt min/avg/max/mdev = 0.077/0.077/0.077/0.000 ms 0.000 probe_libc:inet_pton:(7f4947e1c350)) __inet_pton (inlined) gaih_inet.constprop.7 (/usr/lib64/libc-2.26.so) __GI_getaddrinfo (inlined) [0xffffaa716d88ef3f] (/usr/bin/ping) __libc_start_main (/usr/lib64/libc-2.26.so) [0xffffaa716d88f379] (/usr/bin/ping) # # perf trace --no-syscalls -e probe_libc:inet_pton/call-graph=fp/ ping -6 -c 1 ::1 PING ::1(::1) 56 data bytes 64 bytes from ::1: icmp_seq=1 ttl=64 time=0.078 ms --- ::1 ping statistics --- 1 packets transmitted, 1 received, 0% packet loss, time 0ms rtt min/avg/max/mdev = 0.078/0.078/0.078/0.000 ms 0.000 probe_libc:inet_pton:(7fa157696350)) __GI___inet_pton (/usr/lib64/libc-2.26.so) getaddrinfo (/usr/lib64/libc-2.26.so) [0xffffa9ba39c74f40] (/usr/bin/ping) # Acked-by: Namhyung Kim <namhyung@kernel.org> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Hendrick Brueckner <brueckner@linux.vnet.ibm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Thomas Richter <tmricht@linux.vnet.ibm.com> Cc: Wang Nan <wangnan0@huawei.com> Link: https://lkml.kernel.org/r/20180116182650.GE16107@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-01-15 19:48:46 +00:00
dwarf_callchain_users = true;
} else if (sample_type & PERF_SAMPLE_BRANCH_STACK)
perf c2c report: Allow to report callchains Add --call-graph option to properly setup callchain code. Adding default settings to display callchains whenever they are stored in the perf.data. Committer Notes: Testing it: [root@jouet ~]# perf c2c record -a -g sleep 5 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.331 MB perf.data (4263 samples) ] [root@jouet ~]# perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|CALLCHAIN|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|CALLCHAIN|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 [root@jouet ~]# perf c2c report --stats ================================================= Trace Event Information ================================================= Total records : 4263 Locked Load/Store Operations : 220 Load Operations : 2130 Loads - uncacheable : 1 Loads - IO : 7 Loads - Miss : 86 Loads - no mapping : 5 Load Fill Buffer Hit : 609 Load L1D hit : 612 ================================================= Trace Event Information ================================================= Total records : 4263 Locked Load/Store Operations : 220 Load Operations : 2130 Loads - uncacheable : 1 Loads - IO : 7 Loads - Miss : 86 Loads - no mapping : 5 Load Fill Buffer Hit : 609 Load L1D hit : 612 Load L2D hit : 27 Load LLC hit : 607 Load Local HITM : 15 Load Remote HITM : 0 Load Remote HIT : 0 Load Local DRAM : 176 Load Remote DRAM : 0 Load MESI State Exclusive : 176 Load MESI State Shared : 0 Load LLC Misses : 176 LLC Misses to Local DRAM : 100.0% LLC Misses to Remote DRAM : 0.0% LLC Misses to Remote cache (HIT) : 0.0% LLC Misses to Remote cache (HITM) : 0.0% Store Operations : 2133 Store - uncacheable : 0 Store - no mapping : 1 Store L1D Hit : 1967 Store L1D Miss : 165 No Page Map Rejects : 145 Unable to parse data source : 0 ================================================= Global Shared Cache Line Event Information ================================================= Total Shared Cache Lines : 15 Load HITs on shared lines : 26 Fill Buffer Hits on shared lines : 7 L1D hits on shared lines : 3 L2D hits on shared lines : 0 LLC hits on shared lines : 16 Locked Access on shared lines : 2 Store HITs on shared lines : 8 Store L1D hits on shared lines : 7 Total Merged records : 23 ================================================= c2c details ================================================= Events : cpu/mem-loads,ldlat=30/P : cpu/mem-stores/P [root@jouet ~]# [root@jouet ~]# perf c2c report Shared Data Cache Line Table (2378 entries) Total --- LLC Load Hitm -- -- Store Reference - - Load Dram - LLC Total - Core Load Hit - Cacheline records %hitm Total Lcl Rmt Total L1Hit L1Miss Lcl Rmt Ld Miss Loads FB L1 L2 - 0xffff880024380c00 10 0.00% 0 0 0 6 6 0 0 0 0 4 1 3 0 - 0.13% _raw_spin_lock_irqsave - 0.07% ep_poll sys_epoll_wait do_syscall_64 return_from_SYSCALL_64 + 0x103573 - 0.05% ep_poll_callback __wake_up_common - __wake_up_sync_key - 0.02% pipe_read __vfs_read vfs_read sys_read do_syscall_64 return_from_SYSCALL_64 0xfdad + 0.02% sock_def_readable + 0.02% ep_scan_ready_list.constprop.12 + 0.00% mutex_lock + 0.00% __wake_up_common + 0xffff880024380c40 1 0.00% 0 0 0 1 1 0 0 0 0 0 0 0 0 + 0xffff880024380c80 1 0.00% 0 0 0 0 0 0 0 0 0 1 0 0 0 - 0xffff8800243e9f00 1 0.00% 0 0 0 1 1 0 0 0 0 0 0 0 0 enqueue_entity enqueue_task_fair activate_task ttwu_do_activate try_to_wake_up wake_up_process hrtimer_wakeup __hrtimer_run_queues hrtimer_interrupt local_apic_timer_interrupt smp_apic_timer_interrupt apic_timer_interrupt cpuidle_enter call_cpuidle help ------------- And when presing 'd' to see the cacheline details: Cacheline 0xffff880024380c00 ----- HITM ----- -- Store Refs -- --------- cycles ----- cpu Rmt Lcl L1 Hit L1 Miss Off Pid Tid rmt hitm lcl hitm load cnt Symbol - 0.00% 0.00% 100.00% 0.00% 0x0 1473 1474:Chrome_ChildIOT 0 0 41 2 [k] _raw_spin_lock_irqsave [kernel] - _raw_spin_lock_irqsave - 51.52% ep_poll sys_epoll_wait do_syscall_64 return_from_SYSCALL_64 - 0x103573 47.19% 0 4.33% 0xc30bd - 35.93% ep_poll_callback __wake_up_common - __wake_up_sync_key - 18.20% pipe_read __vfs_read vfs_read sys_read do_syscall_64 return_from_SYSCALL_64 0xfdad - 17.73% sock_def_readable unix_stream_sendmsg sock_sendmsg ___sys_sendmsg __sys_sendmsg sys_sendmsg do_syscall_64 return_from_SYSCALL_64 __GI___libc_sendmsg 0x12c036af1fc0 0x16a4050 0x894928ec83485354 + 12.45% ep_scan_ready_list.constprop.12 + 0.00% 0.00% 0.00% 0.00% 0x8 1473 1474:Chrome_ChildIOT 0 0 102 1 [k] mutex_lock [kernel] + 0.00% 0.00% 0.00% 0.00% 0x38 1473 1473:chrome 0 0 88 1 [k] __wake_up_common [kernel] help Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-inykbom2f19difvsu1e18avr@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-11 16:23:48 +00:00
mode = CALLCHAIN_LBR;
else if (sample_type & PERF_SAMPLE_CALLCHAIN)
mode = CALLCHAIN_FP;
if (!callchain_param.enabled &&
callchain_param.mode != CHAIN_NONE &&
mode != CALLCHAIN_NONE) {
symbol_conf.use_callchain = true;
if (callchain_register_param(&callchain_param) < 0) {
ui__error("Can't register callchain params.\n");
return -EINVAL;
}
}
if (c2c.stitch_lbr && (mode != CALLCHAIN_LBR)) {
ui__warning("Can't find LBR callchain. Switch off --stitch-lbr.\n"
"Please apply --call-graph lbr when recording.\n");
c2c.stitch_lbr = false;
}
perf c2c report: Allow to report callchains Add --call-graph option to properly setup callchain code. Adding default settings to display callchains whenever they are stored in the perf.data. Committer Notes: Testing it: [root@jouet ~]# perf c2c record -a -g sleep 5 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.331 MB perf.data (4263 samples) ] [root@jouet ~]# perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|CALLCHAIN|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|CALLCHAIN|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 [root@jouet ~]# perf c2c report --stats ================================================= Trace Event Information ================================================= Total records : 4263 Locked Load/Store Operations : 220 Load Operations : 2130 Loads - uncacheable : 1 Loads - IO : 7 Loads - Miss : 86 Loads - no mapping : 5 Load Fill Buffer Hit : 609 Load L1D hit : 612 ================================================= Trace Event Information ================================================= Total records : 4263 Locked Load/Store Operations : 220 Load Operations : 2130 Loads - uncacheable : 1 Loads - IO : 7 Loads - Miss : 86 Loads - no mapping : 5 Load Fill Buffer Hit : 609 Load L1D hit : 612 Load L2D hit : 27 Load LLC hit : 607 Load Local HITM : 15 Load Remote HITM : 0 Load Remote HIT : 0 Load Local DRAM : 176 Load Remote DRAM : 0 Load MESI State Exclusive : 176 Load MESI State Shared : 0 Load LLC Misses : 176 LLC Misses to Local DRAM : 100.0% LLC Misses to Remote DRAM : 0.0% LLC Misses to Remote cache (HIT) : 0.0% LLC Misses to Remote cache (HITM) : 0.0% Store Operations : 2133 Store - uncacheable : 0 Store - no mapping : 1 Store L1D Hit : 1967 Store L1D Miss : 165 No Page Map Rejects : 145 Unable to parse data source : 0 ================================================= Global Shared Cache Line Event Information ================================================= Total Shared Cache Lines : 15 Load HITs on shared lines : 26 Fill Buffer Hits on shared lines : 7 L1D hits on shared lines : 3 L2D hits on shared lines : 0 LLC hits on shared lines : 16 Locked Access on shared lines : 2 Store HITs on shared lines : 8 Store L1D hits on shared lines : 7 Total Merged records : 23 ================================================= c2c details ================================================= Events : cpu/mem-loads,ldlat=30/P : cpu/mem-stores/P [root@jouet ~]# [root@jouet ~]# perf c2c report Shared Data Cache Line Table (2378 entries) Total --- LLC Load Hitm -- -- Store Reference - - Load Dram - LLC Total - Core Load Hit - Cacheline records %hitm Total Lcl Rmt Total L1Hit L1Miss Lcl Rmt Ld Miss Loads FB L1 L2 - 0xffff880024380c00 10 0.00% 0 0 0 6 6 0 0 0 0 4 1 3 0 - 0.13% _raw_spin_lock_irqsave - 0.07% ep_poll sys_epoll_wait do_syscall_64 return_from_SYSCALL_64 + 0x103573 - 0.05% ep_poll_callback __wake_up_common - __wake_up_sync_key - 0.02% pipe_read __vfs_read vfs_read sys_read do_syscall_64 return_from_SYSCALL_64 0xfdad + 0.02% sock_def_readable + 0.02% ep_scan_ready_list.constprop.12 + 0.00% mutex_lock + 0.00% __wake_up_common + 0xffff880024380c40 1 0.00% 0 0 0 1 1 0 0 0 0 0 0 0 0 + 0xffff880024380c80 1 0.00% 0 0 0 0 0 0 0 0 0 1 0 0 0 - 0xffff8800243e9f00 1 0.00% 0 0 0 1 1 0 0 0 0 0 0 0 0 enqueue_entity enqueue_task_fair activate_task ttwu_do_activate try_to_wake_up wake_up_process hrtimer_wakeup __hrtimer_run_queues hrtimer_interrupt local_apic_timer_interrupt smp_apic_timer_interrupt apic_timer_interrupt cpuidle_enter call_cpuidle help ------------- And when presing 'd' to see the cacheline details: Cacheline 0xffff880024380c00 ----- HITM ----- -- Store Refs -- --------- cycles ----- cpu Rmt Lcl L1 Hit L1 Miss Off Pid Tid rmt hitm lcl hitm load cnt Symbol - 0.00% 0.00% 100.00% 0.00% 0x0 1473 1474:Chrome_ChildIOT 0 0 41 2 [k] _raw_spin_lock_irqsave [kernel] - _raw_spin_lock_irqsave - 51.52% ep_poll sys_epoll_wait do_syscall_64 return_from_SYSCALL_64 - 0x103573 47.19% 0 4.33% 0xc30bd - 35.93% ep_poll_callback __wake_up_common - __wake_up_sync_key - 18.20% pipe_read __vfs_read vfs_read sys_read do_syscall_64 return_from_SYSCALL_64 0xfdad - 17.73% sock_def_readable unix_stream_sendmsg sock_sendmsg ___sys_sendmsg __sys_sendmsg sys_sendmsg do_syscall_64 return_from_SYSCALL_64 __GI___libc_sendmsg 0x12c036af1fc0 0x16a4050 0x894928ec83485354 + 12.45% ep_scan_ready_list.constprop.12 + 0.00% 0.00% 0.00% 0.00% 0x8 1473 1474:Chrome_ChildIOT 0 0 102 1 [k] mutex_lock [kernel] + 0.00% 0.00% 0.00% 0.00% 0x38 1473 1473:chrome 0 0 88 1 [k] __wake_up_common [kernel] help Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-inykbom2f19difvsu1e18avr@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-11 16:23:48 +00:00
callchain_param.record_mode = mode;
callchain_param.min_percent = 0;
return 0;
}
static int setup_display(const char *str)
{
perf c2c: Use 'peer' as default display for Arm64 Since Arm64 arch doesn't support HITMs flags, this patch changes to use 'peer' as default display if user doesn't specify any type; for other arches, it still uses 'tot' as default display type if user doesn't specify it. This patch changes to call perf_session__new() in an earlier place, so session environment can be initialized ahead and arch info can be used for setting display type. Suggested-by: Ali Saidi <alisaidi@amazon.com> Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-15-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:50 +00:00
const char *display = str;
if (!strcmp(display, "tot"))
perf c2c: Use explicit names for display macros Perf c2c tool has an assumption that it heavily depends on HITM snoop type to detect cache false sharing, unfortunately, HITM is not supported on some architectures. Essentially, perf c2c tool wants to find some very costly snooping operations for false cache sharing, this means it's not necessarily to stick using HITM tags and we can explore other snooping types (e.g. SNOOPX_PEER). For this reason, this patch renames HITM related display macros with suffix '_HITM', so it can be distinct if later add more display types for on other snooping type. Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-10-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:45 +00:00
c2c.display = DISPLAY_TOT_HITM;
else if (!strcmp(display, "rmt"))
perf c2c: Use explicit names for display macros Perf c2c tool has an assumption that it heavily depends on HITM snoop type to detect cache false sharing, unfortunately, HITM is not supported on some architectures. Essentially, perf c2c tool wants to find some very costly snooping operations for false cache sharing, this means it's not necessarily to stick using HITM tags and we can explore other snooping types (e.g. SNOOPX_PEER). For this reason, this patch renames HITM related display macros with suffix '_HITM', so it can be distinct if later add more display types for on other snooping type. Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-10-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:45 +00:00
c2c.display = DISPLAY_RMT_HITM;
else if (!strcmp(display, "lcl"))
perf c2c: Use explicit names for display macros Perf c2c tool has an assumption that it heavily depends on HITM snoop type to detect cache false sharing, unfortunately, HITM is not supported on some architectures. Essentially, perf c2c tool wants to find some very costly snooping operations for false cache sharing, this means it's not necessarily to stick using HITM tags and we can explore other snooping types (e.g. SNOOPX_PEER). For this reason, this patch renames HITM related display macros with suffix '_HITM', so it can be distinct if later add more display types for on other snooping type. Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-10-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:45 +00:00
c2c.display = DISPLAY_LCL_HITM;
perf c2c: Sort on peer snooping for load operations This patch adds a new option 'peer' so can sort on the cache hit for peer snooping. For displaying with option 'peer', the "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" both sort with the metrics "tot_peer". As result, we can get the 'peer' display: # perf c2c report -d peer --coalesce tid,pid,iaddr,dso -N --stdio ================================================= Shared Data Cache Line Table ================================================= # # ----------- Cacheline ---------- Peer ------- Load Peer ------- Total Total Total --------- Stores -------- ----- Core Load Hit ----- - LLC Load Hit -- - RMT Load Hit -- --- Load Dram ---- # Index Address Node PA cnt Snoop Total Local Remote records Loads Stores L1Hit L1Miss N/A FB L1 L2 LclHit LclHitm RmtHit RmtHitm Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ....... ........ ....... ........ ........ # 0 0xaaaac17d6000 N/A 0 100.00% 99 99 0 18851 18851 0 0 0 0 0 18752 0 99 0 0 0 0 0 ================================================= Shared Cache Line Distribution Pareto ================================================= # # -- Peer Snoop -- ------- Store Refs ------ --------- Data address --------- ---------- cycles ---------- Total cpu Shared # Num Rmt Lcl L1 Hit L1 Miss N/A Offset Node PA cnt Pid Tid Code address rmt peer lcl peer load records cnt Symbol Object Source:Line Node{cpus %peers %stores} # ..... ....... ....... ....... ....... ....... .................. .... ...... ....... ................. .................. ........ ........ ........ ....... ........ ...................... ................ ............... .... # ---------------------------------------------------------------------- 0 0 99 0 0 0 0xaaaac17d6000 ---------------------------------------------------------------------- 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3603:memstress 0xaaaac17c25ac 0 376 41 9314 2 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 2 100.0% n/a} 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3606:memstress 0xaaaac17c25ac 0 375 44 9155 1 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 1 100.0% n/a} 0.00% 48.48% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3606:memstress 0xaaaac17c3e88 0 180 170 65 1 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 1 100.0% n/a} 0.00% 45.45% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3603:memstress 0xaaaac17c3e88 0 180 175 70 2 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 2 100.0% n/a} Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-14-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:49 +00:00
else if (!strcmp(display, "peer"))
c2c.display = DISPLAY_SNP_PEER;
else {
pr_err("failed: unknown display type: %s\n", str);
return -1;
}
return 0;
}
#define for_each_token(__tok, __buf, __sep, __tmp) \
for (__tok = strtok_r(__buf, __sep, &__tmp); __tok; \
__tok = strtok_r(NULL, __sep, &__tmp))
static int build_cl_output(char *cl_sort, bool no_source)
{
char *tok, *tmp, *buf = strdup(cl_sort);
bool add_pid = false;
bool add_tid = false;
bool add_iaddr = false;
bool add_sym = false;
bool add_dso = false;
bool add_src = false;
int ret = 0;
if (!buf)
return -ENOMEM;
for_each_token(tok, buf, ",", tmp) {
if (!strcmp(tok, "tid")) {
add_tid = true;
} else if (!strcmp(tok, "pid")) {
add_pid = true;
} else if (!strcmp(tok, "iaddr")) {
add_iaddr = true;
add_sym = true;
add_dso = true;
add_src = no_source ? false : true;
} else if (!strcmp(tok, "dso")) {
add_dso = true;
} else if (strcmp(tok, "offset")) {
pr_err("unrecognized sort token: %s\n", tok);
ret = -EINVAL;
goto err;
}
}
if (asprintf(&c2c.cl_output,
perf c2c: Sort on peer snooping for load operations This patch adds a new option 'peer' so can sort on the cache hit for peer snooping. For displaying with option 'peer', the "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" both sort with the metrics "tot_peer". As result, we can get the 'peer' display: # perf c2c report -d peer --coalesce tid,pid,iaddr,dso -N --stdio ================================================= Shared Data Cache Line Table ================================================= # # ----------- Cacheline ---------- Peer ------- Load Peer ------- Total Total Total --------- Stores -------- ----- Core Load Hit ----- - LLC Load Hit -- - RMT Load Hit -- --- Load Dram ---- # Index Address Node PA cnt Snoop Total Local Remote records Loads Stores L1Hit L1Miss N/A FB L1 L2 LclHit LclHitm RmtHit RmtHitm Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ....... ........ ....... ........ ........ # 0 0xaaaac17d6000 N/A 0 100.00% 99 99 0 18851 18851 0 0 0 0 0 18752 0 99 0 0 0 0 0 ================================================= Shared Cache Line Distribution Pareto ================================================= # # -- Peer Snoop -- ------- Store Refs ------ --------- Data address --------- ---------- cycles ---------- Total cpu Shared # Num Rmt Lcl L1 Hit L1 Miss N/A Offset Node PA cnt Pid Tid Code address rmt peer lcl peer load records cnt Symbol Object Source:Line Node{cpus %peers %stores} # ..... ....... ....... ....... ....... ....... .................. .... ...... ....... ................. .................. ........ ........ ........ ....... ........ ...................... ................ ............... .... # ---------------------------------------------------------------------- 0 0 99 0 0 0 0xaaaac17d6000 ---------------------------------------------------------------------- 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3603:memstress 0xaaaac17c25ac 0 376 41 9314 2 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 2 100.0% n/a} 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3606:memstress 0xaaaac17c25ac 0 375 44 9155 1 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 1 100.0% n/a} 0.00% 48.48% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3606:memstress 0xaaaac17c3e88 0 180 170 65 1 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 1 100.0% n/a} 0.00% 45.45% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3603:memstress 0xaaaac17c3e88 0 180 175 70 2 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 2 100.0% n/a} Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-14-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:49 +00:00
"%s%s%s%s%s%s%s%s%s%s%s%s",
perf c2c report: Add cacheline index entry It's convenient to have an index for each cacheline to help discussions about results over the phone. Add new 'Index' and 'Num' fields in main and single cacheline tables. $ perf c2c report ================================================= Shared Data Cache Line Table ================================================= # # Total Lcl ----- LLC Load Hitm ----- # Index Cacheline records Hitm Total Lcl Rmt ... # ..... .................. ....... ....... ....... ....... ....... # 0 0xffff880036233b40 1 11.11% 1 1 0 1 0xffff88009ccb2900 1 11.11% 1 1 0 2 0xffff8800b5b3bc40 7 11.11% 1 1 0 ... ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Pid ... # ..... ....... ....... ....... ....... .................. ....... # ------------------------------------------------------------- 0 0 1 0 0 0xffff880036233b40 ------------------------------------------------------------- 0.00% 100.00% 0.00% 0.00% 0x30 0 ------------------------------------------------------------- 1 0 1 0 0 0xffff88009ccb2900 ------------------------------------------------------------- 0.00% 100.00% 0.00% 0.00% 0x28 549 ... Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-4dhfagaz57tvrfjbg8nd2h4u@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-07-06 13:40:09 +00:00
c2c.use_stdio ? "cl_num_empty," : "",
perf c2c: Sort on peer snooping for load operations This patch adds a new option 'peer' so can sort on the cache hit for peer snooping. For displaying with option 'peer', the "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" both sort with the metrics "tot_peer". As result, we can get the 'peer' display: # perf c2c report -d peer --coalesce tid,pid,iaddr,dso -N --stdio ================================================= Shared Data Cache Line Table ================================================= # # ----------- Cacheline ---------- Peer ------- Load Peer ------- Total Total Total --------- Stores -------- ----- Core Load Hit ----- - LLC Load Hit -- - RMT Load Hit -- --- Load Dram ---- # Index Address Node PA cnt Snoop Total Local Remote records Loads Stores L1Hit L1Miss N/A FB L1 L2 LclHit LclHitm RmtHit RmtHitm Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ....... ........ ....... ........ ........ # 0 0xaaaac17d6000 N/A 0 100.00% 99 99 0 18851 18851 0 0 0 0 0 18752 0 99 0 0 0 0 0 ================================================= Shared Cache Line Distribution Pareto ================================================= # # -- Peer Snoop -- ------- Store Refs ------ --------- Data address --------- ---------- cycles ---------- Total cpu Shared # Num Rmt Lcl L1 Hit L1 Miss N/A Offset Node PA cnt Pid Tid Code address rmt peer lcl peer load records cnt Symbol Object Source:Line Node{cpus %peers %stores} # ..... ....... ....... ....... ....... ....... .................. .... ...... ....... ................. .................. ........ ........ ........ ....... ........ ...................... ................ ............... .... # ---------------------------------------------------------------------- 0 0 99 0 0 0 0xaaaac17d6000 ---------------------------------------------------------------------- 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3603:memstress 0xaaaac17c25ac 0 376 41 9314 2 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 2 100.0% n/a} 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3606:memstress 0xaaaac17c25ac 0 375 44 9155 1 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 1 100.0% n/a} 0.00% 48.48% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3606:memstress 0xaaaac17c3e88 0 180 170 65 1 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 1 100.0% n/a} 0.00% 45.45% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3603:memstress 0xaaaac17c3e88 0 180 175 70 2 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 2 100.0% n/a} Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-14-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:49 +00:00
c2c.display == DISPLAY_SNP_PEER ? "percent_rmt_peer,"
"percent_lcl_peer," :
"percent_rmt_hitm,"
"percent_lcl_hitm,",
"percent_stores_l1hit,"
"percent_stores_l1miss,"
"percent_stores_na,"
perf c2c report: Add cacheline address count column Adding the 'PA cnt' column grouped under data cacheline address. It shows how many times the physical addresses changed for the hist entry. It does not show the number of different physical addresses for entry, because we don't store those. We only track the number of times we got different address than we currently hold, which is not expensive and gives similar info. $ perf c2c report --stdio # ----------- Cacheline ---------- Total Tot ----- LLC Load Hitm ----- # Index Address Node PA cnt records Hitm Total Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... # 0 0xffff9ad56dca0a80 0 9 10 7.69% 2 2 0 1 0xffff9ad56dce0a80 0 9 9 7.69% 2 2 0 2 0xffff9ad37659ad80 0 1 2 3.85% 1 1 0 ... # ----- HITM ----- -- Store Refs -- --------- Data address --------- # Num Rmt Lcl L1 Hit L1 Miss Offset Node PA cnt Pid # ..... ....... ....... ....... ....... .................. .... ...... ....... # ------------------------------------------------------------- 0 0 2 3 0 0xffff9ad56dca0a80 ------------------------------------------------------------- 0.00% 0.00% 33.33% 0.00% 0x0 0 1 2510 0.00% 0.00% 33.33% 0.00% 0x4 0 1 2476 0.00% 0.00% 33.33% 0.00% 0x20 0 1 0 0.00% 100.00% 0.00% 0.00% 0x38 0 1 0 Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-10-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:42 +00:00
"offset,offset_node,dcacheline_count,",
add_pid ? "pid," : "",
add_tid ? "tid," : "",
add_iaddr ? "iaddr," : "",
perf c2c: Sort on peer snooping for load operations This patch adds a new option 'peer' so can sort on the cache hit for peer snooping. For displaying with option 'peer', the "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" both sort with the metrics "tot_peer". As result, we can get the 'peer' display: # perf c2c report -d peer --coalesce tid,pid,iaddr,dso -N --stdio ================================================= Shared Data Cache Line Table ================================================= # # ----------- Cacheline ---------- Peer ------- Load Peer ------- Total Total Total --------- Stores -------- ----- Core Load Hit ----- - LLC Load Hit -- - RMT Load Hit -- --- Load Dram ---- # Index Address Node PA cnt Snoop Total Local Remote records Loads Stores L1Hit L1Miss N/A FB L1 L2 LclHit LclHitm RmtHit RmtHitm Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ....... ........ ....... ........ ........ # 0 0xaaaac17d6000 N/A 0 100.00% 99 99 0 18851 18851 0 0 0 0 0 18752 0 99 0 0 0 0 0 ================================================= Shared Cache Line Distribution Pareto ================================================= # # -- Peer Snoop -- ------- Store Refs ------ --------- Data address --------- ---------- cycles ---------- Total cpu Shared # Num Rmt Lcl L1 Hit L1 Miss N/A Offset Node PA cnt Pid Tid Code address rmt peer lcl peer load records cnt Symbol Object Source:Line Node{cpus %peers %stores} # ..... ....... ....... ....... ....... ....... .................. .... ...... ....... ................. .................. ........ ........ ........ ....... ........ ...................... ................ ............... .... # ---------------------------------------------------------------------- 0 0 99 0 0 0 0xaaaac17d6000 ---------------------------------------------------------------------- 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3603:memstress 0xaaaac17c25ac 0 376 41 9314 2 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 2 100.0% n/a} 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3606:memstress 0xaaaac17c25ac 0 375 44 9155 1 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 1 100.0% n/a} 0.00% 48.48% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3606:memstress 0xaaaac17c3e88 0 180 170 65 1 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 1 100.0% n/a} 0.00% 45.45% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3603:memstress 0xaaaac17c3e88 0 180 175 70 2 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 2 100.0% n/a} Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-14-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:49 +00:00
c2c.display == DISPLAY_SNP_PEER ? "mean_rmt_peer,"
"mean_lcl_peer," :
"mean_rmt,"
"mean_lcl,",
"mean_load,"
"tot_recs,"
"cpucnt,",
add_sym ? "symbol," : "",
add_dso ? "dso," : "",
add_src ? "cl_srcline," : "",
"node") < 0) {
ret = -ENOMEM;
goto err;
}
c2c.show_src = add_src;
err:
free(buf);
return ret;
}
static int setup_coalesce(const char *coalesce, bool no_source)
{
const char *c = coalesce ?: coalesce_default;
perf c2c: Sort on peer snooping for load operations This patch adds a new option 'peer' so can sort on the cache hit for peer snooping. For displaying with option 'peer', the "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" both sort with the metrics "tot_peer". As result, we can get the 'peer' display: # perf c2c report -d peer --coalesce tid,pid,iaddr,dso -N --stdio ================================================= Shared Data Cache Line Table ================================================= # # ----------- Cacheline ---------- Peer ------- Load Peer ------- Total Total Total --------- Stores -------- ----- Core Load Hit ----- - LLC Load Hit -- - RMT Load Hit -- --- Load Dram ---- # Index Address Node PA cnt Snoop Total Local Remote records Loads Stores L1Hit L1Miss N/A FB L1 L2 LclHit LclHitm RmtHit RmtHitm Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ....... ........ ....... ........ ........ # 0 0xaaaac17d6000 N/A 0 100.00% 99 99 0 18851 18851 0 0 0 0 0 18752 0 99 0 0 0 0 0 ================================================= Shared Cache Line Distribution Pareto ================================================= # # -- Peer Snoop -- ------- Store Refs ------ --------- Data address --------- ---------- cycles ---------- Total cpu Shared # Num Rmt Lcl L1 Hit L1 Miss N/A Offset Node PA cnt Pid Tid Code address rmt peer lcl peer load records cnt Symbol Object Source:Line Node{cpus %peers %stores} # ..... ....... ....... ....... ....... ....... .................. .... ...... ....... ................. .................. ........ ........ ........ ....... ........ ...................... ................ ............... .... # ---------------------------------------------------------------------- 0 0 99 0 0 0 0xaaaac17d6000 ---------------------------------------------------------------------- 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3603:memstress 0xaaaac17c25ac 0 376 41 9314 2 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 2 100.0% n/a} 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3606:memstress 0xaaaac17c25ac 0 375 44 9155 1 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 1 100.0% n/a} 0.00% 48.48% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3606:memstress 0xaaaac17c3e88 0 180 170 65 1 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 1 100.0% n/a} 0.00% 45.45% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3603:memstress 0xaaaac17c3e88 0 180 175 70 2 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 2 100.0% n/a} Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-14-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:49 +00:00
const char *sort_str = NULL;
if (asprintf(&c2c.cl_sort, "offset,%s", c) < 0)
return -ENOMEM;
if (build_cl_output(c2c.cl_sort, no_source))
return -1;
perf c2c: Sort on peer snooping for load operations This patch adds a new option 'peer' so can sort on the cache hit for peer snooping. For displaying with option 'peer', the "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" both sort with the metrics "tot_peer". As result, we can get the 'peer' display: # perf c2c report -d peer --coalesce tid,pid,iaddr,dso -N --stdio ================================================= Shared Data Cache Line Table ================================================= # # ----------- Cacheline ---------- Peer ------- Load Peer ------- Total Total Total --------- Stores -------- ----- Core Load Hit ----- - LLC Load Hit -- - RMT Load Hit -- --- Load Dram ---- # Index Address Node PA cnt Snoop Total Local Remote records Loads Stores L1Hit L1Miss N/A FB L1 L2 LclHit LclHitm RmtHit RmtHitm Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ....... ........ ....... ........ ........ # 0 0xaaaac17d6000 N/A 0 100.00% 99 99 0 18851 18851 0 0 0 0 0 18752 0 99 0 0 0 0 0 ================================================= Shared Cache Line Distribution Pareto ================================================= # # -- Peer Snoop -- ------- Store Refs ------ --------- Data address --------- ---------- cycles ---------- Total cpu Shared # Num Rmt Lcl L1 Hit L1 Miss N/A Offset Node PA cnt Pid Tid Code address rmt peer lcl peer load records cnt Symbol Object Source:Line Node{cpus %peers %stores} # ..... ....... ....... ....... ....... ....... .................. .... ...... ....... ................. .................. ........ ........ ........ ....... ........ ...................... ................ ............... .... # ---------------------------------------------------------------------- 0 0 99 0 0 0 0xaaaac17d6000 ---------------------------------------------------------------------- 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3603:memstress 0xaaaac17c25ac 0 376 41 9314 2 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 2 100.0% n/a} 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3606:memstress 0xaaaac17c25ac 0 375 44 9155 1 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 1 100.0% n/a} 0.00% 48.48% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3606:memstress 0xaaaac17c3e88 0 180 170 65 1 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 1 100.0% n/a} 0.00% 45.45% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3603:memstress 0xaaaac17c3e88 0 180 175 70 2 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 2 100.0% n/a} Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-14-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:49 +00:00
if (c2c.display == DISPLAY_TOT_HITM)
sort_str = "tot_hitm";
else if (c2c.display == DISPLAY_RMT_HITM)
sort_str = "rmt_hitm,lcl_hitm";
else if (c2c.display == DISPLAY_LCL_HITM)
sort_str = "lcl_hitm,rmt_hitm";
else if (c2c.display == DISPLAY_SNP_PEER)
sort_str = "tot_peer";
if (asprintf(&c2c.cl_resort, "offset,%s", sort_str) < 0)
return -ENOMEM;
pr_debug("coalesce sort fields: %s\n", c2c.cl_sort);
pr_debug("coalesce resort fields: %s\n", c2c.cl_resort);
pr_debug("coalesce output fields: %s\n", c2c.cl_output);
return 0;
}
static int perf_c2c__report(int argc, const char **argv)
{
struct itrace_synth_opts itrace_synth_opts = {
.set = true,
.mem = true, /* Only enable memory event */
.default_no_sample = true,
};
struct perf_session *session;
struct ui_progress prog;
struct perf_data data = {
.mode = PERF_DATA_MODE_READ,
};
perf c2c report: Allow to report callchains Add --call-graph option to properly setup callchain code. Adding default settings to display callchains whenever they are stored in the perf.data. Committer Notes: Testing it: [root@jouet ~]# perf c2c record -a -g sleep 5 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.331 MB perf.data (4263 samples) ] [root@jouet ~]# perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|CALLCHAIN|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|CALLCHAIN|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 [root@jouet ~]# perf c2c report --stats ================================================= Trace Event Information ================================================= Total records : 4263 Locked Load/Store Operations : 220 Load Operations : 2130 Loads - uncacheable : 1 Loads - IO : 7 Loads - Miss : 86 Loads - no mapping : 5 Load Fill Buffer Hit : 609 Load L1D hit : 612 ================================================= Trace Event Information ================================================= Total records : 4263 Locked Load/Store Operations : 220 Load Operations : 2130 Loads - uncacheable : 1 Loads - IO : 7 Loads - Miss : 86 Loads - no mapping : 5 Load Fill Buffer Hit : 609 Load L1D hit : 612 Load L2D hit : 27 Load LLC hit : 607 Load Local HITM : 15 Load Remote HITM : 0 Load Remote HIT : 0 Load Local DRAM : 176 Load Remote DRAM : 0 Load MESI State Exclusive : 176 Load MESI State Shared : 0 Load LLC Misses : 176 LLC Misses to Local DRAM : 100.0% LLC Misses to Remote DRAM : 0.0% LLC Misses to Remote cache (HIT) : 0.0% LLC Misses to Remote cache (HITM) : 0.0% Store Operations : 2133 Store - uncacheable : 0 Store - no mapping : 1 Store L1D Hit : 1967 Store L1D Miss : 165 No Page Map Rejects : 145 Unable to parse data source : 0 ================================================= Global Shared Cache Line Event Information ================================================= Total Shared Cache Lines : 15 Load HITs on shared lines : 26 Fill Buffer Hits on shared lines : 7 L1D hits on shared lines : 3 L2D hits on shared lines : 0 LLC hits on shared lines : 16 Locked Access on shared lines : 2 Store HITs on shared lines : 8 Store L1D hits on shared lines : 7 Total Merged records : 23 ================================================= c2c details ================================================= Events : cpu/mem-loads,ldlat=30/P : cpu/mem-stores/P [root@jouet ~]# [root@jouet ~]# perf c2c report Shared Data Cache Line Table (2378 entries) Total --- LLC Load Hitm -- -- Store Reference - - Load Dram - LLC Total - Core Load Hit - Cacheline records %hitm Total Lcl Rmt Total L1Hit L1Miss Lcl Rmt Ld Miss Loads FB L1 L2 - 0xffff880024380c00 10 0.00% 0 0 0 6 6 0 0 0 0 4 1 3 0 - 0.13% _raw_spin_lock_irqsave - 0.07% ep_poll sys_epoll_wait do_syscall_64 return_from_SYSCALL_64 + 0x103573 - 0.05% ep_poll_callback __wake_up_common - __wake_up_sync_key - 0.02% pipe_read __vfs_read vfs_read sys_read do_syscall_64 return_from_SYSCALL_64 0xfdad + 0.02% sock_def_readable + 0.02% ep_scan_ready_list.constprop.12 + 0.00% mutex_lock + 0.00% __wake_up_common + 0xffff880024380c40 1 0.00% 0 0 0 1 1 0 0 0 0 0 0 0 0 + 0xffff880024380c80 1 0.00% 0 0 0 0 0 0 0 0 0 1 0 0 0 - 0xffff8800243e9f00 1 0.00% 0 0 0 1 1 0 0 0 0 0 0 0 0 enqueue_entity enqueue_task_fair activate_task ttwu_do_activate try_to_wake_up wake_up_process hrtimer_wakeup __hrtimer_run_queues hrtimer_interrupt local_apic_timer_interrupt smp_apic_timer_interrupt apic_timer_interrupt cpuidle_enter call_cpuidle help ------------- And when presing 'd' to see the cacheline details: Cacheline 0xffff880024380c00 ----- HITM ----- -- Store Refs -- --------- cycles ----- cpu Rmt Lcl L1 Hit L1 Miss Off Pid Tid rmt hitm lcl hitm load cnt Symbol - 0.00% 0.00% 100.00% 0.00% 0x0 1473 1474:Chrome_ChildIOT 0 0 41 2 [k] _raw_spin_lock_irqsave [kernel] - _raw_spin_lock_irqsave - 51.52% ep_poll sys_epoll_wait do_syscall_64 return_from_SYSCALL_64 - 0x103573 47.19% 0 4.33% 0xc30bd - 35.93% ep_poll_callback __wake_up_common - __wake_up_sync_key - 18.20% pipe_read __vfs_read vfs_read sys_read do_syscall_64 return_from_SYSCALL_64 0xfdad - 17.73% sock_def_readable unix_stream_sendmsg sock_sendmsg ___sys_sendmsg __sys_sendmsg sys_sendmsg do_syscall_64 return_from_SYSCALL_64 __GI___libc_sendmsg 0x12c036af1fc0 0x16a4050 0x894928ec83485354 + 12.45% ep_scan_ready_list.constprop.12 + 0.00% 0.00% 0.00% 0.00% 0x8 1473 1474:Chrome_ChildIOT 0 0 102 1 [k] mutex_lock [kernel] + 0.00% 0.00% 0.00% 0.00% 0x38 1473 1473:chrome 0 0 88 1 [k] __wake_up_common [kernel] help Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-inykbom2f19difvsu1e18avr@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-11 16:23:48 +00:00
char callchain_default_opt[] = CALLCHAIN_DEFAULT_OPT;
const char *display = NULL;
const char *coalesce = NULL;
bool no_source = false;
const struct option options[] = {
OPT_STRING('k', "vmlinux", &symbol_conf.vmlinux_name,
"file", "vmlinux pathname"),
OPT_STRING('i', "input", &input_name, "file",
"the input file to process"),
OPT_INCR('N', "node-info", &c2c.node_info,
"show extra node info in report (repeat for more info)"),
OPT_BOOLEAN(0, "stdio", &c2c.use_stdio, "Use the stdio interface"),
perf c2c report: Add global stats stdio output Display global stats table as part of the stdio output or when --stats option is speicified: $ perf c2c report --stats ================================================= Trace Event Information ================================================= Total records : 41237 Locked Load/Store Operations : 4075 Load Operations : 20526 Loads - uncacheable : 0 Loads - IO : 0 Loads - Miss : 552 Loads - no mapping : 31 Load Fill Buffer Hit : 7333 Load L1D hit : 6398 Load L2D hit : 144 Load LLC hit : 4889 Load Local HITM : 1185 Load Remote HITM : 838 Load Remote HIT : 52 Load Local DRAM : 183 Load Remote DRAM : 106 Load MESI State Exclusive : 289 Load MESI State Shared : 0 Load LLC Misses : 1179 LLC Misses to Local DRAM : 15.5% LLC Misses to Remote DRAM : 9.0% LLC Misses to Remote cache (HIT) : 4.4% LLC Misses to Remote cache (HITM) : 71.1% Store Operations : 20711 Store - uncacheable : 0 Store - no mapping : 1 Store L1D Hit : 20158 Store L1D Miss : 552 No Page Map Rejects : 7 Unable to parse data source : 0 Original-patch-by: Dick Fowles <rfowles@redhat.com> Original-patch-by: Don Zickus <dzickus@redhat.com> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-qkyvao3qsrnwazf0w1jvsh7z@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-02 18:01:59 +00:00
OPT_BOOLEAN(0, "stats", &c2c.stats_only,
"Display only statistic tables (implies --stdio)"),
OPT_BOOLEAN(0, "full-symbols", &c2c.symbol_full,
"Display full length of symbols"),
OPT_BOOLEAN(0, "no-source", &no_source,
"Do not display Source Line column"),
OPT_BOOLEAN(0, "show-all", &c2c.show_all,
"Show all captured HITM lines."),
perf c2c report: Allow to report callchains Add --call-graph option to properly setup callchain code. Adding default settings to display callchains whenever they are stored in the perf.data. Committer Notes: Testing it: [root@jouet ~]# perf c2c record -a -g sleep 5 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.331 MB perf.data (4263 samples) ] [root@jouet ~]# perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|CALLCHAIN|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|CALLCHAIN|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 [root@jouet ~]# perf c2c report --stats ================================================= Trace Event Information ================================================= Total records : 4263 Locked Load/Store Operations : 220 Load Operations : 2130 Loads - uncacheable : 1 Loads - IO : 7 Loads - Miss : 86 Loads - no mapping : 5 Load Fill Buffer Hit : 609 Load L1D hit : 612 ================================================= Trace Event Information ================================================= Total records : 4263 Locked Load/Store Operations : 220 Load Operations : 2130 Loads - uncacheable : 1 Loads - IO : 7 Loads - Miss : 86 Loads - no mapping : 5 Load Fill Buffer Hit : 609 Load L1D hit : 612 Load L2D hit : 27 Load LLC hit : 607 Load Local HITM : 15 Load Remote HITM : 0 Load Remote HIT : 0 Load Local DRAM : 176 Load Remote DRAM : 0 Load MESI State Exclusive : 176 Load MESI State Shared : 0 Load LLC Misses : 176 LLC Misses to Local DRAM : 100.0% LLC Misses to Remote DRAM : 0.0% LLC Misses to Remote cache (HIT) : 0.0% LLC Misses to Remote cache (HITM) : 0.0% Store Operations : 2133 Store - uncacheable : 0 Store - no mapping : 1 Store L1D Hit : 1967 Store L1D Miss : 165 No Page Map Rejects : 145 Unable to parse data source : 0 ================================================= Global Shared Cache Line Event Information ================================================= Total Shared Cache Lines : 15 Load HITs on shared lines : 26 Fill Buffer Hits on shared lines : 7 L1D hits on shared lines : 3 L2D hits on shared lines : 0 LLC hits on shared lines : 16 Locked Access on shared lines : 2 Store HITs on shared lines : 8 Store L1D hits on shared lines : 7 Total Merged records : 23 ================================================= c2c details ================================================= Events : cpu/mem-loads,ldlat=30/P : cpu/mem-stores/P [root@jouet ~]# [root@jouet ~]# perf c2c report Shared Data Cache Line Table (2378 entries) Total --- LLC Load Hitm -- -- Store Reference - - Load Dram - LLC Total - Core Load Hit - Cacheline records %hitm Total Lcl Rmt Total L1Hit L1Miss Lcl Rmt Ld Miss Loads FB L1 L2 - 0xffff880024380c00 10 0.00% 0 0 0 6 6 0 0 0 0 4 1 3 0 - 0.13% _raw_spin_lock_irqsave - 0.07% ep_poll sys_epoll_wait do_syscall_64 return_from_SYSCALL_64 + 0x103573 - 0.05% ep_poll_callback __wake_up_common - __wake_up_sync_key - 0.02% pipe_read __vfs_read vfs_read sys_read do_syscall_64 return_from_SYSCALL_64 0xfdad + 0.02% sock_def_readable + 0.02% ep_scan_ready_list.constprop.12 + 0.00% mutex_lock + 0.00% __wake_up_common + 0xffff880024380c40 1 0.00% 0 0 0 1 1 0 0 0 0 0 0 0 0 + 0xffff880024380c80 1 0.00% 0 0 0 0 0 0 0 0 0 1 0 0 0 - 0xffff8800243e9f00 1 0.00% 0 0 0 1 1 0 0 0 0 0 0 0 0 enqueue_entity enqueue_task_fair activate_task ttwu_do_activate try_to_wake_up wake_up_process hrtimer_wakeup __hrtimer_run_queues hrtimer_interrupt local_apic_timer_interrupt smp_apic_timer_interrupt apic_timer_interrupt cpuidle_enter call_cpuidle help ------------- And when presing 'd' to see the cacheline details: Cacheline 0xffff880024380c00 ----- HITM ----- -- Store Refs -- --------- cycles ----- cpu Rmt Lcl L1 Hit L1 Miss Off Pid Tid rmt hitm lcl hitm load cnt Symbol - 0.00% 0.00% 100.00% 0.00% 0x0 1473 1474:Chrome_ChildIOT 0 0 41 2 [k] _raw_spin_lock_irqsave [kernel] - _raw_spin_lock_irqsave - 51.52% ep_poll sys_epoll_wait do_syscall_64 return_from_SYSCALL_64 - 0x103573 47.19% 0 4.33% 0xc30bd - 35.93% ep_poll_callback __wake_up_common - __wake_up_sync_key - 18.20% pipe_read __vfs_read vfs_read sys_read do_syscall_64 return_from_SYSCALL_64 0xfdad - 17.73% sock_def_readable unix_stream_sendmsg sock_sendmsg ___sys_sendmsg __sys_sendmsg sys_sendmsg do_syscall_64 return_from_SYSCALL_64 __GI___libc_sendmsg 0x12c036af1fc0 0x16a4050 0x894928ec83485354 + 12.45% ep_scan_ready_list.constprop.12 + 0.00% 0.00% 0.00% 0.00% 0x8 1473 1474:Chrome_ChildIOT 0 0 102 1 [k] mutex_lock [kernel] + 0.00% 0.00% 0.00% 0.00% 0x38 1473 1473:chrome 0 0 88 1 [k] __wake_up_common [kernel] help Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-inykbom2f19difvsu1e18avr@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-11 16:23:48 +00:00
OPT_CALLBACK_DEFAULT('g', "call-graph", &callchain_param,
"print_type,threshold[,print_limit],order,sort_key[,branch],value",
callchain_help, &parse_callchain_opt,
callchain_default_opt),
perf c2c: Sort on peer snooping for load operations This patch adds a new option 'peer' so can sort on the cache hit for peer snooping. For displaying with option 'peer', the "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" both sort with the metrics "tot_peer". As result, we can get the 'peer' display: # perf c2c report -d peer --coalesce tid,pid,iaddr,dso -N --stdio ================================================= Shared Data Cache Line Table ================================================= # # ----------- Cacheline ---------- Peer ------- Load Peer ------- Total Total Total --------- Stores -------- ----- Core Load Hit ----- - LLC Load Hit -- - RMT Load Hit -- --- Load Dram ---- # Index Address Node PA cnt Snoop Total Local Remote records Loads Stores L1Hit L1Miss N/A FB L1 L2 LclHit LclHitm RmtHit RmtHitm Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ....... ........ ....... ........ ........ # 0 0xaaaac17d6000 N/A 0 100.00% 99 99 0 18851 18851 0 0 0 0 0 18752 0 99 0 0 0 0 0 ================================================= Shared Cache Line Distribution Pareto ================================================= # # -- Peer Snoop -- ------- Store Refs ------ --------- Data address --------- ---------- cycles ---------- Total cpu Shared # Num Rmt Lcl L1 Hit L1 Miss N/A Offset Node PA cnt Pid Tid Code address rmt peer lcl peer load records cnt Symbol Object Source:Line Node{cpus %peers %stores} # ..... ....... ....... ....... ....... ....... .................. .... ...... ....... ................. .................. ........ ........ ........ ....... ........ ...................... ................ ............... .... # ---------------------------------------------------------------------- 0 0 99 0 0 0 0xaaaac17d6000 ---------------------------------------------------------------------- 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3603:memstress 0xaaaac17c25ac 0 376 41 9314 2 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 2 100.0% n/a} 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3606:memstress 0xaaaac17c25ac 0 375 44 9155 1 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 1 100.0% n/a} 0.00% 48.48% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3606:memstress 0xaaaac17c3e88 0 180 170 65 1 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 1 100.0% n/a} 0.00% 45.45% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3603:memstress 0xaaaac17c3e88 0 180 175 70 2 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 2 100.0% n/a} Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-14-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:49 +00:00
OPT_STRING('d', "display", &display, "Switch HITM output type", "tot,lcl,rmt,peer"),
OPT_STRING('c', "coalesce", &coalesce, "coalesce fields",
"coalesce fields: pid,tid,iaddr,dso"),
OPT_BOOLEAN('f', "force", &symbol_conf.force, "don't complain, do it"),
OPT_BOOLEAN(0, "stitch-lbr", &c2c.stitch_lbr,
"Enable LBR callgraph stitching approach"),
perf c2c: Add report option to show false sharing in adjacent cachelines Many platforms have feature of adjacent cachelines prefetch, when it is enabled, for data in RAM of 2 cachelines (2N and 2N+1) granularity, if one is fetched to cache, the other one could likely be fetched too, which sort of extends the cacheline size to double, thus the false sharing could happens in adjacent cachelines. 0Day has captured performance changed related with this [1], and some commercial software explicitly makes its hot global variables 128 bytes aligned (2 cache lines) to avoid this kind of extended false sharing. So add an option "--double-cl" for 'perf c2c report' to show false sharing in double cache line granularity, which acts just like the cacheline size is doubled. There is no change to c2c record. The hardware events of shared cacheline are still per cacheline, and this option just changes the granularity of how events are grouped and displayed. In the 'perf c2c report' output below (will-it-scale's 'pagefault2' case on old kernel): ---------------------------------------------------------------------- 26 31 2 0 0 0 0xffff888103ec6000 ---------------------------------------------------------------------- 35.48% 50.00% 0.00% 0.00% 0.00% 0x10 0 1 0xffffffff8133148b 1153 66 971 3748 74 [k] get_mem_cgroup_from_mm 6.45% 0.00% 0.00% 0.00% 0.00% 0x10 0 1 0xffffffff813396e4 570 0 1531 879 75 [k] mem_cgroup_charge 25.81% 50.00% 0.00% 0.00% 0.00% 0x54 0 1 0xffffffff81331472 949 70 593 3359 74 [k] get_mem_cgroup_from_mm 19.35% 0.00% 0.00% 0.00% 0.00% 0x54 0 1 0xffffffff81339686 1352 0 1073 1022 74 [k] mem_cgroup_charge 9.68% 0.00% 0.00% 0.00% 0.00% 0x54 0 1 0xffffffff813396d6 1401 0 863 768 74 [k] mem_cgroup_charge 3.23% 0.00% 0.00% 0.00% 0.00% 0x54 0 1 0xffffffff81333106 618 0 804 11 9 [k] uncharge_batch The offset 0x10 and 0x54 used to displayed in 2 groups, and now they are listed together to give users a hint of extended false sharing. [1]. https://lore.kernel.org/lkml/20201102091543.GM31092@shao2-debian/ Committer notes: Link: https://lore.kernel.org/r/Y+wvVNWqXb70l4uy@feng-clx Removed -a, leaving just as --double-cl, as this probably is not used so frequently and perhaps will be even auto-detected if we manage to record the MSR where this is configured. Reviewed-by: Andi Kleen <ak@linux.intel.com> Reviewed-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Feng Tang <feng.tang@intel.com> Tested-by: Leo Yan <leo.yan@linaro.org> Acked-by: Joe Mario <jmario@redhat.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Tim Chen <tim.c.chen@intel.com> Cc: Xing Zhengjun <zhengjun.xing@linux.intel.com> Link: https://lore.kernel.org/r/20230214075823.246414-1-feng.tang@intel.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2023-02-14 07:58:23 +00:00
OPT_BOOLEAN(0, "double-cl", &chk_double_cl, "Detect adjacent cacheline false sharing"),
OPT_PARENT(c2c_options),
OPT_END()
};
int err = 0;
const char *output_str, *sort_str = NULL;
argc = parse_options(argc, argv, options, report_c2c_usage,
PARSE_OPT_STOP_AT_NON_OPTION);
if (argc)
usage_with_options(report_c2c_usage, options);
perf c2c: Use stdio interface if slang is not supported If the slang lib is not installed on the system, perf c2c tool disables TUI mode and roll back to use stdio mode; but the flag 'c2c.use_stdio' is missed to set true and thus it wrongly applies UI quirks in the function ui_quirks(). This commit forces to use stdio interface if slang is not supported, and it can avoid to apply the UI quirks and show the correct metric header. Before: ================================================= Shared Cache Line Distribution Pareto ================================================= ------------------------------------------------------------------------------- 0 0 0 99 0 0 0 0xaaaac17d6000 ------------------------------------------------------------------------------- 0.00% 0.00% 6.06% 0.00% 0.00% 0.00% 0x20 N/A 0 0xaaaac17c25ac 0 0 43 375 18469 2 [.] 0x00000000000025ac memstress memstress[25ac] 0 0.00% 0.00% 93.94% 0.00% 0.00% 0.00% 0x29 N/A 0 0xaaaac17c3e88 0 0 173 180 135 2 [.] 0x0000000000003e88 memstress memstress[3e88] 0 After: ================================================= Shared Cache Line Distribution Pareto ================================================= ------------------------------------------------------------------------------- 0 0 0 99 0 0 0 0xaaaac17d6000 ------------------------------------------------------------------------------- 0.00% 0.00% 6.06% 0.00% 0.00% 0.00% 0x20 N/A 0 0xaaaac17c25ac 0 0 43 375 18469 2 [.] 0x00000000000025ac memstress memstress[25ac] 0 0.00% 0.00% 93.94% 0.00% 0.00% 0.00% 0x29 N/A 0 0xaaaac17c3e88 0 0 173 180 135 2 [.] 0x0000000000003e88 memstress memstress[3e88] 0 Fixes: 5a1a99cd2e4e1557 ("perf c2c report: Add main TUI browser") Reported-by: Joe Mario <jmario@redhat.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lore.kernel.org/lkml/20220526145400.611249-1-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-05-26 14:54:00 +00:00
#ifndef HAVE_SLANG_SUPPORT
c2c.use_stdio = true;
#endif
perf c2c report: Add global stats stdio output Display global stats table as part of the stdio output or when --stats option is speicified: $ perf c2c report --stats ================================================= Trace Event Information ================================================= Total records : 41237 Locked Load/Store Operations : 4075 Load Operations : 20526 Loads - uncacheable : 0 Loads - IO : 0 Loads - Miss : 552 Loads - no mapping : 31 Load Fill Buffer Hit : 7333 Load L1D hit : 6398 Load L2D hit : 144 Load LLC hit : 4889 Load Local HITM : 1185 Load Remote HITM : 838 Load Remote HIT : 52 Load Local DRAM : 183 Load Remote DRAM : 106 Load MESI State Exclusive : 289 Load MESI State Shared : 0 Load LLC Misses : 1179 LLC Misses to Local DRAM : 15.5% LLC Misses to Remote DRAM : 9.0% LLC Misses to Remote cache (HIT) : 4.4% LLC Misses to Remote cache (HITM) : 71.1% Store Operations : 20711 Store - uncacheable : 0 Store - no mapping : 1 Store L1D Hit : 20158 Store L1D Miss : 552 No Page Map Rejects : 7 Unable to parse data source : 0 Original-patch-by: Dick Fowles <rfowles@redhat.com> Original-patch-by: Don Zickus <dzickus@redhat.com> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-qkyvao3qsrnwazf0w1jvsh7z@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-02 18:01:59 +00:00
if (c2c.stats_only)
c2c.use_stdio = true;
err = symbol__validate_sym_arguments();
if (err)
goto out;
if (!input_name || !strlen(input_name))
input_name = "perf.data";
data.path = input_name;
data.force = symbol_conf.force;
perf_tool__init(&c2c.tool, /*ordered_events=*/true);
c2c.tool.sample = process_sample_event;
c2c.tool.mmap = perf_event__process_mmap;
c2c.tool.mmap2 = perf_event__process_mmap2;
c2c.tool.comm = perf_event__process_comm;
c2c.tool.exit = perf_event__process_exit;
c2c.tool.fork = perf_event__process_fork;
c2c.tool.lost = perf_event__process_lost;
c2c.tool.attr = perf_event__process_attr;
c2c.tool.auxtrace_info = perf_event__process_auxtrace_info;
c2c.tool.auxtrace = perf_event__process_auxtrace;
c2c.tool.auxtrace_error = perf_event__process_auxtrace_error;
c2c.tool.ordering_requires_timestamps = true;
perf c2c: Use 'peer' as default display for Arm64 Since Arm64 arch doesn't support HITMs flags, this patch changes to use 'peer' as default display if user doesn't specify any type; for other arches, it still uses 'tot' as default display type if user doesn't specify it. This patch changes to call perf_session__new() in an earlier place, so session environment can be initialized ahead and arch info can be used for setting display type. Suggested-by: Ali Saidi <alisaidi@amazon.com> Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-15-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:50 +00:00
session = perf_session__new(&data, &c2c.tool);
if (IS_ERR(session)) {
err = PTR_ERR(session);
pr_debug("Error creating perf session\n");
goto out;
}
/*
* Use the 'tot' as default display type if user doesn't specify it;
* since Arm64 platform doesn't support HITMs flag, use 'peer' as the
* default display type.
*/
if (!display) {
if (!strcmp(perf_env__arch(&session->header.env), "arm64"))
display = "peer";
else
display = "tot";
}
err = setup_display(display);
if (err)
perf c2c: Use 'peer' as default display for Arm64 Since Arm64 arch doesn't support HITMs flags, this patch changes to use 'peer' as default display if user doesn't specify any type; for other arches, it still uses 'tot' as default display type if user doesn't specify it. This patch changes to call perf_session__new() in an earlier place, so session environment can be initialized ahead and arch info can be used for setting display type. Suggested-by: Ali Saidi <alisaidi@amazon.com> Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-15-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:50 +00:00
goto out_session;
err = setup_coalesce(coalesce, no_source);
if (err) {
pr_debug("Failed to initialize hists\n");
perf c2c: Use 'peer' as default display for Arm64 Since Arm64 arch doesn't support HITMs flags, this patch changes to use 'peer' as default display if user doesn't specify any type; for other arches, it still uses 'tot' as default display type if user doesn't specify it. This patch changes to call perf_session__new() in an earlier place, so session environment can be initialized ahead and arch info can be used for setting display type. Suggested-by: Ali Saidi <alisaidi@amazon.com> Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-15-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:50 +00:00
goto out_session;
}
err = c2c_hists__init(&c2c.hists, "dcacheline", 2);
if (err) {
pr_debug("Failed to initialize hists\n");
perf c2c: Use 'peer' as default display for Arm64 Since Arm64 arch doesn't support HITMs flags, this patch changes to use 'peer' as default display if user doesn't specify any type; for other arches, it still uses 'tot' as default display type if user doesn't specify it. This patch changes to call perf_session__new() in an earlier place, so session environment can be initialized ahead and arch info can be used for setting display type. Suggested-by: Ali Saidi <alisaidi@amazon.com> Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-15-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:50 +00:00
goto out_session;
}
session->itrace_synth_opts = &itrace_synth_opts;
err = setup_nodes(session);
if (err) {
pr_err("Failed setup nodes\n");
perf c2c: Use 'peer' as default display for Arm64 Since Arm64 arch doesn't support HITMs flags, this patch changes to use 'peer' as default display if user doesn't specify any type; for other arches, it still uses 'tot' as default display type if user doesn't specify it. This patch changes to call perf_session__new() in an earlier place, so session environment can be initialized ahead and arch info can be used for setting display type. Suggested-by: Ali Saidi <alisaidi@amazon.com> Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-15-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:50 +00:00
goto out_session;
}
perf c2c report: Display node for cacheline address Adding the NUMA node info for the data cacheline. Adding the new column to both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto". Note the new 'Node' column next to the 'Cacheline'. $ perf c2c report --stdio ================================================= Shared Data Cache Line Table ================================================= # # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 ... Note the new 'Node' column next to the 'Offset'. ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Using the mem2node object to get the NUMA node data. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-8-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:40 +00:00
err = mem2node__init(&c2c.mem2node, &session->header.env);
perf c2c report: Allow to report callchains Add --call-graph option to properly setup callchain code. Adding default settings to display callchains whenever they are stored in the perf.data. Committer Notes: Testing it: [root@jouet ~]# perf c2c record -a -g sleep 5 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.331 MB perf.data (4263 samples) ] [root@jouet ~]# perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|CALLCHAIN|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|CALLCHAIN|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 [root@jouet ~]# perf c2c report --stats ================================================= Trace Event Information ================================================= Total records : 4263 Locked Load/Store Operations : 220 Load Operations : 2130 Loads - uncacheable : 1 Loads - IO : 7 Loads - Miss : 86 Loads - no mapping : 5 Load Fill Buffer Hit : 609 Load L1D hit : 612 ================================================= Trace Event Information ================================================= Total records : 4263 Locked Load/Store Operations : 220 Load Operations : 2130 Loads - uncacheable : 1 Loads - IO : 7 Loads - Miss : 86 Loads - no mapping : 5 Load Fill Buffer Hit : 609 Load L1D hit : 612 Load L2D hit : 27 Load LLC hit : 607 Load Local HITM : 15 Load Remote HITM : 0 Load Remote HIT : 0 Load Local DRAM : 176 Load Remote DRAM : 0 Load MESI State Exclusive : 176 Load MESI State Shared : 0 Load LLC Misses : 176 LLC Misses to Local DRAM : 100.0% LLC Misses to Remote DRAM : 0.0% LLC Misses to Remote cache (HIT) : 0.0% LLC Misses to Remote cache (HITM) : 0.0% Store Operations : 2133 Store - uncacheable : 0 Store - no mapping : 1 Store L1D Hit : 1967 Store L1D Miss : 165 No Page Map Rejects : 145 Unable to parse data source : 0 ================================================= Global Shared Cache Line Event Information ================================================= Total Shared Cache Lines : 15 Load HITs on shared lines : 26 Fill Buffer Hits on shared lines : 7 L1D hits on shared lines : 3 L2D hits on shared lines : 0 LLC hits on shared lines : 16 Locked Access on shared lines : 2 Store HITs on shared lines : 8 Store L1D hits on shared lines : 7 Total Merged records : 23 ================================================= c2c details ================================================= Events : cpu/mem-loads,ldlat=30/P : cpu/mem-stores/P [root@jouet ~]# [root@jouet ~]# perf c2c report Shared Data Cache Line Table (2378 entries) Total --- LLC Load Hitm -- -- Store Reference - - Load Dram - LLC Total - Core Load Hit - Cacheline records %hitm Total Lcl Rmt Total L1Hit L1Miss Lcl Rmt Ld Miss Loads FB L1 L2 - 0xffff880024380c00 10 0.00% 0 0 0 6 6 0 0 0 0 4 1 3 0 - 0.13% _raw_spin_lock_irqsave - 0.07% ep_poll sys_epoll_wait do_syscall_64 return_from_SYSCALL_64 + 0x103573 - 0.05% ep_poll_callback __wake_up_common - __wake_up_sync_key - 0.02% pipe_read __vfs_read vfs_read sys_read do_syscall_64 return_from_SYSCALL_64 0xfdad + 0.02% sock_def_readable + 0.02% ep_scan_ready_list.constprop.12 + 0.00% mutex_lock + 0.00% __wake_up_common + 0xffff880024380c40 1 0.00% 0 0 0 1 1 0 0 0 0 0 0 0 0 + 0xffff880024380c80 1 0.00% 0 0 0 0 0 0 0 0 0 1 0 0 0 - 0xffff8800243e9f00 1 0.00% 0 0 0 1 1 0 0 0 0 0 0 0 0 enqueue_entity enqueue_task_fair activate_task ttwu_do_activate try_to_wake_up wake_up_process hrtimer_wakeup __hrtimer_run_queues hrtimer_interrupt local_apic_timer_interrupt smp_apic_timer_interrupt apic_timer_interrupt cpuidle_enter call_cpuidle help ------------- And when presing 'd' to see the cacheline details: Cacheline 0xffff880024380c00 ----- HITM ----- -- Store Refs -- --------- cycles ----- cpu Rmt Lcl L1 Hit L1 Miss Off Pid Tid rmt hitm lcl hitm load cnt Symbol - 0.00% 0.00% 100.00% 0.00% 0x0 1473 1474:Chrome_ChildIOT 0 0 41 2 [k] _raw_spin_lock_irqsave [kernel] - _raw_spin_lock_irqsave - 51.52% ep_poll sys_epoll_wait do_syscall_64 return_from_SYSCALL_64 - 0x103573 47.19% 0 4.33% 0xc30bd - 35.93% ep_poll_callback __wake_up_common - __wake_up_sync_key - 18.20% pipe_read __vfs_read vfs_read sys_read do_syscall_64 return_from_SYSCALL_64 0xfdad - 17.73% sock_def_readable unix_stream_sendmsg sock_sendmsg ___sys_sendmsg __sys_sendmsg sys_sendmsg do_syscall_64 return_from_SYSCALL_64 __GI___libc_sendmsg 0x12c036af1fc0 0x16a4050 0x894928ec83485354 + 12.45% ep_scan_ready_list.constprop.12 + 0.00% 0.00% 0.00% 0.00% 0x8 1473 1474:Chrome_ChildIOT 0 0 102 1 [k] mutex_lock [kernel] + 0.00% 0.00% 0.00% 0.00% 0x38 1473 1473:chrome 0 0 88 1 [k] __wake_up_common [kernel] help Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-inykbom2f19difvsu1e18avr@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-11 16:23:48 +00:00
if (err)
goto out_session;
perf c2c report: Display node for cacheline address Adding the NUMA node info for the data cacheline. Adding the new column to both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto". Note the new 'Node' column next to the 'Cacheline'. $ perf c2c report --stdio ================================================= Shared Data Cache Line Table ================================================= # # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 ... Note the new 'Node' column next to the 'Offset'. ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Using the mem2node object to get the NUMA node data. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-8-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:40 +00:00
err = setup_callchain(session->evlist);
if (err)
goto out_mem2node;
if (symbol__init(&session->header.env) < 0)
perf c2c report: Display node for cacheline address Adding the NUMA node info for the data cacheline. Adding the new column to both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto". Note the new 'Node' column next to the 'Cacheline'. $ perf c2c report --stdio ================================================= Shared Data Cache Line Table ================================================= # # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 ... Note the new 'Node' column next to the 'Offset'. ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Using the mem2node object to get the NUMA node data. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-8-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:40 +00:00
goto out_mem2node;
/* No pipe support at the moment. */
if (perf_data__is_pipe(session->data)) {
pr_debug("No pipe support at the moment.\n");
perf c2c report: Display node for cacheline address Adding the NUMA node info for the data cacheline. Adding the new column to both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto". Note the new 'Node' column next to the 'Cacheline'. $ perf c2c report --stdio ================================================= Shared Data Cache Line Table ================================================= # # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 ... Note the new 'Node' column next to the 'Offset'. ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Using the mem2node object to get the NUMA node data. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-8-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:40 +00:00
goto out_mem2node;
}
if (c2c.use_stdio)
use_browser = 0;
else
use_browser = 1;
setup_browser(false);
err = perf_session__process_events(session);
if (err) {
pr_err("failed to process sample\n");
perf c2c report: Display node for cacheline address Adding the NUMA node info for the data cacheline. Adding the new column to both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto". Note the new 'Node' column next to the 'Cacheline'. $ perf c2c report --stdio ================================================= Shared Data Cache Line Table ================================================= # # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 ... Note the new 'Node' column next to the 'Offset'. ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Using the mem2node object to get the NUMA node data. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-8-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:40 +00:00
goto out_mem2node;
}
perf c2c: Sort on peer snooping for load operations This patch adds a new option 'peer' so can sort on the cache hit for peer snooping. For displaying with option 'peer', the "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" both sort with the metrics "tot_peer". As result, we can get the 'peer' display: # perf c2c report -d peer --coalesce tid,pid,iaddr,dso -N --stdio ================================================= Shared Data Cache Line Table ================================================= # # ----------- Cacheline ---------- Peer ------- Load Peer ------- Total Total Total --------- Stores -------- ----- Core Load Hit ----- - LLC Load Hit -- - RMT Load Hit -- --- Load Dram ---- # Index Address Node PA cnt Snoop Total Local Remote records Loads Stores L1Hit L1Miss N/A FB L1 L2 LclHit LclHitm RmtHit RmtHitm Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ....... ........ ....... ........ ........ # 0 0xaaaac17d6000 N/A 0 100.00% 99 99 0 18851 18851 0 0 0 0 0 18752 0 99 0 0 0 0 0 ================================================= Shared Cache Line Distribution Pareto ================================================= # # -- Peer Snoop -- ------- Store Refs ------ --------- Data address --------- ---------- cycles ---------- Total cpu Shared # Num Rmt Lcl L1 Hit L1 Miss N/A Offset Node PA cnt Pid Tid Code address rmt peer lcl peer load records cnt Symbol Object Source:Line Node{cpus %peers %stores} # ..... ....... ....... ....... ....... ....... .................. .... ...... ....... ................. .................. ........ ........ ........ ....... ........ ...................... ................ ............... .... # ---------------------------------------------------------------------- 0 0 99 0 0 0 0xaaaac17d6000 ---------------------------------------------------------------------- 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3603:memstress 0xaaaac17c25ac 0 376 41 9314 2 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 2 100.0% n/a} 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3606:memstress 0xaaaac17c25ac 0 375 44 9155 1 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 1 100.0% n/a} 0.00% 48.48% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3606:memstress 0xaaaac17c3e88 0 180 170 65 1 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 1 100.0% n/a} 0.00% 45.45% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3603:memstress 0xaaaac17c3e88 0 180 175 70 2 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 2 100.0% n/a} Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-14-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:49 +00:00
if (c2c.display != DISPLAY_SNP_PEER)
output_str = "cl_idx,"
"dcacheline,"
"dcacheline_node,"
"dcacheline_count,"
"percent_costly_snoop,"
"tot_hitm,lcl_hitm,rmt_hitm,"
"tot_recs,"
"tot_loads,"
"tot_stores,"
"stores_l1hit,stores_l1miss,stores_na,"
"ld_fbhit,ld_l1hit,ld_l2hit,"
"ld_lclhit,lcl_hitm,"
"ld_rmthit,rmt_hitm,"
"dram_lcl,dram_rmt";
else
output_str = "cl_idx,"
"dcacheline,"
"dcacheline_node,"
"dcacheline_count,"
"percent_costly_snoop,"
"tot_peer,lcl_peer,rmt_peer,"
"tot_recs,"
"tot_loads,"
"tot_stores,"
"stores_l1hit,stores_l1miss,stores_na,"
"ld_fbhit,ld_l1hit,ld_l2hit,"
"ld_lclhit,lcl_hitm,"
"ld_rmthit,rmt_hitm,"
"dram_lcl,dram_rmt";
perf c2c: Use explicit names for display macros Perf c2c tool has an assumption that it heavily depends on HITM snoop type to detect cache false sharing, unfortunately, HITM is not supported on some architectures. Essentially, perf c2c tool wants to find some very costly snooping operations for false cache sharing, this means it's not necessarily to stick using HITM tags and we can explore other snooping types (e.g. SNOOPX_PEER). For this reason, this patch renames HITM related display macros with suffix '_HITM', so it can be distinct if later add more display types for on other snooping type. Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-10-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:45 +00:00
if (c2c.display == DISPLAY_TOT_HITM)
sort_str = "tot_hitm";
perf c2c: Use explicit names for display macros Perf c2c tool has an assumption that it heavily depends on HITM snoop type to detect cache false sharing, unfortunately, HITM is not supported on some architectures. Essentially, perf c2c tool wants to find some very costly snooping operations for false cache sharing, this means it's not necessarily to stick using HITM tags and we can explore other snooping types (e.g. SNOOPX_PEER). For this reason, this patch renames HITM related display macros with suffix '_HITM', so it can be distinct if later add more display types for on other snooping type. Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-10-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:45 +00:00
else if (c2c.display == DISPLAY_RMT_HITM)
sort_str = "rmt_hitm";
perf c2c: Use explicit names for display macros Perf c2c tool has an assumption that it heavily depends on HITM snoop type to detect cache false sharing, unfortunately, HITM is not supported on some architectures. Essentially, perf c2c tool wants to find some very costly snooping operations for false cache sharing, this means it's not necessarily to stick using HITM tags and we can explore other snooping types (e.g. SNOOPX_PEER). For this reason, this patch renames HITM related display macros with suffix '_HITM', so it can be distinct if later add more display types for on other snooping type. Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-10-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:45 +00:00
else if (c2c.display == DISPLAY_LCL_HITM)
sort_str = "lcl_hitm";
perf c2c: Sort on peer snooping for load operations This patch adds a new option 'peer' so can sort on the cache hit for peer snooping. For displaying with option 'peer', the "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" both sort with the metrics "tot_peer". As result, we can get the 'peer' display: # perf c2c report -d peer --coalesce tid,pid,iaddr,dso -N --stdio ================================================= Shared Data Cache Line Table ================================================= # # ----------- Cacheline ---------- Peer ------- Load Peer ------- Total Total Total --------- Stores -------- ----- Core Load Hit ----- - LLC Load Hit -- - RMT Load Hit -- --- Load Dram ---- # Index Address Node PA cnt Snoop Total Local Remote records Loads Stores L1Hit L1Miss N/A FB L1 L2 LclHit LclHitm RmtHit RmtHitm Lcl Rmt # ..... .................. .... ...... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ....... ........ ....... ........ ....... ........ ........ # 0 0xaaaac17d6000 N/A 0 100.00% 99 99 0 18851 18851 0 0 0 0 0 18752 0 99 0 0 0 0 0 ================================================= Shared Cache Line Distribution Pareto ================================================= # # -- Peer Snoop -- ------- Store Refs ------ --------- Data address --------- ---------- cycles ---------- Total cpu Shared # Num Rmt Lcl L1 Hit L1 Miss N/A Offset Node PA cnt Pid Tid Code address rmt peer lcl peer load records cnt Symbol Object Source:Line Node{cpus %peers %stores} # ..... ....... ....... ....... ....... ....... .................. .... ...... ....... ................. .................. ........ ........ ........ ....... ........ ...................... ................ ............... .... # ---------------------------------------------------------------------- 0 0 99 0 0 0 0xaaaac17d6000 ---------------------------------------------------------------------- 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3603:memstress 0xaaaac17c25ac 0 376 41 9314 2 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 2 100.0% n/a} 0.00% 3.03% 0.00% 0.00% 0.00% 0x20 N/A 0 3603 3606:memstress 0xaaaac17c25ac 0 375 44 9155 1 [.] 0x00000000000025ac memstress memstress[25ac] 0{ 1 100.0% n/a} 0.00% 48.48% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3606:memstress 0xaaaac17c3e88 0 180 170 65 1 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 1 100.0% n/a} 0.00% 45.45% 0.00% 0.00% 0.00% 0x29 N/A 0 3603 3603:memstress 0xaaaac17c3e88 0 180 175 70 2 [.] 0x0000000000003e88 memstress memstress[3e88] 0{ 2 100.0% n/a} Reviewed-by: Ali Saidi <alisaidi@amazon.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Tested-by: Ali Saidi <alisaidi@amazon.com> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: German Gomez <german.gomez@arm.com> Cc: Gustavo A. R. Silva <gustavoars@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.garry@huawei.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Like Xu <likexu@tencent.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Timothy Hayes <timothy.hayes@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220811062451.435810-14-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-08-11 06:24:49 +00:00
else if (c2c.display == DISPLAY_SNP_PEER)
sort_str = "tot_peer";
c2c_hists__reinit(&c2c.hists, output_str, sort_str);
ui_progress__init(&prog, c2c.hists.hists.nr_entries, "Sorting...");
hists__collapse_resort(&c2c.hists.hists, NULL);
hists__output_resort_cb(&c2c.hists.hists, &prog, resort_shared_cl_cb);
hists__iterate_cb(&c2c.hists.hists, resort_cl_cb);
ui_progress__finish();
perf c2c report: Add span header over cacheline data Forcing the NUMA node output to be grouped with the "Cacheline" column in both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto" tables. Before: # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 After: # ------- Cacheline ------ Total Tot ----- LLC Load Hitm ----- # Index Address Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 Before: # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 After: # ----- HITM ----- -- Store Refs -- ----- Data address ----- # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-9-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:41 +00:00
if (ui_quirks()) {
pr_err("failed to setup UI\n");
goto out_mem2node;
}
perf_c2c_display(session);
perf c2c report: Add stdio output support Adding the --stdio option output support. The output tables are dumped directly to the stdio. $ perf c2c report ================================================= Shared Data Cache Line Table ================================================= # # Total ----- LLC Load Hitm ----- ---- Store Reference ---- --- Load Dram ---- LLC Total ----- Core Load Hit ----- -- LLC Load Hit -- # Cacheline records %hitm Total Lcl Rmt Total L1Hit L1Miss Lcl Rmt Ld Miss Loads FB L1 L2 Llc Rmt # .................. ....... ....... ....... ....... ....... ....... ....... ....... ........ ........ ....... ....... ....... ....... ....... ........ ........ # 0xffff88000235f840 17 0.00% 0 0 0 17 17 0 0 0 0 0 0 0 0 0 0 ... ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address ---------- cycles ---------- cpu Shared # Rmt Lcl L1 Hit L1 Miss Offset Pid Tid rmt hitm lcl hitm load cnt Symbol Object Node # ....... ....... ....... ....... .................. ....... ..................... ........ ........ ........ ........ .................... ................. .... # ------------------------------------------------------ 0 0 17 0 0xffff88000235f840 ------------------------------------------------------ 0.00% 0.00% 5.88% 0.00% 0x0 11474 11474:kworker/u16:5 0 0 0 1 [k] rmap_walk_file [kernel.kallsyms] 0 0.00% 0.00% 5.88% 0.00% 0x10 11474 11474:kworker/u16:5 0 0 0 1 [k] lock_page_memcg [kernel.kallsyms] 0 0.00% 0.00% 11.76% 0.00% 0x20 11474 11474:kworker/u16:5 0 0 0 1 [k] page_mapping [kernel.kallsyms] 0 0.00% 0.00% 64.71% 0.00% 0x28 11474 11474:kworker/u16:5 0 0 0 1 [k] __test_set_page_writeback [kernel.kallsyms] 0 0.00% 0.00% 11.76% 0.00% 0x30 11474 11474:kworker/u16:5 0 0 0 1 [k] page_mapped [kernel.kallsyms] 0 ... Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/n/tip-eorco9r0oeesjve77pkkg43s@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-05-03 12:32:56 +00:00
perf c2c report: Display node for cacheline address Adding the NUMA node info for the data cacheline. Adding the new column to both "Shared Data Cache Line Table" and "Shared Cache Line Distribution Pareto". Note the new 'Node' column next to the 'Cacheline'. $ perf c2c report --stdio ================================================= Shared Data Cache Line Table ================================================= # # Total Tot ----- LLC Load Hitm ----- # Index Cacheline Node records Hitm Total Lcl Rmt # ..... .................. .... ....... ....... ....... ....... ....... # 0 0x7f0830100000 0 84 10.53% 8 8 0 1 0xffff922a93154200 0 3 2.63% 2 2 0 2 0xffff922a93154500 0 4 2.63% 2 2 0 ... Note the new 'Node' column next to the 'Offset'. ================================================= Shared Cache Line Distribution Pareto ================================================= # # ----- HITM ----- -- Store Refs -- Data address # Num Rmt Lcl L1 Hit L1 Miss Offset Node Pid # ..... ....... ....... ....... ....... .................. .... ....... # ------------------------------------------------------------- 0 0 8 32 2 0x7f0830100000 ------------------------------------------------------------- 0.00% 75.00% 21.88% 0.00% 0x18 0 1791 0.00% 12.50% 37.50% 0.00% 0x18 0 1791 0.00% 0.00% 34.38% 0.00% 0x18 0 1791 Using the mem2node object to get the NUMA node data. Signed-off-by: Jiri Olsa <jolsa@kernel.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: David Ahern <dsahern@gmail.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/20180309101442.9224-8-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2018-03-09 10:14:40 +00:00
out_mem2node:
mem2node__exit(&c2c.mem2node);
out_session:
perf_session__delete(session);
out:
return err;
}
static int parse_record_events(const struct option *opt,
perf c2c: Add record subcommand Adding c2c record subcommand. It setups options related to HITM cacheline analysis and calls standard perf record command. $ sudo perf c2c record -v -- -a calling: record -W -d --sample-cpu -e cpu/mem-loads,ldlat=30/P -e cpu/mem-stores/P -a ... It produces perf.data, which is to be reported by perf c2c report, that comes in following patches. Details are described in the man page, which is added in one of the following patches. Committer notes: Testing it: # perf c2c record -a sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.050 MB perf.data (412 samples) ] # ls -la perf.data -rw-------. 1 root root 5301752 Oct 4 13:32 perf.data # perf evlist cpu/mem-loads,ldlat=30/P cpu/mem-stores/P # perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 # # perf report --stdio <SNIP> # Total Lost Samples: 14 # Samples: 216 of event 'cpu/mem-loads,ldlat=30/P' # Event count (approx.): 15207 # Overhead Symbol Shared Object # ........ ..................................... ............................ 10.32% [k] update_blocked_averages [kernel.vmlinux] 3.43% [.] 0x00000000001a2122 qemu-system-x86_64 (deleted) 2.52% [k] enqueue_entity [kernel.vmlinux] 1.88% [.] g_main_context_query libglib-2.0.so.0.4800.2 1.86% [k] __schedule [kernel.vmlinux] <SNIP> # Samples: 196 of event 'cpu/mem-stores/P' # Event count (approx.): 14771346 # Overhead Symbol Shared Object # ........ ................................... ............................ 13.91% [k] intel_idle [kernel.vmlinux] 3.02% [.] 0x00000000022f06ea chrome 2.94% [.] 0x00000000001a1b4c qemu-system-x86_64 (deleted) 2.94% [.] 0x000000000019d8e4 qemu-system-x86_64 (deleted) 2.38% [.] 0x00000000001a1c52 qemu-system-x86_64 (deleted) <SNIP> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1474558645-19956-12-git-send-email-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-22 15:36:39 +00:00
const char *str, int unset __maybe_unused)
{
bool *event_set = (bool *) opt->value;
perf mem: Clean up perf_mem_events__ptr() The mem_events can be retrieved from the struct perf_pmu now. An ARCH specific perf_mem_events__ptr() is not required anymore. Remove all of them. The Intel hybrid has multiple mem-events-supported PMUs. But they share the same mem_events. Other ARCHs only support one mem-events-supported PMU. In the configuration, it's good enough to only configure the mem_events for one PMU. Add perf_mem_events_find_pmu() which returns the first mem-events-supported PMU. In the perf_mem_events__init(), the perf_pmus__scan() is not required anymore. It avoids checking the sysfs for every PMU on the system. Make the perf_mem_events__record_args() more generic. Remove the perf_mem_events__print_unsupport_hybrid(). Since pmu is added as a new parameter, rename perf_mem_events__ptr() to perf_pmu__mem_events_ptr(). Several other functions also do a similar rename. Reviewed-by: Ian Rogers <irogers@google.com> Reviewed-by: Kajol Jain <kjain@linux.ibm.com> Tested-by: Ravi Bangoria <ravi.bangoria@amd.com> Tested-by: Kajol jain <kjain@linux.ibm.com> Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Cc: james.clark@arm.com Cc: will@kernel.org Cc: leo.yan@linaro.org Cc: mike.leach@linaro.org Cc: renyu.zj@linux.alibaba.com Cc: yuhaixin.yhx@linux.alibaba.com Cc: tmricht@linux.ibm.com Cc: atrajeev@linux.vnet.ibm.com Cc: linux-arm-kernel@lists.infradead.org Cc: john.g.garry@oracle.com Link: https://lore.kernel.org/r/20240123185036.3461837-3-kan.liang@linux.intel.com Signed-off-by: Namhyung Kim <namhyung@kernel.org>
2024-01-23 18:50:31 +00:00
struct perf_pmu *pmu;
pmu = perf_mem_events_find_pmu();
if (!pmu) {
pr_err("failed: there is no PMU that supports perf c2c\n");
exit(-1);
}
perf c2c: Add record subcommand Adding c2c record subcommand. It setups options related to HITM cacheline analysis and calls standard perf record command. $ sudo perf c2c record -v -- -a calling: record -W -d --sample-cpu -e cpu/mem-loads,ldlat=30/P -e cpu/mem-stores/P -a ... It produces perf.data, which is to be reported by perf c2c report, that comes in following patches. Details are described in the man page, which is added in one of the following patches. Committer notes: Testing it: # perf c2c record -a sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.050 MB perf.data (412 samples) ] # ls -la perf.data -rw-------. 1 root root 5301752 Oct 4 13:32 perf.data # perf evlist cpu/mem-loads,ldlat=30/P cpu/mem-stores/P # perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 # # perf report --stdio <SNIP> # Total Lost Samples: 14 # Samples: 216 of event 'cpu/mem-loads,ldlat=30/P' # Event count (approx.): 15207 # Overhead Symbol Shared Object # ........ ..................................... ............................ 10.32% [k] update_blocked_averages [kernel.vmlinux] 3.43% [.] 0x00000000001a2122 qemu-system-x86_64 (deleted) 2.52% [k] enqueue_entity [kernel.vmlinux] 1.88% [.] g_main_context_query libglib-2.0.so.0.4800.2 1.86% [k] __schedule [kernel.vmlinux] <SNIP> # Samples: 196 of event 'cpu/mem-stores/P' # Event count (approx.): 14771346 # Overhead Symbol Shared Object # ........ ................................... ............................ 13.91% [k] intel_idle [kernel.vmlinux] 3.02% [.] 0x00000000022f06ea chrome 2.94% [.] 0x00000000001a1b4c qemu-system-x86_64 (deleted) 2.94% [.] 0x000000000019d8e4 qemu-system-x86_64 (deleted) 2.38% [.] 0x00000000001a1c52 qemu-system-x86_64 (deleted) <SNIP> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1474558645-19956-12-git-send-email-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-22 15:36:39 +00:00
if (!strcmp(str, "list")) {
perf mem: Clean up perf_mem_events__ptr() The mem_events can be retrieved from the struct perf_pmu now. An ARCH specific perf_mem_events__ptr() is not required anymore. Remove all of them. The Intel hybrid has multiple mem-events-supported PMUs. But they share the same mem_events. Other ARCHs only support one mem-events-supported PMU. In the configuration, it's good enough to only configure the mem_events for one PMU. Add perf_mem_events_find_pmu() which returns the first mem-events-supported PMU. In the perf_mem_events__init(), the perf_pmus__scan() is not required anymore. It avoids checking the sysfs for every PMU on the system. Make the perf_mem_events__record_args() more generic. Remove the perf_mem_events__print_unsupport_hybrid(). Since pmu is added as a new parameter, rename perf_mem_events__ptr() to perf_pmu__mem_events_ptr(). Several other functions also do a similar rename. Reviewed-by: Ian Rogers <irogers@google.com> Reviewed-by: Kajol Jain <kjain@linux.ibm.com> Tested-by: Ravi Bangoria <ravi.bangoria@amd.com> Tested-by: Kajol jain <kjain@linux.ibm.com> Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Cc: james.clark@arm.com Cc: will@kernel.org Cc: leo.yan@linaro.org Cc: mike.leach@linaro.org Cc: renyu.zj@linux.alibaba.com Cc: yuhaixin.yhx@linux.alibaba.com Cc: tmricht@linux.ibm.com Cc: atrajeev@linux.vnet.ibm.com Cc: linux-arm-kernel@lists.infradead.org Cc: john.g.garry@oracle.com Link: https://lore.kernel.org/r/20240123185036.3461837-3-kan.liang@linux.intel.com Signed-off-by: Namhyung Kim <namhyung@kernel.org>
2024-01-23 18:50:31 +00:00
perf_pmu__mem_events_list(pmu);
exit(0);
}
perf mem: Clean up perf_mem_events__ptr() The mem_events can be retrieved from the struct perf_pmu now. An ARCH specific perf_mem_events__ptr() is not required anymore. Remove all of them. The Intel hybrid has multiple mem-events-supported PMUs. But they share the same mem_events. Other ARCHs only support one mem-events-supported PMU. In the configuration, it's good enough to only configure the mem_events for one PMU. Add perf_mem_events_find_pmu() which returns the first mem-events-supported PMU. In the perf_mem_events__init(), the perf_pmus__scan() is not required anymore. It avoids checking the sysfs for every PMU on the system. Make the perf_mem_events__record_args() more generic. Remove the perf_mem_events__print_unsupport_hybrid(). Since pmu is added as a new parameter, rename perf_mem_events__ptr() to perf_pmu__mem_events_ptr(). Several other functions also do a similar rename. Reviewed-by: Ian Rogers <irogers@google.com> Reviewed-by: Kajol Jain <kjain@linux.ibm.com> Tested-by: Ravi Bangoria <ravi.bangoria@amd.com> Tested-by: Kajol jain <kjain@linux.ibm.com> Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Cc: james.clark@arm.com Cc: will@kernel.org Cc: leo.yan@linaro.org Cc: mike.leach@linaro.org Cc: renyu.zj@linux.alibaba.com Cc: yuhaixin.yhx@linux.alibaba.com Cc: tmricht@linux.ibm.com Cc: atrajeev@linux.vnet.ibm.com Cc: linux-arm-kernel@lists.infradead.org Cc: john.g.garry@oracle.com Link: https://lore.kernel.org/r/20240123185036.3461837-3-kan.liang@linux.intel.com Signed-off-by: Namhyung Kim <namhyung@kernel.org>
2024-01-23 18:50:31 +00:00
if (perf_pmu__mem_events_parse(pmu, str))
exit(-1);
perf c2c: Add record subcommand Adding c2c record subcommand. It setups options related to HITM cacheline analysis and calls standard perf record command. $ sudo perf c2c record -v -- -a calling: record -W -d --sample-cpu -e cpu/mem-loads,ldlat=30/P -e cpu/mem-stores/P -a ... It produces perf.data, which is to be reported by perf c2c report, that comes in following patches. Details are described in the man page, which is added in one of the following patches. Committer notes: Testing it: # perf c2c record -a sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.050 MB perf.data (412 samples) ] # ls -la perf.data -rw-------. 1 root root 5301752 Oct 4 13:32 perf.data # perf evlist cpu/mem-loads,ldlat=30/P cpu/mem-stores/P # perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 # # perf report --stdio <SNIP> # Total Lost Samples: 14 # Samples: 216 of event 'cpu/mem-loads,ldlat=30/P' # Event count (approx.): 15207 # Overhead Symbol Shared Object # ........ ..................................... ............................ 10.32% [k] update_blocked_averages [kernel.vmlinux] 3.43% [.] 0x00000000001a2122 qemu-system-x86_64 (deleted) 2.52% [k] enqueue_entity [kernel.vmlinux] 1.88% [.] g_main_context_query libglib-2.0.so.0.4800.2 1.86% [k] __schedule [kernel.vmlinux] <SNIP> # Samples: 196 of event 'cpu/mem-stores/P' # Event count (approx.): 14771346 # Overhead Symbol Shared Object # ........ ................................... ............................ 13.91% [k] intel_idle [kernel.vmlinux] 3.02% [.] 0x00000000022f06ea chrome 2.94% [.] 0x00000000001a1b4c qemu-system-x86_64 (deleted) 2.94% [.] 0x000000000019d8e4 qemu-system-x86_64 (deleted) 2.38% [.] 0x00000000001a1c52 qemu-system-x86_64 (deleted) <SNIP> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1474558645-19956-12-git-send-email-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-22 15:36:39 +00:00
*event_set = true;
return 0;
perf c2c: Add record subcommand Adding c2c record subcommand. It setups options related to HITM cacheline analysis and calls standard perf record command. $ sudo perf c2c record -v -- -a calling: record -W -d --sample-cpu -e cpu/mem-loads,ldlat=30/P -e cpu/mem-stores/P -a ... It produces perf.data, which is to be reported by perf c2c report, that comes in following patches. Details are described in the man page, which is added in one of the following patches. Committer notes: Testing it: # perf c2c record -a sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.050 MB perf.data (412 samples) ] # ls -la perf.data -rw-------. 1 root root 5301752 Oct 4 13:32 perf.data # perf evlist cpu/mem-loads,ldlat=30/P cpu/mem-stores/P # perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 # # perf report --stdio <SNIP> # Total Lost Samples: 14 # Samples: 216 of event 'cpu/mem-loads,ldlat=30/P' # Event count (approx.): 15207 # Overhead Symbol Shared Object # ........ ..................................... ............................ 10.32% [k] update_blocked_averages [kernel.vmlinux] 3.43% [.] 0x00000000001a2122 qemu-system-x86_64 (deleted) 2.52% [k] enqueue_entity [kernel.vmlinux] 1.88% [.] g_main_context_query libglib-2.0.so.0.4800.2 1.86% [k] __schedule [kernel.vmlinux] <SNIP> # Samples: 196 of event 'cpu/mem-stores/P' # Event count (approx.): 14771346 # Overhead Symbol Shared Object # ........ ................................... ............................ 13.91% [k] intel_idle [kernel.vmlinux] 3.02% [.] 0x00000000022f06ea chrome 2.94% [.] 0x00000000001a1b4c qemu-system-x86_64 (deleted) 2.94% [.] 0x000000000019d8e4 qemu-system-x86_64 (deleted) 2.38% [.] 0x00000000001a1c52 qemu-system-x86_64 (deleted) <SNIP> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1474558645-19956-12-git-send-email-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-22 15:36:39 +00:00
}
static const char * const __usage_record[] = {
"perf c2c record [<options>] [<command>]",
"perf c2c record [<options>] -- <command> [<options>]",
NULL
};
static const char * const *record_mem_usage = __usage_record;
static int perf_c2c__record(int argc, const char **argv)
{
int rec_argc, i = 0, j;
perf c2c: Add record subcommand Adding c2c record subcommand. It setups options related to HITM cacheline analysis and calls standard perf record command. $ sudo perf c2c record -v -- -a calling: record -W -d --sample-cpu -e cpu/mem-loads,ldlat=30/P -e cpu/mem-stores/P -a ... It produces perf.data, which is to be reported by perf c2c report, that comes in following patches. Details are described in the man page, which is added in one of the following patches. Committer notes: Testing it: # perf c2c record -a sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.050 MB perf.data (412 samples) ] # ls -la perf.data -rw-------. 1 root root 5301752 Oct 4 13:32 perf.data # perf evlist cpu/mem-loads,ldlat=30/P cpu/mem-stores/P # perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 # # perf report --stdio <SNIP> # Total Lost Samples: 14 # Samples: 216 of event 'cpu/mem-loads,ldlat=30/P' # Event count (approx.): 15207 # Overhead Symbol Shared Object # ........ ..................................... ............................ 10.32% [k] update_blocked_averages [kernel.vmlinux] 3.43% [.] 0x00000000001a2122 qemu-system-x86_64 (deleted) 2.52% [k] enqueue_entity [kernel.vmlinux] 1.88% [.] g_main_context_query libglib-2.0.so.0.4800.2 1.86% [k] __schedule [kernel.vmlinux] <SNIP> # Samples: 196 of event 'cpu/mem-stores/P' # Event count (approx.): 14771346 # Overhead Symbol Shared Object # ........ ................................... ............................ 13.91% [k] intel_idle [kernel.vmlinux] 3.02% [.] 0x00000000022f06ea chrome 2.94% [.] 0x00000000001a1b4c qemu-system-x86_64 (deleted) 2.94% [.] 0x000000000019d8e4 qemu-system-x86_64 (deleted) 2.38% [.] 0x00000000001a1c52 qemu-system-x86_64 (deleted) <SNIP> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1474558645-19956-12-git-send-email-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-22 15:36:39 +00:00
const char **rec_argv;
int ret;
bool all_user = false, all_kernel = false;
bool event_set = false;
struct perf_mem_event *e;
perf mem: Clean up perf_mem_events__ptr() The mem_events can be retrieved from the struct perf_pmu now. An ARCH specific perf_mem_events__ptr() is not required anymore. Remove all of them. The Intel hybrid has multiple mem-events-supported PMUs. But they share the same mem_events. Other ARCHs only support one mem-events-supported PMU. In the configuration, it's good enough to only configure the mem_events for one PMU. Add perf_mem_events_find_pmu() which returns the first mem-events-supported PMU. In the perf_mem_events__init(), the perf_pmus__scan() is not required anymore. It avoids checking the sysfs for every PMU on the system. Make the perf_mem_events__record_args() more generic. Remove the perf_mem_events__print_unsupport_hybrid(). Since pmu is added as a new parameter, rename perf_mem_events__ptr() to perf_pmu__mem_events_ptr(). Several other functions also do a similar rename. Reviewed-by: Ian Rogers <irogers@google.com> Reviewed-by: Kajol Jain <kjain@linux.ibm.com> Tested-by: Ravi Bangoria <ravi.bangoria@amd.com> Tested-by: Kajol jain <kjain@linux.ibm.com> Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Cc: james.clark@arm.com Cc: will@kernel.org Cc: leo.yan@linaro.org Cc: mike.leach@linaro.org Cc: renyu.zj@linux.alibaba.com Cc: yuhaixin.yhx@linux.alibaba.com Cc: tmricht@linux.ibm.com Cc: atrajeev@linux.vnet.ibm.com Cc: linux-arm-kernel@lists.infradead.org Cc: john.g.garry@oracle.com Link: https://lore.kernel.org/r/20240123185036.3461837-3-kan.liang@linux.intel.com Signed-off-by: Namhyung Kim <namhyung@kernel.org>
2024-01-23 18:50:31 +00:00
struct perf_pmu *pmu;
perf c2c: Add record subcommand Adding c2c record subcommand. It setups options related to HITM cacheline analysis and calls standard perf record command. $ sudo perf c2c record -v -- -a calling: record -W -d --sample-cpu -e cpu/mem-loads,ldlat=30/P -e cpu/mem-stores/P -a ... It produces perf.data, which is to be reported by perf c2c report, that comes in following patches. Details are described in the man page, which is added in one of the following patches. Committer notes: Testing it: # perf c2c record -a sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.050 MB perf.data (412 samples) ] # ls -la perf.data -rw-------. 1 root root 5301752 Oct 4 13:32 perf.data # perf evlist cpu/mem-loads,ldlat=30/P cpu/mem-stores/P # perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 # # perf report --stdio <SNIP> # Total Lost Samples: 14 # Samples: 216 of event 'cpu/mem-loads,ldlat=30/P' # Event count (approx.): 15207 # Overhead Symbol Shared Object # ........ ..................................... ............................ 10.32% [k] update_blocked_averages [kernel.vmlinux] 3.43% [.] 0x00000000001a2122 qemu-system-x86_64 (deleted) 2.52% [k] enqueue_entity [kernel.vmlinux] 1.88% [.] g_main_context_query libglib-2.0.so.0.4800.2 1.86% [k] __schedule [kernel.vmlinux] <SNIP> # Samples: 196 of event 'cpu/mem-stores/P' # Event count (approx.): 14771346 # Overhead Symbol Shared Object # ........ ................................... ............................ 13.91% [k] intel_idle [kernel.vmlinux] 3.02% [.] 0x00000000022f06ea chrome 2.94% [.] 0x00000000001a1b4c qemu-system-x86_64 (deleted) 2.94% [.] 0x000000000019d8e4 qemu-system-x86_64 (deleted) 2.38% [.] 0x00000000001a1c52 qemu-system-x86_64 (deleted) <SNIP> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1474558645-19956-12-git-send-email-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-22 15:36:39 +00:00
struct option options[] = {
OPT_CALLBACK('e', "event", &event_set, "event",
"event selector. Use 'perf c2c record -e list' to list available events",
perf c2c: Add record subcommand Adding c2c record subcommand. It setups options related to HITM cacheline analysis and calls standard perf record command. $ sudo perf c2c record -v -- -a calling: record -W -d --sample-cpu -e cpu/mem-loads,ldlat=30/P -e cpu/mem-stores/P -a ... It produces perf.data, which is to be reported by perf c2c report, that comes in following patches. Details are described in the man page, which is added in one of the following patches. Committer notes: Testing it: # perf c2c record -a sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.050 MB perf.data (412 samples) ] # ls -la perf.data -rw-------. 1 root root 5301752 Oct 4 13:32 perf.data # perf evlist cpu/mem-loads,ldlat=30/P cpu/mem-stores/P # perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 # # perf report --stdio <SNIP> # Total Lost Samples: 14 # Samples: 216 of event 'cpu/mem-loads,ldlat=30/P' # Event count (approx.): 15207 # Overhead Symbol Shared Object # ........ ..................................... ............................ 10.32% [k] update_blocked_averages [kernel.vmlinux] 3.43% [.] 0x00000000001a2122 qemu-system-x86_64 (deleted) 2.52% [k] enqueue_entity [kernel.vmlinux] 1.88% [.] g_main_context_query libglib-2.0.so.0.4800.2 1.86% [k] __schedule [kernel.vmlinux] <SNIP> # Samples: 196 of event 'cpu/mem-stores/P' # Event count (approx.): 14771346 # Overhead Symbol Shared Object # ........ ................................... ............................ 13.91% [k] intel_idle [kernel.vmlinux] 3.02% [.] 0x00000000022f06ea chrome 2.94% [.] 0x00000000001a1b4c qemu-system-x86_64 (deleted) 2.94% [.] 0x000000000019d8e4 qemu-system-x86_64 (deleted) 2.38% [.] 0x00000000001a1c52 qemu-system-x86_64 (deleted) <SNIP> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1474558645-19956-12-git-send-email-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-22 15:36:39 +00:00
parse_record_events),
OPT_BOOLEAN('u', "all-user", &all_user, "collect only user level data"),
OPT_BOOLEAN('k', "all-kernel", &all_kernel, "collect only kernel level data"),
OPT_UINTEGER('l', "ldlat", &perf_mem_events__loads_ldlat, "setup mem-loads latency"),
OPT_PARENT(c2c_options),
perf c2c: Add record subcommand Adding c2c record subcommand. It setups options related to HITM cacheline analysis and calls standard perf record command. $ sudo perf c2c record -v -- -a calling: record -W -d --sample-cpu -e cpu/mem-loads,ldlat=30/P -e cpu/mem-stores/P -a ... It produces perf.data, which is to be reported by perf c2c report, that comes in following patches. Details are described in the man page, which is added in one of the following patches. Committer notes: Testing it: # perf c2c record -a sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.050 MB perf.data (412 samples) ] # ls -la perf.data -rw-------. 1 root root 5301752 Oct 4 13:32 perf.data # perf evlist cpu/mem-loads,ldlat=30/P cpu/mem-stores/P # perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 # # perf report --stdio <SNIP> # Total Lost Samples: 14 # Samples: 216 of event 'cpu/mem-loads,ldlat=30/P' # Event count (approx.): 15207 # Overhead Symbol Shared Object # ........ ..................................... ............................ 10.32% [k] update_blocked_averages [kernel.vmlinux] 3.43% [.] 0x00000000001a2122 qemu-system-x86_64 (deleted) 2.52% [k] enqueue_entity [kernel.vmlinux] 1.88% [.] g_main_context_query libglib-2.0.so.0.4800.2 1.86% [k] __schedule [kernel.vmlinux] <SNIP> # Samples: 196 of event 'cpu/mem-stores/P' # Event count (approx.): 14771346 # Overhead Symbol Shared Object # ........ ................................... ............................ 13.91% [k] intel_idle [kernel.vmlinux] 3.02% [.] 0x00000000022f06ea chrome 2.94% [.] 0x00000000001a1b4c qemu-system-x86_64 (deleted) 2.94% [.] 0x000000000019d8e4 qemu-system-x86_64 (deleted) 2.38% [.] 0x00000000001a1c52 qemu-system-x86_64 (deleted) <SNIP> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1474558645-19956-12-git-send-email-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-22 15:36:39 +00:00
OPT_END()
};
perf mem: Clean up perf_mem_events__ptr() The mem_events can be retrieved from the struct perf_pmu now. An ARCH specific perf_mem_events__ptr() is not required anymore. Remove all of them. The Intel hybrid has multiple mem-events-supported PMUs. But they share the same mem_events. Other ARCHs only support one mem-events-supported PMU. In the configuration, it's good enough to only configure the mem_events for one PMU. Add perf_mem_events_find_pmu() which returns the first mem-events-supported PMU. In the perf_mem_events__init(), the perf_pmus__scan() is not required anymore. It avoids checking the sysfs for every PMU on the system. Make the perf_mem_events__record_args() more generic. Remove the perf_mem_events__print_unsupport_hybrid(). Since pmu is added as a new parameter, rename perf_mem_events__ptr() to perf_pmu__mem_events_ptr(). Several other functions also do a similar rename. Reviewed-by: Ian Rogers <irogers@google.com> Reviewed-by: Kajol Jain <kjain@linux.ibm.com> Tested-by: Ravi Bangoria <ravi.bangoria@amd.com> Tested-by: Kajol jain <kjain@linux.ibm.com> Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Cc: james.clark@arm.com Cc: will@kernel.org Cc: leo.yan@linaro.org Cc: mike.leach@linaro.org Cc: renyu.zj@linux.alibaba.com Cc: yuhaixin.yhx@linux.alibaba.com Cc: tmricht@linux.ibm.com Cc: atrajeev@linux.vnet.ibm.com Cc: linux-arm-kernel@lists.infradead.org Cc: john.g.garry@oracle.com Link: https://lore.kernel.org/r/20240123185036.3461837-3-kan.liang@linux.intel.com Signed-off-by: Namhyung Kim <namhyung@kernel.org>
2024-01-23 18:50:31 +00:00
pmu = perf_mem_events_find_pmu();
if (!pmu) {
pr_err("failed: no PMU supports the memory events\n");
return -1;
}
if (perf_pmu__mem_events_init()) {
perf c2c: Add record subcommand Adding c2c record subcommand. It setups options related to HITM cacheline analysis and calls standard perf record command. $ sudo perf c2c record -v -- -a calling: record -W -d --sample-cpu -e cpu/mem-loads,ldlat=30/P -e cpu/mem-stores/P -a ... It produces perf.data, which is to be reported by perf c2c report, that comes in following patches. Details are described in the man page, which is added in one of the following patches. Committer notes: Testing it: # perf c2c record -a sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.050 MB perf.data (412 samples) ] # ls -la perf.data -rw-------. 1 root root 5301752 Oct 4 13:32 perf.data # perf evlist cpu/mem-loads,ldlat=30/P cpu/mem-stores/P # perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 # # perf report --stdio <SNIP> # Total Lost Samples: 14 # Samples: 216 of event 'cpu/mem-loads,ldlat=30/P' # Event count (approx.): 15207 # Overhead Symbol Shared Object # ........ ..................................... ............................ 10.32% [k] update_blocked_averages [kernel.vmlinux] 3.43% [.] 0x00000000001a2122 qemu-system-x86_64 (deleted) 2.52% [k] enqueue_entity [kernel.vmlinux] 1.88% [.] g_main_context_query libglib-2.0.so.0.4800.2 1.86% [k] __schedule [kernel.vmlinux] <SNIP> # Samples: 196 of event 'cpu/mem-stores/P' # Event count (approx.): 14771346 # Overhead Symbol Shared Object # ........ ................................... ............................ 13.91% [k] intel_idle [kernel.vmlinux] 3.02% [.] 0x00000000022f06ea chrome 2.94% [.] 0x00000000001a1b4c qemu-system-x86_64 (deleted) 2.94% [.] 0x000000000019d8e4 qemu-system-x86_64 (deleted) 2.38% [.] 0x00000000001a1c52 qemu-system-x86_64 (deleted) <SNIP> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1474558645-19956-12-git-send-email-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-22 15:36:39 +00:00
pr_err("failed: memory events not supported\n");
return -1;
}
argc = parse_options(argc, argv, options, record_mem_usage,
PARSE_OPT_KEEP_UNKNOWN);
perf mem: Avoid hybrid PMU list Add perf_pmu__num_mem_pmus that scans/counts the number of PMUs for mem events. Switch perf_pmu__for_each_hybrid_pmu to iterating all PMUs and only handling is_core ones. Reviewed-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Ali Saidi <alisaidi@amazon.com> Cc: Athira Rajeev <atrajeev@linux.vnet.ibm.com> Cc: Dmitrii Dolgov <9erthalion6@gmail.com> Cc: Huacai Chen <chenhuacai@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@arm.com> Cc: Jing Zhang <renyu.zj@linux.alibaba.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.g.garry@oracle.com> Cc: Kajol Jain <kjain@linux.ibm.com> Cc: Kang Minchul <tegongkang@gmail.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Madhavan Srinivasan <maddy@linux.ibm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Ming Wang <wangming01@loongson.cn> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ravi Bangoria <ravi.bangoria@amd.com> Cc: Rob Herring <robh@kernel.org> Cc: Sandipan Das <sandipan.das@amd.com> Cc: Sean Christopherson <seanjc@google.com> Cc: Suzuki Poulouse <suzuki.poulose@arm.com> Cc: Thomas Richter <tmricht@linux.ibm.com> Cc: Will Deacon <will@kernel.org> Cc: Xing Zhengjun <zhengjun.xing@linux.intel.com> Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20230527072210.2900565-24-irogers@google.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2023-05-27 07:21:59 +00:00
/* Max number of arguments multiplied by number of PMUs that can support them. */
rec_argc = argc + 11 * (perf_pmu__mem_events_num_mem_pmus(pmu) + 1);
perf c2c: Add record subcommand Adding c2c record subcommand. It setups options related to HITM cacheline analysis and calls standard perf record command. $ sudo perf c2c record -v -- -a calling: record -W -d --sample-cpu -e cpu/mem-loads,ldlat=30/P -e cpu/mem-stores/P -a ... It produces perf.data, which is to be reported by perf c2c report, that comes in following patches. Details are described in the man page, which is added in one of the following patches. Committer notes: Testing it: # perf c2c record -a sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.050 MB perf.data (412 samples) ] # ls -la perf.data -rw-------. 1 root root 5301752 Oct 4 13:32 perf.data # perf evlist cpu/mem-loads,ldlat=30/P cpu/mem-stores/P # perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 # # perf report --stdio <SNIP> # Total Lost Samples: 14 # Samples: 216 of event 'cpu/mem-loads,ldlat=30/P' # Event count (approx.): 15207 # Overhead Symbol Shared Object # ........ ..................................... ............................ 10.32% [k] update_blocked_averages [kernel.vmlinux] 3.43% [.] 0x00000000001a2122 qemu-system-x86_64 (deleted) 2.52% [k] enqueue_entity [kernel.vmlinux] 1.88% [.] g_main_context_query libglib-2.0.so.0.4800.2 1.86% [k] __schedule [kernel.vmlinux] <SNIP> # Samples: 196 of event 'cpu/mem-stores/P' # Event count (approx.): 14771346 # Overhead Symbol Shared Object # ........ ................................... ............................ 13.91% [k] intel_idle [kernel.vmlinux] 3.02% [.] 0x00000000022f06ea chrome 2.94% [.] 0x00000000001a1b4c qemu-system-x86_64 (deleted) 2.94% [.] 0x000000000019d8e4 qemu-system-x86_64 (deleted) 2.38% [.] 0x00000000001a1c52 qemu-system-x86_64 (deleted) <SNIP> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1474558645-19956-12-git-send-email-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-22 15:36:39 +00:00
rec_argv = calloc(rec_argc + 1, sizeof(char *));
if (!rec_argv)
return -1;
rec_argv[i++] = "record";
if (!event_set) {
perf mem: Clean up perf_mem_events__ptr() The mem_events can be retrieved from the struct perf_pmu now. An ARCH specific perf_mem_events__ptr() is not required anymore. Remove all of them. The Intel hybrid has multiple mem-events-supported PMUs. But they share the same mem_events. Other ARCHs only support one mem-events-supported PMU. In the configuration, it's good enough to only configure the mem_events for one PMU. Add perf_mem_events_find_pmu() which returns the first mem-events-supported PMU. In the perf_mem_events__init(), the perf_pmus__scan() is not required anymore. It avoids checking the sysfs for every PMU on the system. Make the perf_mem_events__record_args() more generic. Remove the perf_mem_events__print_unsupport_hybrid(). Since pmu is added as a new parameter, rename perf_mem_events__ptr() to perf_pmu__mem_events_ptr(). Several other functions also do a similar rename. Reviewed-by: Ian Rogers <irogers@google.com> Reviewed-by: Kajol Jain <kjain@linux.ibm.com> Tested-by: Ravi Bangoria <ravi.bangoria@amd.com> Tested-by: Kajol jain <kjain@linux.ibm.com> Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Cc: james.clark@arm.com Cc: will@kernel.org Cc: leo.yan@linaro.org Cc: mike.leach@linaro.org Cc: renyu.zj@linux.alibaba.com Cc: yuhaixin.yhx@linux.alibaba.com Cc: tmricht@linux.ibm.com Cc: atrajeev@linux.vnet.ibm.com Cc: linux-arm-kernel@lists.infradead.org Cc: john.g.garry@oracle.com Link: https://lore.kernel.org/r/20240123185036.3461837-3-kan.liang@linux.intel.com Signed-off-by: Namhyung Kim <namhyung@kernel.org>
2024-01-23 18:50:31 +00:00
e = perf_pmu__mem_events_ptr(pmu, PERF_MEM_EVENTS__LOAD_STORE);
/*
* The load and store operations are required, use the event
* PERF_MEM_EVENTS__LOAD_STORE if it is supported.
*/
if (e->tag) {
perf mem: Fix missed p-core mem events on ADL and RPL The p-core mem events are missed when launching 'perf mem record' on ADL and RPL. root@number:~# perf mem record sleep 1 Memory events are enabled on a subset of CPUs: 16-27 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.032 MB perf.data ] root@number:~# perf evlist cpu_atom/mem-loads,ldlat=30/P cpu_atom/mem-stores/P dummy:u A variable 'record' in the 'struct perf_mem_event' is to indicate whether a mem event in a mem_events[] should be recorded. The current code only configure the variable for the first eligible PMU. It's good enough for a non-hybrid machine or a hybrid machine which has the same mem_events[]. However, if a different mem_events[] is used for different PMUs on a hybrid machine, e.g., ADL or RPL, the 'record' for the second PMU never get a chance to be set. The mem_events[] of the second PMU are always ignored. 'perf mem' doesn't support the per-PMU configuration now. A per-PMU mem_events[] 'record' variable doesn't make sense. Make it global. That could also avoid searching for the per-PMU mem_events[] via perf_pmu__mem_events_ptr every time. Committer testing: root@number:~# perf evlist -g cpu_atom/mem-loads,ldlat=30/P cpu_atom/mem-stores/P {cpu_core/mem-loads-aux/,cpu_core/mem-loads,ldlat=30/} cpu_core/mem-stores/P dummy:u root@number:~# The :S for '{cpu_core/mem-loads-aux/,cpu_core/mem-loads,ldlat=30/}' is not being added by 'perf evlist -g', to be checked. Fixes: abbdd79b786e036e ("perf mem: Clean up perf_mem_events__name()") Reported-by: Arnaldo Carvalho de Melo <acme@kernel.org> Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Ian Rogers <irogers@google.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Namhyung Kim <namhyung@kernel.org> Closes: https://lore.kernel.org/lkml/Zthu81fA3kLC2CS2@x1/ Link: https://lore.kernel.org/r/20240905170737.4070743-2-kan.liang@linux.intel.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2024-09-05 17:07:36 +00:00
perf_mem_record[PERF_MEM_EVENTS__LOAD_STORE] = true;
rec_argv[i++] = "-W";
} else {
perf mem: Fix missed p-core mem events on ADL and RPL The p-core mem events are missed when launching 'perf mem record' on ADL and RPL. root@number:~# perf mem record sleep 1 Memory events are enabled on a subset of CPUs: 16-27 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.032 MB perf.data ] root@number:~# perf evlist cpu_atom/mem-loads,ldlat=30/P cpu_atom/mem-stores/P dummy:u A variable 'record' in the 'struct perf_mem_event' is to indicate whether a mem event in a mem_events[] should be recorded. The current code only configure the variable for the first eligible PMU. It's good enough for a non-hybrid machine or a hybrid machine which has the same mem_events[]. However, if a different mem_events[] is used for different PMUs on a hybrid machine, e.g., ADL or RPL, the 'record' for the second PMU never get a chance to be set. The mem_events[] of the second PMU are always ignored. 'perf mem' doesn't support the per-PMU configuration now. A per-PMU mem_events[] 'record' variable doesn't make sense. Make it global. That could also avoid searching for the per-PMU mem_events[] via perf_pmu__mem_events_ptr every time. Committer testing: root@number:~# perf evlist -g cpu_atom/mem-loads,ldlat=30/P cpu_atom/mem-stores/P {cpu_core/mem-loads-aux/,cpu_core/mem-loads,ldlat=30/} cpu_core/mem-stores/P dummy:u root@number:~# The :S for '{cpu_core/mem-loads-aux/,cpu_core/mem-loads,ldlat=30/}' is not being added by 'perf evlist -g', to be checked. Fixes: abbdd79b786e036e ("perf mem: Clean up perf_mem_events__name()") Reported-by: Arnaldo Carvalho de Melo <acme@kernel.org> Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Ian Rogers <irogers@google.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Namhyung Kim <namhyung@kernel.org> Closes: https://lore.kernel.org/lkml/Zthu81fA3kLC2CS2@x1/ Link: https://lore.kernel.org/r/20240905170737.4070743-2-kan.liang@linux.intel.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2024-09-05 17:07:36 +00:00
perf_mem_record[PERF_MEM_EVENTS__LOAD] = true;
perf_mem_record[PERF_MEM_EVENTS__STORE] = true;
}
perf c2c: Add record subcommand Adding c2c record subcommand. It setups options related to HITM cacheline analysis and calls standard perf record command. $ sudo perf c2c record -v -- -a calling: record -W -d --sample-cpu -e cpu/mem-loads,ldlat=30/P -e cpu/mem-stores/P -a ... It produces perf.data, which is to be reported by perf c2c report, that comes in following patches. Details are described in the man page, which is added in one of the following patches. Committer notes: Testing it: # perf c2c record -a sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.050 MB perf.data (412 samples) ] # ls -la perf.data -rw-------. 1 root root 5301752 Oct 4 13:32 perf.data # perf evlist cpu/mem-loads,ldlat=30/P cpu/mem-stores/P # perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 # # perf report --stdio <SNIP> # Total Lost Samples: 14 # Samples: 216 of event 'cpu/mem-loads,ldlat=30/P' # Event count (approx.): 15207 # Overhead Symbol Shared Object # ........ ..................................... ............................ 10.32% [k] update_blocked_averages [kernel.vmlinux] 3.43% [.] 0x00000000001a2122 qemu-system-x86_64 (deleted) 2.52% [k] enqueue_entity [kernel.vmlinux] 1.88% [.] g_main_context_query libglib-2.0.so.0.4800.2 1.86% [k] __schedule [kernel.vmlinux] <SNIP> # Samples: 196 of event 'cpu/mem-stores/P' # Event count (approx.): 14771346 # Overhead Symbol Shared Object # ........ ................................... ............................ 13.91% [k] intel_idle [kernel.vmlinux] 3.02% [.] 0x00000000022f06ea chrome 2.94% [.] 0x00000000001a1b4c qemu-system-x86_64 (deleted) 2.94% [.] 0x000000000019d8e4 qemu-system-x86_64 (deleted) 2.38% [.] 0x00000000001a1c52 qemu-system-x86_64 (deleted) <SNIP> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1474558645-19956-12-git-send-email-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-22 15:36:39 +00:00
}
perf mem: Fix missed p-core mem events on ADL and RPL The p-core mem events are missed when launching 'perf mem record' on ADL and RPL. root@number:~# perf mem record sleep 1 Memory events are enabled on a subset of CPUs: 16-27 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.032 MB perf.data ] root@number:~# perf evlist cpu_atom/mem-loads,ldlat=30/P cpu_atom/mem-stores/P dummy:u A variable 'record' in the 'struct perf_mem_event' is to indicate whether a mem event in a mem_events[] should be recorded. The current code only configure the variable for the first eligible PMU. It's good enough for a non-hybrid machine or a hybrid machine which has the same mem_events[]. However, if a different mem_events[] is used for different PMUs on a hybrid machine, e.g., ADL or RPL, the 'record' for the second PMU never get a chance to be set. The mem_events[] of the second PMU are always ignored. 'perf mem' doesn't support the per-PMU configuration now. A per-PMU mem_events[] 'record' variable doesn't make sense. Make it global. That could also avoid searching for the per-PMU mem_events[] via perf_pmu__mem_events_ptr every time. Committer testing: root@number:~# perf evlist -g cpu_atom/mem-loads,ldlat=30/P cpu_atom/mem-stores/P {cpu_core/mem-loads-aux/,cpu_core/mem-loads,ldlat=30/} cpu_core/mem-stores/P dummy:u root@number:~# The :S for '{cpu_core/mem-loads-aux/,cpu_core/mem-loads,ldlat=30/}' is not being added by 'perf evlist -g', to be checked. Fixes: abbdd79b786e036e ("perf mem: Clean up perf_mem_events__name()") Reported-by: Arnaldo Carvalho de Melo <acme@kernel.org> Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Ian Rogers <irogers@google.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Namhyung Kim <namhyung@kernel.org> Closes: https://lore.kernel.org/lkml/Zthu81fA3kLC2CS2@x1/ Link: https://lore.kernel.org/r/20240905170737.4070743-2-kan.liang@linux.intel.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2024-09-05 17:07:36 +00:00
if (perf_mem_record[PERF_MEM_EVENTS__LOAD])
perf c2c: Add record subcommand Adding c2c record subcommand. It setups options related to HITM cacheline analysis and calls standard perf record command. $ sudo perf c2c record -v -- -a calling: record -W -d --sample-cpu -e cpu/mem-loads,ldlat=30/P -e cpu/mem-stores/P -a ... It produces perf.data, which is to be reported by perf c2c report, that comes in following patches. Details are described in the man page, which is added in one of the following patches. Committer notes: Testing it: # perf c2c record -a sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.050 MB perf.data (412 samples) ] # ls -la perf.data -rw-------. 1 root root 5301752 Oct 4 13:32 perf.data # perf evlist cpu/mem-loads,ldlat=30/P cpu/mem-stores/P # perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 # # perf report --stdio <SNIP> # Total Lost Samples: 14 # Samples: 216 of event 'cpu/mem-loads,ldlat=30/P' # Event count (approx.): 15207 # Overhead Symbol Shared Object # ........ ..................................... ............................ 10.32% [k] update_blocked_averages [kernel.vmlinux] 3.43% [.] 0x00000000001a2122 qemu-system-x86_64 (deleted) 2.52% [k] enqueue_entity [kernel.vmlinux] 1.88% [.] g_main_context_query libglib-2.0.so.0.4800.2 1.86% [k] __schedule [kernel.vmlinux] <SNIP> # Samples: 196 of event 'cpu/mem-stores/P' # Event count (approx.): 14771346 # Overhead Symbol Shared Object # ........ ................................... ............................ 13.91% [k] intel_idle [kernel.vmlinux] 3.02% [.] 0x00000000022f06ea chrome 2.94% [.] 0x00000000001a1b4c qemu-system-x86_64 (deleted) 2.94% [.] 0x000000000019d8e4 qemu-system-x86_64 (deleted) 2.38% [.] 0x00000000001a1c52 qemu-system-x86_64 (deleted) <SNIP> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1474558645-19956-12-git-send-email-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-22 15:36:39 +00:00
rec_argv[i++] = "-W";
rec_argv[i++] = "-d";
rec_argv[i++] = "--phys-data";
perf c2c: Add record subcommand Adding c2c record subcommand. It setups options related to HITM cacheline analysis and calls standard perf record command. $ sudo perf c2c record -v -- -a calling: record -W -d --sample-cpu -e cpu/mem-loads,ldlat=30/P -e cpu/mem-stores/P -a ... It produces perf.data, which is to be reported by perf c2c report, that comes in following patches. Details are described in the man page, which is added in one of the following patches. Committer notes: Testing it: # perf c2c record -a sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.050 MB perf.data (412 samples) ] # ls -la perf.data -rw-------. 1 root root 5301752 Oct 4 13:32 perf.data # perf evlist cpu/mem-loads,ldlat=30/P cpu/mem-stores/P # perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 # # perf report --stdio <SNIP> # Total Lost Samples: 14 # Samples: 216 of event 'cpu/mem-loads,ldlat=30/P' # Event count (approx.): 15207 # Overhead Symbol Shared Object # ........ ..................................... ............................ 10.32% [k] update_blocked_averages [kernel.vmlinux] 3.43% [.] 0x00000000001a2122 qemu-system-x86_64 (deleted) 2.52% [k] enqueue_entity [kernel.vmlinux] 1.88% [.] g_main_context_query libglib-2.0.so.0.4800.2 1.86% [k] __schedule [kernel.vmlinux] <SNIP> # Samples: 196 of event 'cpu/mem-stores/P' # Event count (approx.): 14771346 # Overhead Symbol Shared Object # ........ ................................... ............................ 13.91% [k] intel_idle [kernel.vmlinux] 3.02% [.] 0x00000000022f06ea chrome 2.94% [.] 0x00000000001a1b4c qemu-system-x86_64 (deleted) 2.94% [.] 0x000000000019d8e4 qemu-system-x86_64 (deleted) 2.38% [.] 0x00000000001a1c52 qemu-system-x86_64 (deleted) <SNIP> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1474558645-19956-12-git-send-email-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-22 15:36:39 +00:00
rec_argv[i++] = "--sample-cpu";
ret = perf_mem_events__record_args(rec_argv, &i);
if (ret)
goto out;
perf c2c: Add record subcommand Adding c2c record subcommand. It setups options related to HITM cacheline analysis and calls standard perf record command. $ sudo perf c2c record -v -- -a calling: record -W -d --sample-cpu -e cpu/mem-loads,ldlat=30/P -e cpu/mem-stores/P -a ... It produces perf.data, which is to be reported by perf c2c report, that comes in following patches. Details are described in the man page, which is added in one of the following patches. Committer notes: Testing it: # perf c2c record -a sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.050 MB perf.data (412 samples) ] # ls -la perf.data -rw-------. 1 root root 5301752 Oct 4 13:32 perf.data # perf evlist cpu/mem-loads,ldlat=30/P cpu/mem-stores/P # perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 # # perf report --stdio <SNIP> # Total Lost Samples: 14 # Samples: 216 of event 'cpu/mem-loads,ldlat=30/P' # Event count (approx.): 15207 # Overhead Symbol Shared Object # ........ ..................................... ............................ 10.32% [k] update_blocked_averages [kernel.vmlinux] 3.43% [.] 0x00000000001a2122 qemu-system-x86_64 (deleted) 2.52% [k] enqueue_entity [kernel.vmlinux] 1.88% [.] g_main_context_query libglib-2.0.so.0.4800.2 1.86% [k] __schedule [kernel.vmlinux] <SNIP> # Samples: 196 of event 'cpu/mem-stores/P' # Event count (approx.): 14771346 # Overhead Symbol Shared Object # ........ ................................... ............................ 13.91% [k] intel_idle [kernel.vmlinux] 3.02% [.] 0x00000000022f06ea chrome 2.94% [.] 0x00000000001a1b4c qemu-system-x86_64 (deleted) 2.94% [.] 0x000000000019d8e4 qemu-system-x86_64 (deleted) 2.38% [.] 0x00000000001a1c52 qemu-system-x86_64 (deleted) <SNIP> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1474558645-19956-12-git-send-email-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-22 15:36:39 +00:00
if (all_user)
rec_argv[i++] = "--all-user";
if (all_kernel)
rec_argv[i++] = "--all-kernel";
for (j = 0; j < argc; j++, i++)
rec_argv[i] = argv[j];
if (verbose > 0) {
pr_debug("calling: ");
j = 0;
while (rec_argv[j]) {
pr_debug("%s ", rec_argv[j]);
j++;
}
pr_debug("\n");
}
ret = cmd_record(i, rec_argv);
out:
perf c2c: Add record subcommand Adding c2c record subcommand. It setups options related to HITM cacheline analysis and calls standard perf record command. $ sudo perf c2c record -v -- -a calling: record -W -d --sample-cpu -e cpu/mem-loads,ldlat=30/P -e cpu/mem-stores/P -a ... It produces perf.data, which is to be reported by perf c2c report, that comes in following patches. Details are described in the man page, which is added in one of the following patches. Committer notes: Testing it: # perf c2c record -a sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.050 MB perf.data (412 samples) ] # ls -la perf.data -rw-------. 1 root root 5301752 Oct 4 13:32 perf.data # perf evlist cpu/mem-loads,ldlat=30/P cpu/mem-stores/P # perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 # # perf report --stdio <SNIP> # Total Lost Samples: 14 # Samples: 216 of event 'cpu/mem-loads,ldlat=30/P' # Event count (approx.): 15207 # Overhead Symbol Shared Object # ........ ..................................... ............................ 10.32% [k] update_blocked_averages [kernel.vmlinux] 3.43% [.] 0x00000000001a2122 qemu-system-x86_64 (deleted) 2.52% [k] enqueue_entity [kernel.vmlinux] 1.88% [.] g_main_context_query libglib-2.0.so.0.4800.2 1.86% [k] __schedule [kernel.vmlinux] <SNIP> # Samples: 196 of event 'cpu/mem-stores/P' # Event count (approx.): 14771346 # Overhead Symbol Shared Object # ........ ................................... ............................ 13.91% [k] intel_idle [kernel.vmlinux] 3.02% [.] 0x00000000022f06ea chrome 2.94% [.] 0x00000000001a1b4c qemu-system-x86_64 (deleted) 2.94% [.] 0x000000000019d8e4 qemu-system-x86_64 (deleted) 2.38% [.] 0x00000000001a1c52 qemu-system-x86_64 (deleted) <SNIP> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1474558645-19956-12-git-send-email-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-22 15:36:39 +00:00
free(rec_argv);
return ret;
}
int cmd_c2c(int argc, const char **argv)
{
argc = parse_options(argc, argv, c2c_options, c2c_usage,
PARSE_OPT_STOP_AT_NON_OPTION);
perf c2c: Add record subcommand Adding c2c record subcommand. It setups options related to HITM cacheline analysis and calls standard perf record command. $ sudo perf c2c record -v -- -a calling: record -W -d --sample-cpu -e cpu/mem-loads,ldlat=30/P -e cpu/mem-stores/P -a ... It produces perf.data, which is to be reported by perf c2c report, that comes in following patches. Details are described in the man page, which is added in one of the following patches. Committer notes: Testing it: # perf c2c record -a sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.050 MB perf.data (412 samples) ] # ls -la perf.data -rw-------. 1 root root 5301752 Oct 4 13:32 perf.data # perf evlist cpu/mem-loads,ldlat=30/P cpu/mem-stores/P # perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 # # perf report --stdio <SNIP> # Total Lost Samples: 14 # Samples: 216 of event 'cpu/mem-loads,ldlat=30/P' # Event count (approx.): 15207 # Overhead Symbol Shared Object # ........ ..................................... ............................ 10.32% [k] update_blocked_averages [kernel.vmlinux] 3.43% [.] 0x00000000001a2122 qemu-system-x86_64 (deleted) 2.52% [k] enqueue_entity [kernel.vmlinux] 1.88% [.] g_main_context_query libglib-2.0.so.0.4800.2 1.86% [k] __schedule [kernel.vmlinux] <SNIP> # Samples: 196 of event 'cpu/mem-stores/P' # Event count (approx.): 14771346 # Overhead Symbol Shared Object # ........ ................................... ............................ 13.91% [k] intel_idle [kernel.vmlinux] 3.02% [.] 0x00000000022f06ea chrome 2.94% [.] 0x00000000001a1b4c qemu-system-x86_64 (deleted) 2.94% [.] 0x000000000019d8e4 qemu-system-x86_64 (deleted) 2.38% [.] 0x00000000001a1c52 qemu-system-x86_64 (deleted) <SNIP> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1474558645-19956-12-git-send-email-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-22 15:36:39 +00:00
if (!argc)
usage_with_options(c2c_usage, c2c_options);
perf tools: Enhance the matching of sub-commands abbreviations We support short command 'rec*' for 'record' and 'rep*' for 'report' in lots of sub-commands, but the matching is not quite strict currnetly. It may be puzzling sometime, like we mis-type a 'recport' to report but it will perform 'record' in fact without any message. To fix this, add a check to ensure that the short cmd is valid prefix of the real command. Committer testing: [root@quaco ~]# perf c2c re sleep 1 Usage: perf c2c {record|report} -v, --verbose be more verbose (show counter open errors, etc) # perf c2c rec sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.038 MB perf.data (16 samples) ] # perf c2c recport sleep 1 Usage: perf c2c {record|report} -v, --verbose be more verbose (show counter open errors, etc) # perf c2c record sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.038 MB perf.data (15 samples) ] # perf c2c records sleep 1 Usage: perf c2c {record|report} -v, --verbose be more verbose (show counter open errors, etc) # Signed-off-by: Wei Li <liwei391@huawei.com> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Hanjun Guo <guohanjun@huawei.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Rui Xiang <rui.xiang@huawei.com> Link: http://lore.kernel.org/lkml/20220325092032.2956161-1-liwei391@huawei.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-03-25 09:20:32 +00:00
if (strlen(argv[0]) > 2 && strstarts("record", argv[0])) {
perf c2c: Add record subcommand Adding c2c record subcommand. It setups options related to HITM cacheline analysis and calls standard perf record command. $ sudo perf c2c record -v -- -a calling: record -W -d --sample-cpu -e cpu/mem-loads,ldlat=30/P -e cpu/mem-stores/P -a ... It produces perf.data, which is to be reported by perf c2c report, that comes in following patches. Details are described in the man page, which is added in one of the following patches. Committer notes: Testing it: # perf c2c record -a sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.050 MB perf.data (412 samples) ] # ls -la perf.data -rw-------. 1 root root 5301752 Oct 4 13:32 perf.data # perf evlist cpu/mem-loads,ldlat=30/P cpu/mem-stores/P # perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 # # perf report --stdio <SNIP> # Total Lost Samples: 14 # Samples: 216 of event 'cpu/mem-loads,ldlat=30/P' # Event count (approx.): 15207 # Overhead Symbol Shared Object # ........ ..................................... ............................ 10.32% [k] update_blocked_averages [kernel.vmlinux] 3.43% [.] 0x00000000001a2122 qemu-system-x86_64 (deleted) 2.52% [k] enqueue_entity [kernel.vmlinux] 1.88% [.] g_main_context_query libglib-2.0.so.0.4800.2 1.86% [k] __schedule [kernel.vmlinux] <SNIP> # Samples: 196 of event 'cpu/mem-stores/P' # Event count (approx.): 14771346 # Overhead Symbol Shared Object # ........ ................................... ............................ 13.91% [k] intel_idle [kernel.vmlinux] 3.02% [.] 0x00000000022f06ea chrome 2.94% [.] 0x00000000001a1b4c qemu-system-x86_64 (deleted) 2.94% [.] 0x000000000019d8e4 qemu-system-x86_64 (deleted) 2.38% [.] 0x00000000001a1c52 qemu-system-x86_64 (deleted) <SNIP> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1474558645-19956-12-git-send-email-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-22 15:36:39 +00:00
return perf_c2c__record(argc, argv);
perf tools: Enhance the matching of sub-commands abbreviations We support short command 'rec*' for 'record' and 'rep*' for 'report' in lots of sub-commands, but the matching is not quite strict currnetly. It may be puzzling sometime, like we mis-type a 'recport' to report but it will perform 'record' in fact without any message. To fix this, add a check to ensure that the short cmd is valid prefix of the real command. Committer testing: [root@quaco ~]# perf c2c re sleep 1 Usage: perf c2c {record|report} -v, --verbose be more verbose (show counter open errors, etc) # perf c2c rec sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.038 MB perf.data (16 samples) ] # perf c2c recport sleep 1 Usage: perf c2c {record|report} -v, --verbose be more verbose (show counter open errors, etc) # perf c2c record sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.038 MB perf.data (15 samples) ] # perf c2c records sleep 1 Usage: perf c2c {record|report} -v, --verbose be more verbose (show counter open errors, etc) # Signed-off-by: Wei Li <liwei391@huawei.com> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Hanjun Guo <guohanjun@huawei.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Rui Xiang <rui.xiang@huawei.com> Link: http://lore.kernel.org/lkml/20220325092032.2956161-1-liwei391@huawei.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-03-25 09:20:32 +00:00
} else if (strlen(argv[0]) > 2 && strstarts("report", argv[0])) {
return perf_c2c__report(argc, argv);
perf c2c: Add record subcommand Adding c2c record subcommand. It setups options related to HITM cacheline analysis and calls standard perf record command. $ sudo perf c2c record -v -- -a calling: record -W -d --sample-cpu -e cpu/mem-loads,ldlat=30/P -e cpu/mem-stores/P -a ... It produces perf.data, which is to be reported by perf c2c report, that comes in following patches. Details are described in the man page, which is added in one of the following patches. Committer notes: Testing it: # perf c2c record -a sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 5.050 MB perf.data (412 samples) ] # ls -la perf.data -rw-------. 1 root root 5301752 Oct 4 13:32 perf.data # perf evlist cpu/mem-loads,ldlat=30/P cpu/mem-stores/P # perf evlist -v cpu/mem-loads,ldlat=30/P: type: 4, size: 112, config: 0x1cd, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3, mmap_data: 1, sample_id_all: 1, mmap2: 1, comm_exec: 1, { bp_addr, config1 }: 0x1f cpu/mem-stores/P: type: 4, size: 112, config: 0x82d0, { sample_period, sample_freq }: 4000, sample_type: IP|TID|TIME|ADDR|ID|CPU|PERIOD|DATA_SRC|WEIGHT, read_format: ID, disabled: 1, inherit: 1, freq: 1, precise_ip: 3, sample_id_all: 1 # # perf report --stdio <SNIP> # Total Lost Samples: 14 # Samples: 216 of event 'cpu/mem-loads,ldlat=30/P' # Event count (approx.): 15207 # Overhead Symbol Shared Object # ........ ..................................... ............................ 10.32% [k] update_blocked_averages [kernel.vmlinux] 3.43% [.] 0x00000000001a2122 qemu-system-x86_64 (deleted) 2.52% [k] enqueue_entity [kernel.vmlinux] 1.88% [.] g_main_context_query libglib-2.0.so.0.4800.2 1.86% [k] __schedule [kernel.vmlinux] <SNIP> # Samples: 196 of event 'cpu/mem-stores/P' # Event count (approx.): 14771346 # Overhead Symbol Shared Object # ........ ................................... ............................ 13.91% [k] intel_idle [kernel.vmlinux] 3.02% [.] 0x00000000022f06ea chrome 2.94% [.] 0x00000000001a1b4c qemu-system-x86_64 (deleted) 2.94% [.] 0x000000000019d8e4 qemu-system-x86_64 (deleted) 2.38% [.] 0x00000000001a1c52 qemu-system-x86_64 (deleted) <SNIP> Signed-off-by: Jiri Olsa <jolsa@kernel.org> Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Joe Mario <jmario@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/1474558645-19956-12-git-send-email-jolsa@kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2016-09-22 15:36:39 +00:00
} else {
usage_with_options(c2c_usage, c2c_options);
}
return 0;
}