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mfd: intel_soc_pmic_bxtwc: Use IRQ domain for PMIC devices
While design wise the idea of converting the driver to use
the hierarchy of the IRQ chips is correct, the implementation
has (inherited) flaws. This was unveiled when platform_get_irq()
had started WARN() on IRQ 0 that is supposed to be a Linux
IRQ number (also known as vIRQ).
Rework the driver to respect IRQ domain when creating each MFD
device separately, as the domain is not the same for all of them.
Fixes: 57129044f5
("mfd: intel_soc_pmic_bxtwc: Use chained IRQs for second level IRQ chips")
Tested-by: Zhang Ning <zhangn1985@outlook.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20241005193029.1929139-4-andriy.shevchenko@linux.intel.com
Signed-off-by: Lee Jones <lee@kernel.org>
This commit is contained in:
parent
9b79d59e6b
commit
0350d783ab
@ -230,21 +230,11 @@ static const struct resource tmu_resources[] = {
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};
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static struct mfd_cell bxt_wc_dev[] = {
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{
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.name = "bxt_wcove_gpadc",
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.num_resources = ARRAY_SIZE(adc_resources),
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.resources = adc_resources,
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},
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{
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.name = "bxt_wcove_thermal",
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.num_resources = ARRAY_SIZE(thermal_resources),
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.resources = thermal_resources,
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},
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{
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.name = "bxt_wcove_bcu",
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.num_resources = ARRAY_SIZE(bcu_resources),
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.resources = bcu_resources,
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},
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{
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.name = "bxt_wcove_gpio",
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.num_resources = ARRAY_SIZE(gpio_resources),
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@ -263,6 +253,22 @@ static const struct mfd_cell bxt_wc_tmu_dev[] = {
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},
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};
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static const struct mfd_cell bxt_wc_bcu_dev[] = {
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{
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.name = "bxt_wcove_bcu",
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.num_resources = ARRAY_SIZE(bcu_resources),
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.resources = bcu_resources,
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},
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};
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static const struct mfd_cell bxt_wc_adc_dev[] = {
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{
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.name = "bxt_wcove_gpadc",
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.num_resources = ARRAY_SIZE(adc_resources),
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.resources = adc_resources,
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},
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};
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static struct mfd_cell bxt_wc_chgr_dev[] = {
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{
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.name = "bxt_wcove_usbc",
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@ -508,23 +514,23 @@ static int bxtwc_probe(struct platform_device *pdev)
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if (ret)
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return dev_err_probe(dev, ret, "Failed to add PWRBTN IRQ chip\n");
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/* Add chained IRQ handler for BCU IRQs */
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ret = bxtwc_add_chained_irq_chip(pmic, pmic->irq_chip_data,
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BXTWC_BCU_LVL1_IRQ,
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IRQF_ONESHOT,
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&bxtwc_regmap_irq_chip_bcu,
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&pmic->irq_chip_data_bcu);
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ret = bxtwc_add_chained_devices(pmic, bxt_wc_bcu_dev, ARRAY_SIZE(bxt_wc_bcu_dev),
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pmic->irq_chip_data,
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BXTWC_BCU_LVL1_IRQ,
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IRQF_ONESHOT,
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&bxtwc_regmap_irq_chip_bcu,
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&pmic->irq_chip_data_bcu);
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if (ret)
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return dev_err_probe(dev, ret, "Failed to add BUC IRQ chip\n");
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return ret;
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/* Add chained IRQ handler for ADC IRQs */
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ret = bxtwc_add_chained_irq_chip(pmic, pmic->irq_chip_data,
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BXTWC_ADC_LVL1_IRQ,
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IRQF_ONESHOT,
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&bxtwc_regmap_irq_chip_adc,
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&pmic->irq_chip_data_adc);
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ret = bxtwc_add_chained_devices(pmic, bxt_wc_adc_dev, ARRAY_SIZE(bxt_wc_adc_dev),
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pmic->irq_chip_data,
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BXTWC_ADC_LVL1_IRQ,
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IRQF_ONESHOT,
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&bxtwc_regmap_irq_chip_adc,
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&pmic->irq_chip_data_adc);
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if (ret)
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return dev_err_probe(dev, ret, "Failed to add ADC IRQ chip\n");
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return ret;
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ret = bxtwc_add_chained_devices(pmic, bxt_wc_chgr_dev, ARRAY_SIZE(bxt_wc_chgr_dev),
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pmic->irq_chip_data,
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