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[MIPS] TX3927: Try to glue the PCI code.

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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle 2005-11-15 13:55:06 +00:00
parent 561a079240
commit 09b696efd9
1 changed files with 43 additions and 71 deletions
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114
arch/mips/pci/ops-tx3927.c
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@ -72,13 +72,9 @@ static inline int check_abort(void)
static int jmr3927_pci_read_config(struct pci_bus *bus, unsigned int devfn, static int jmr3927_pci_read_config(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 * val) int where, int size, u32 * val)
{ {
int ret, busno; int ret;
/* check if the bus is top-level */ ret = mkaddr(bus->number, devfn, where);
if (bus->parent != NULL)
busno = bus->number;
ret = mkaddr(busno, devfn, where);
if (ret) if (ret)
return ret; return ret;
@ -102,15 +98,9 @@ static int jmr3927_pci_read_config(struct pci_bus *bus, unsigned int devfn,
static int jmr3927_pci_write_config(struct pci_bus *bus, unsigned int devfn, static int jmr3927_pci_write_config(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 val) int where, int size, u32 val)
{ {
int ret, busno; int ret;
/* check if the bus is top-level */ ret = mkaddr(bus->number, devfn, where);
if (bus->parent != NULL)
bus = bus->number;
else
bus = 0;
ret = mkaddr(busno, devfn, where);
if (ret) if (ret)
return ret; return ret;
@ -120,7 +110,7 @@ static int jmr3927_pci_write_config(struct pci_bus *bus, unsigned int devfn,
break; break;
case 2: case 2:
*(volatile u16 *) (unsigned longulong) & tx3927_pcicptr->icd | (where & 2)) = *(volatile u16 *) ((unsigned long) & tx3927_pcicptr->icd | (where & 2)) =
cpu_to_le16(val); cpu_to_le16(val);
break; break;
@ -137,8 +127,8 @@ static int jmr3927_pci_write_config(struct pci_bus *bus, unsigned int devfn,
} }
struct pci_ops jmr3927_pci_ops = { struct pci_ops jmr3927_pci_ops = {
jmr3927_pcibios_read_config, jmr3927_pci_read_config,
jmr3927_pcibios_write_config, jmr3927_pci_write_config,
}; };
@ -159,15 +149,14 @@ unsigned long tc_readl(volatile __u32 * addr)
{ {
unsigned long val; unsigned long val;
addr = PHYSADDR(addr); *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
*(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr = (unsigned long) CPHYSADDR(addr);
(unsigned long) addr; *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
*(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe =
(PCI_IPCIBE_ICMD_MEMREAD << PCI_IPCIBE_ICMD_SHIFT) | (PCI_IPCIBE_ICMD_MEMREAD << PCI_IPCIBE_ICMD_SHIFT) |
PCI_IPCIBE_IBE_LONG; PCI_IPCIBE_IBE_LONG;
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC)); while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
val = val =
le32_to_cpu(*(volatile u32 *) (ulong) & tx3927_pcicptr-> le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr->
ipcidata); ipcidata);
/* clear by setting */ /* clear by setting */
tx3927_pcicptr->istat |= PCI_ISTAT_IDICC; tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
@ -176,12 +165,11 @@ unsigned long tc_readl(volatile __u32 * addr)
void tc_writel(unsigned long data, volatile __u32 * addr) void tc_writel(unsigned long data, volatile __u32 * addr)
{ {
addr = PHYSADDR(addr); *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata =
*(volatile u32 *) (ulong) & tx3927_pcicptr->ipcidata =
cpu_to_le32(data); cpu_to_le32(data);
*(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr = *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
(unsigned long) addr; (unsigned long) CPHYSADDR(addr);
*(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe = *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
(PCI_IPCIBE_ICMD_MEMWRITE << PCI_IPCIBE_ICMD_SHIFT) | (PCI_IPCIBE_ICMD_MEMWRITE << PCI_IPCIBE_ICMD_SHIFT) |
PCI_IPCIBE_IBE_LONG; PCI_IPCIBE_IBE_LONG;
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC)); while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
@ -198,21 +186,15 @@ unsigned char tx_ioinb(unsigned char *addr)
ioaddr = (unsigned long) addr; ioaddr = (unsigned long) addr;
offset = ioaddr & 0x3; offset = ioaddr & 0x3;
if (offset == 0) byte = 0xf & ~(8 >> offset);
byte = 0x7;
else if (offset == 1) *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
byte = 0xb;
else if (offset == 2)
byte = 0xd;
else if (offset == 3)
byte = 0xe;
*(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
(unsigned long) ioaddr; (unsigned long) ioaddr;
*(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe = *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
(PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) | byte; (PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) | byte;
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC)); while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
val = val =
le32_to_cpu(*(volatile u32 *) (ulong) & tx3927_pcicptr-> le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr->
ipcidata); ipcidata);
val = val & 0xff; val = val & 0xff;
/* clear by setting */ /* clear by setting */
@ -229,18 +211,12 @@ void tx_iooutb(unsigned long data, unsigned char *addr)
data = data | (data << 8) | (data << 16) | (data << 24); data = data | (data << 8) | (data << 16) | (data << 24);
ioaddr = (unsigned long) addr; ioaddr = (unsigned long) addr;
offset = ioaddr & 0x3; offset = ioaddr & 0x3;
if (offset == 0) byte = 0xf & ~(8 >> offset);
byte = 0x7;
else if (offset == 1) *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata = data;
byte = 0xb; *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
else if (offset == 2)
byte = 0xd;
else if (offset == 3)
byte = 0xe;
*(volatile u32 *) (ulong) & tx3927_pcicptr->ipcidata = data;
*(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
(unsigned long) ioaddr; (unsigned long) ioaddr;
*(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe = *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
(PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) | byte; (PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) | byte;
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC)); while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
/* clear by setting */ /* clear by setting */
@ -255,18 +231,16 @@ unsigned short tx_ioinw(unsigned short *addr)
int byte; int byte;
ioaddr = (unsigned long) addr; ioaddr = (unsigned long) addr;
offset = ioaddr & 0x3; offset = ioaddr & 0x2;
if (offset == 0) byte = 3 << offset;
byte = 0x3;
else if (offset == 2) *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
byte = 0xc;
*(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
(unsigned long) ioaddr; (unsigned long) ioaddr;
*(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe = *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
(PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) | byte; (PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) | byte;
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC)); while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
val = val =
le32_to_cpu(*(volatile u32 *) (ulong) & tx3927_pcicptr-> le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr->
ipcidata); ipcidata);
val = val & 0xffff; val = val & 0xffff;
/* clear by setting */ /* clear by setting */
@ -283,15 +257,13 @@ void tx_iooutw(unsigned long data, unsigned short *addr)
data = data | (data << 16); data = data | (data << 16);
ioaddr = (unsigned long) addr; ioaddr = (unsigned long) addr;
offset = ioaddr & 0x3; offset = ioaddr & 0x2;
if (offset == 0) byte = 3 << offset;
byte = 0x3;
else if (offset == 2) *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata = data;
byte = 0xc; *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
*(volatile u32 *) (ulong) & tx3927_pcicptr->ipcidata = data;
*(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr =
(unsigned long) ioaddr; (unsigned long) ioaddr;
*(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe = *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
(PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) | byte; (PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) | byte;
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC)); while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
/* clear by setting */ /* clear by setting */
@ -304,14 +276,14 @@ unsigned long tx_ioinl(unsigned int *addr)
__u32 ioaddr; __u32 ioaddr;
ioaddr = (unsigned long) addr; ioaddr = (unsigned long) addr;
*(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr = *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
(unsigned long) ioaddr; (unsigned long) ioaddr;
*(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe = *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
(PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) | (PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) |
PCI_IPCIBE_IBE_LONG; PCI_IPCIBE_IBE_LONG;
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC)); while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
val = val =
le32_to_cpu(*(volatile u32 *) (ulong) & tx3927_pcicptr-> le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr->
ipcidata); ipcidata);
/* clear by setting */ /* clear by setting */
tx3927_pcicptr->istat |= PCI_ISTAT_IDICC; tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
@ -323,11 +295,11 @@ void tx_iooutl(unsigned long data, unsigned int *addr)
__u32 ioaddr; __u32 ioaddr;
ioaddr = (unsigned long) addr; ioaddr = (unsigned long) addr;
*(volatile u32 *) (ulong) & tx3927_pcicptr->ipcidata = *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata =
cpu_to_le32(data); cpu_to_le32(data);
*(volatile u32 *) (ulong) & tx3927_pcicptr->ipciaddr = *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
(unsigned long) ioaddr; (unsigned long) ioaddr;
*(volatile u32 *) (ulong) & tx3927_pcicptr->ipcibe = *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
(PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) | (PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) |
PCI_IPCIBE_IBE_LONG; PCI_IPCIBE_IBE_LONG;
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC)); while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));