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dt-bindings: clock: Add Loongson-2K expand clock index

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In the new Loongson-2K family of SoCs, more clock indexes are needed,
such as clock gates.
The patch adds these clock indexes

Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/76844e0e4dae290425f7c8025f7f36810cb3a3a8.1712731524.git.zhoubinbin@loongson.cn
Acked-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Binbin Zhou 2024-04-11 10:58:06 +08:00 committed by Stephen Boyd
parent 4cece76496
commit 0b1bfd15f3
1 changed files with 35 additions and 19 deletions
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54
include/dt-bindings/clock/loongson,ls2k-clk.h
View File

@ -7,24 +7,40 @@
#ifndef __DT_BINDINGS_CLOCK_LOONGSON2_H
#define __DT_BINDINGS_CLOCK_LOONGSON2_H
#define LOONGSON2_REF_100M 0
#define LOONGSON2_NODE_PLL 1
#define LOONGSON2_DDR_PLL 2
#define LOONGSON2_DC_PLL 3
#define LOONGSON2_PIX0_PLL 4
#define LOONGSON2_PIX1_PLL 5
#define LOONGSON2_NODE_CLK 6
#define LOONGSON2_HDA_CLK 7
#define LOONGSON2_GPU_CLK 8
#define LOONGSON2_DDR_CLK 9
#define LOONGSON2_GMAC_CLK 10
#define LOONGSON2_DC_CLK 11
#define LOONGSON2_APB_CLK 12
#define LOONGSON2_USB_CLK 13
#define LOONGSON2_SATA_CLK 14
#define LOONGSON2_PIX0_CLK 15
#define LOONGSON2_PIX1_CLK 16
#define LOONGSON2_BOOT_CLK 17
#define LOONGSON2_CLK_END 18
#define LOONGSON2_REF_100M 0
#define LOONGSON2_NODE_PLL 1
#define LOONGSON2_DDR_PLL 2
#define LOONGSON2_DC_PLL 3
#define LOONGSON2_PIX0_PLL 4
#define LOONGSON2_PIX1_PLL 5
#define LOONGSON2_NODE_CLK 6
#define LOONGSON2_HDA_CLK 7
#define LOONGSON2_GPU_CLK 8
#define LOONGSON2_DDR_CLK 9
#define LOONGSON2_GMAC_CLK 10
#define LOONGSON2_DC_CLK 11
#define LOONGSON2_APB_CLK 12
#define LOONGSON2_USB_CLK 13
#define LOONGSON2_SATA_CLK 14
#define LOONGSON2_PIX0_CLK 15
#define LOONGSON2_PIX1_CLK 16
#define LOONGSON2_BOOT_CLK 17
#define LOONGSON2_OUT0_GATE 18
#define LOONGSON2_GMAC_GATE 19
#define LOONGSON2_RIO_GATE 20
#define LOONGSON2_DC_GATE 21
#define LOONGSON2_GPU_GATE 22
#define LOONGSON2_DDR_GATE 23
#define LOONGSON2_HDA_GATE 24
#define LOONGSON2_NODE_GATE 25
#define LOONGSON2_EMMC_GATE 26
#define LOONGSON2_PIX0_GATE 27
#define LOONGSON2_PIX1_GATE 28
#define LOONGSON2_OUT0_CLK 29
#define LOONGSON2_RIO_CLK 30
#define LOONGSON2_EMMC_CLK 31
#define LOONGSON2_DES_CLK 32
#define LOONGSON2_I2S_CLK 33
#define LOONGSON2_MISC_CLK 34
#endif