From 0682cfa3325fefe8a3cb1c02854135ee73b8ae16 Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Sat, 8 Jun 2024 17:55:15 +0200 Subject: [PATCH 01/87] dt-bindings: mfd: pm8008: Add reset gpio Describe the optional reset gpio (which may not be wired up). Reviewed-by: Krzysztof Kozlowski Reviewed-by: Stephen Boyd Reviewed-by: Linus Walleij Signed-off-by: Johan Hovold Link: https://lore.kernel.org/r/20240608155526.12996-2-johan+linaro@kernel.org Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml b/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml index 0c75d8bde568..e1e05921afb4 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml @@ -29,6 +29,9 @@ properties: description: Parent interrupt. + reset-gpios: + maxItems: 1 + "#interrupt-cells": const: 2 @@ -97,6 +100,7 @@ additionalProperties: false examples: - | + #include #include #include @@ -115,6 +119,8 @@ examples: interrupt-parent = <&tlmm>; interrupts = <32 IRQ_TYPE_EDGE_RISING>; + reset-gpios = <&tlmm 42 GPIO_ACTIVE_LOW>; + pm8008_gpios: gpio@c000 { compatible = "qcom,pm8008-gpio", "qcom,spmi-gpio"; reg = <0xc000>; From 6ad7f80b53251dbbca81e18a17cf6f8bcd34cb20 Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Sat, 8 Jun 2024 17:55:16 +0200 Subject: [PATCH 02/87] mfd: pm8008: Fix regmap irq chip initialisation The regmap irq array is potentially shared between multiple PMICs and should only contain static data. Use a custom macro to initialise also the type fields and drop the unnecessary updates on each probe. Fixes: 6b149f3310a4 ("mfd: pm8008: Add driver for QCOM PM8008 PMIC") Reviewed-by: Bryan O'Donoghue Signed-off-by: Johan Hovold Link: https://lore.kernel.org/r/20240608155526.12996-3-johan+linaro@kernel.org Signed-off-by: Lee Jones --- drivers/mfd/qcom-pm8008.c | 64 ++++++++++++++------------------------- 1 file changed, 23 insertions(+), 41 deletions(-) diff --git a/drivers/mfd/qcom-pm8008.c b/drivers/mfd/qcom-pm8008.c index 3ac3742f438b..f71c490f25c8 100644 --- a/drivers/mfd/qcom-pm8008.c +++ b/drivers/mfd/qcom-pm8008.c @@ -56,15 +56,25 @@ static unsigned int pm8008_config_regs[] = { INT_POL_LOW_OFFSET, }; -static struct regmap_irq pm8008_irqs[] = { - REGMAP_IRQ_REG(PM8008_IRQ_MISC_UVLO, PM8008_MISC, BIT(0)), - REGMAP_IRQ_REG(PM8008_IRQ_MISC_OVLO, PM8008_MISC, BIT(1)), - REGMAP_IRQ_REG(PM8008_IRQ_MISC_OTST2, PM8008_MISC, BIT(2)), - REGMAP_IRQ_REG(PM8008_IRQ_MISC_OTST3, PM8008_MISC, BIT(3)), - REGMAP_IRQ_REG(PM8008_IRQ_MISC_LDO_OCP, PM8008_MISC, BIT(4)), - REGMAP_IRQ_REG(PM8008_IRQ_TEMP_ALARM, PM8008_TEMP_ALARM, BIT(0)), - REGMAP_IRQ_REG(PM8008_IRQ_GPIO1, PM8008_GPIO1, BIT(0)), - REGMAP_IRQ_REG(PM8008_IRQ_GPIO2, PM8008_GPIO2, BIT(0)), +#define _IRQ(_irq, _off, _mask, _types) \ + [_irq] = { \ + .reg_offset = (_off), \ + .mask = (_mask), \ + .type = { \ + .type_reg_offset = (_off), \ + .types_supported = (_types), \ + }, \ + } + +static const struct regmap_irq pm8008_irqs[] = { + _IRQ(PM8008_IRQ_MISC_UVLO, PM8008_MISC, BIT(0), IRQ_TYPE_EDGE_RISING), + _IRQ(PM8008_IRQ_MISC_OVLO, PM8008_MISC, BIT(1), IRQ_TYPE_EDGE_RISING), + _IRQ(PM8008_IRQ_MISC_OTST2, PM8008_MISC, BIT(2), IRQ_TYPE_EDGE_RISING), + _IRQ(PM8008_IRQ_MISC_OTST3, PM8008_MISC, BIT(3), IRQ_TYPE_EDGE_RISING), + _IRQ(PM8008_IRQ_MISC_LDO_OCP, PM8008_MISC, BIT(4), IRQ_TYPE_EDGE_RISING), + _IRQ(PM8008_IRQ_TEMP_ALARM, PM8008_TEMP_ALARM,BIT(0), IRQ_TYPE_SENSE_MASK), + _IRQ(PM8008_IRQ_GPIO1, PM8008_GPIO1, BIT(0), IRQ_TYPE_SENSE_MASK), + _IRQ(PM8008_IRQ_GPIO2, PM8008_GPIO2, BIT(0), IRQ_TYPE_SENSE_MASK), }; static const unsigned int pm8008_periph_base[] = { @@ -143,38 +153,9 @@ static struct regmap_config qcom_mfd_regmap_cfg = { .max_register = 0xFFFF, }; -static int pm8008_probe_irq_peripherals(struct device *dev, - struct regmap *regmap, - int client_irq) -{ - int rc, i; - struct regmap_irq_type *type; - struct regmap_irq_chip_data *irq_data; - - for (i = 0; i < ARRAY_SIZE(pm8008_irqs); i++) { - type = &pm8008_irqs[i].type; - - type->type_reg_offset = pm8008_irqs[i].reg_offset; - - if (type->type_reg_offset == PM8008_MISC) - type->types_supported = IRQ_TYPE_EDGE_RISING; - else - type->types_supported = (IRQ_TYPE_EDGE_BOTH | - IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW); - } - - rc = devm_regmap_add_irq_chip(dev, regmap, client_irq, - IRQF_SHARED, 0, &pm8008_irq_chip, &irq_data); - if (rc) { - dev_err(dev, "Failed to add IRQ chip: %d\n", rc); - return rc; - } - - return 0; -} - static int pm8008_probe(struct i2c_client *client) { + struct regmap_irq_chip_data *irq_data; int rc; struct device *dev; struct regmap *regmap; @@ -187,9 +168,10 @@ static int pm8008_probe(struct i2c_client *client) i2c_set_clientdata(client, regmap); if (of_property_read_bool(dev->of_node, "interrupt-controller")) { - rc = pm8008_probe_irq_peripherals(dev, regmap, client->irq); + rc = devm_regmap_add_irq_chip(dev, regmap, client->irq, + IRQF_SHARED, 0, &pm8008_irq_chip, &irq_data); if (rc) - dev_err(dev, "Failed to probe irq periphs: %d\n", rc); + dev_err(dev, "failed to add IRQ chip: %d\n", rc); } return devm_of_platform_populate(dev); From c251befb097ef1ebb509d48bb3e1181b94fd4d2a Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Sat, 8 Jun 2024 17:55:17 +0200 Subject: [PATCH 03/87] mfd: pm8008: Deassert reset on probe Request and deassert any (optional) reset gpio during probe in case it has been left asserted by the boot firmware. Note the reset line is not asserted to avoid reverting to the default I2C address in case the firmware has configured an alternate address. Tested-by: Bryan O'Donoghue Reviewed-by: Linus Walleij Signed-off-by: Johan Hovold Link: https://lore.kernel.org/r/20240608155526.12996-4-johan+linaro@kernel.org Signed-off-by: Lee Jones --- drivers/mfd/qcom-pm8008.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/mfd/qcom-pm8008.c b/drivers/mfd/qcom-pm8008.c index f71c490f25c8..5a77155a63d7 100644 --- a/drivers/mfd/qcom-pm8008.c +++ b/drivers/mfd/qcom-pm8008.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -156,6 +157,7 @@ static struct regmap_config qcom_mfd_regmap_cfg = { static int pm8008_probe(struct i2c_client *client) { struct regmap_irq_chip_data *irq_data; + struct gpio_desc *reset; int rc; struct device *dev; struct regmap *regmap; @@ -167,6 +169,16 @@ static int pm8008_probe(struct i2c_client *client) i2c_set_clientdata(client, regmap); + reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); + if (IS_ERR(reset)) + return PTR_ERR(reset); + + /* + * The PMIC does not appear to require a post-reset delay, but wait + * for a millisecond for now anyway. + */ + usleep_range(1000, 2000); + if (of_property_read_bool(dev->of_node, "interrupt-controller")) { rc = devm_regmap_add_irq_chip(dev, regmap, client->irq, IRQF_SHARED, 0, &pm8008_irq_chip, &irq_data); From 742bdd99aa9acace13385b66c6f3946f26b109fe Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Sat, 8 Jun 2024 17:55:18 +0200 Subject: [PATCH 04/87] mfd: pm8008: Mark regmap structures as const The regmap irq chip structures can be const so mark them as such. Reviewed-by: Bryan O'Donoghue Reviewed-by: Stephen Boyd Signed-off-by: Johan Hovold Link: https://lore.kernel.org/r/20240608155526.12996-5-johan+linaro@kernel.org Signed-off-by: Lee Jones --- drivers/mfd/qcom-pm8008.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/qcom-pm8008.c b/drivers/mfd/qcom-pm8008.c index 5a77155a63d7..ab55d524c27b 100644 --- a/drivers/mfd/qcom-pm8008.c +++ b/drivers/mfd/qcom-pm8008.c @@ -51,7 +51,7 @@ enum { POLARITY_LO_INDEX, }; -static unsigned int pm8008_config_regs[] = { +static const unsigned int pm8008_config_regs[] = { INT_SET_TYPE_OFFSET, INT_POL_HIGH_OFFSET, INT_POL_LOW_OFFSET, @@ -129,7 +129,7 @@ static int pm8008_set_type_config(unsigned int **buf, unsigned int type, return 0; } -static struct regmap_irq_chip pm8008_irq_chip = { +static const struct regmap_irq_chip pm8008_irq_chip = { .name = "pm8008_irq", .main_status = I2C_INTR_STATUS_BASE, .num_main_regs = 1, From a4b3225f06e4f8fa7266236407ab7de34b66f044 Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Sat, 8 Jun 2024 17:55:19 +0200 Subject: [PATCH 05/87] mfd: pm8008: Use lower case hex notation Use lower case hex notation for consistency. Reviewed-by: Bryan O'Donoghue Reviewed-by: Stephen Boyd Signed-off-by: Johan Hovold Link: https://lore.kernel.org/r/20240608155526.12996-6-johan+linaro@kernel.org Signed-off-by: Lee Jones --- drivers/mfd/qcom-pm8008.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mfd/qcom-pm8008.c b/drivers/mfd/qcom-pm8008.c index ab55d524c27b..18173c7a7e7b 100644 --- a/drivers/mfd/qcom-pm8008.c +++ b/drivers/mfd/qcom-pm8008.c @@ -38,8 +38,8 @@ enum { #define PM8008_PERIPH_0_BASE 0x900 #define PM8008_PERIPH_1_BASE 0x2400 -#define PM8008_PERIPH_2_BASE 0xC000 -#define PM8008_PERIPH_3_BASE 0xC100 +#define PM8008_PERIPH_2_BASE 0xc000 +#define PM8008_PERIPH_3_BASE 0xc100 #define PM8008_TEMP_ALARM_ADDR PM8008_PERIPH_1_BASE #define PM8008_GPIO1_ADDR PM8008_PERIPH_2_BASE @@ -151,7 +151,7 @@ static const struct regmap_irq_chip pm8008_irq_chip = { static struct regmap_config qcom_mfd_regmap_cfg = { .reg_bits = 16, .val_bits = 8, - .max_register = 0xFFFF, + .max_register = 0xffff, }; static int pm8008_probe(struct i2c_client *client) From 3162cd961eba14fbb377d4f13c853c586cd5d063 Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Sat, 8 Jun 2024 17:55:20 +0200 Subject: [PATCH 06/87] mfd: pm8008: Rename irq chip Drop the redundant "irq" suffix from the irq chip name. Reviewed-by: Bryan O'Donoghue Reviewed-by: Stephen Boyd Signed-off-by: Johan Hovold Link: https://lore.kernel.org/r/20240608155526.12996-7-johan+linaro@kernel.org Signed-off-by: Lee Jones --- drivers/mfd/qcom-pm8008.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/qcom-pm8008.c b/drivers/mfd/qcom-pm8008.c index 18173c7a7e7b..bab17417aeec 100644 --- a/drivers/mfd/qcom-pm8008.c +++ b/drivers/mfd/qcom-pm8008.c @@ -130,7 +130,7 @@ static int pm8008_set_type_config(unsigned int **buf, unsigned int type, } static const struct regmap_irq_chip pm8008_irq_chip = { - .name = "pm8008_irq", + .name = "pm8008", .main_status = I2C_INTR_STATUS_BASE, .num_main_regs = 1, .irqs = pm8008_irqs, From 40ac32d19985836348313b7087c8f37232084c54 Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Sat, 8 Jun 2024 17:55:21 +0200 Subject: [PATCH 07/87] mfd: pm8008: Drop unused driver data The i2c client driver data pointer has never been used so drop the unnecessary assignment. Reviewed-by: Bryan O'Donoghue Reviewed-by: Stephen Boyd Signed-off-by: Johan Hovold Link: https://lore.kernel.org/r/20240608155526.12996-8-johan+linaro@kernel.org Signed-off-by: Lee Jones --- drivers/mfd/qcom-pm8008.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/mfd/qcom-pm8008.c b/drivers/mfd/qcom-pm8008.c index bab17417aeec..72199840231e 100644 --- a/drivers/mfd/qcom-pm8008.c +++ b/drivers/mfd/qcom-pm8008.c @@ -167,8 +167,6 @@ static int pm8008_probe(struct i2c_client *client) if (IS_ERR(regmap)) return PTR_ERR(regmap); - i2c_set_clientdata(client, regmap); - reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); if (IS_ERR(reset)) return PTR_ERR(reset); From 8643ef1213eeaf99ee529f35a6c2976ea1e316bc Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Sat, 8 Jun 2024 17:55:22 +0200 Subject: [PATCH 08/87] dt-bindings: mfd: pm8008: Drop redundant descriptions In preparation for reworking the binding, drop the redundant descriptions of the standard 'reg' and 'interrupts' properties. Reviewed-by: Rob Herring (Arm) Signed-off-by: Johan Hovold Link: https://lore.kernel.org/r/20240608155526.12996-9-johan+linaro@kernel.org Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml | 5 ----- 1 file changed, 5 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml b/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml index e1e05921afb4..d71657f488db 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml @@ -19,16 +19,11 @@ properties: const: qcom,pm8008 reg: - description: - I2C slave address. - maxItems: 1 interrupts: maxItems: 1 - description: Parent interrupt. - reset-gpios: maxItems: 1 From 8c72db5884a3c821de6ba9c387c8fe52e13e5a34 Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Sat, 8 Jun 2024 17:55:23 +0200 Subject: [PATCH 09/87] dt-bindings: mfd: pm8008: Rework binding Rework the pm8008 binding, which is currently unused, by dropping internal details like register offsets and interrupts and by adding the missing regulator and temperature alarm properties. Note that child nodes are still used for pinctrl and regulator configuration. Also note that the pinctrl state definition will be extended later and could eventually also be shared with other PMICs (e.g. by breaking out bits of qcom,pmic-gpio.yaml). Signed-off-by: Johan Hovold Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20240608155526.12996-10-johan+linaro@kernel.org Signed-off-by: Lee Jones --- .../devicetree/bindings/mfd/qcom,pm8008.yaml | 147 ++++++++++-------- 1 file changed, 86 insertions(+), 61 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml b/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml index d71657f488db..0c6e1870db1d 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml @@ -27,103 +27,128 @@ properties: reset-gpios: maxItems: 1 - "#interrupt-cells": + vdd-l1-l2-supply: true + vdd-l3-l4-supply: true + vdd-l5-supply: true + vdd-l6-supply: true + vdd-l7-supply: true + + gpio-controller: true + + "#gpio-cells": const: 2 - description: | - The first cell is the IRQ number, the second cell is the IRQ trigger - flag. All interrupts are listed in include/dt-bindings/mfd/qcom-pm8008.h. + gpio-ranges: + maxItems: 1 interrupt-controller: true - "#address-cells": - const: 1 + "#interrupt-cells": + const: 2 - "#size-cells": + "#thermal-sensor-cells": const: 0 -patternProperties: - "^gpio@[0-9a-f]+$": + pinctrl: type: object - - description: | - The GPIO peripheral. This node may be specified twice, one for each GPIO. - - properties: - compatible: - items: - - const: qcom,pm8008-gpio - - const: qcom,spmi-gpio - - reg: - description: Peripheral address of one of the two GPIO peripherals. - maxItems: 1 - - gpio-controller: true - - gpio-ranges: - maxItems: 1 - - interrupt-controller: true - - "#interrupt-cells": - const: 2 - - "#gpio-cells": - const: 2 - - required: - - compatible - - reg - - gpio-controller - - interrupt-controller - - "#gpio-cells" - - gpio-ranges - - "#interrupt-cells" - additionalProperties: false + patternProperties: + "-state$": + type: object + + allOf: + - $ref: /schemas/pinctrl/pinmux-node.yaml + - $ref: /schemas/pinctrl/pincfg-node.yaml + + properties: + pins: + items: + pattern: "^gpio[12]$" + + function: + items: + - enum: + - normal + + required: + - pins + - function + + additionalProperties: false + + regulators: + type: object + additionalProperties: false + patternProperties: + "^ldo[1-7]$": + type: object + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false required: - compatible - reg - interrupts - - "#address-cells" - - "#size-cells" + - vdd-l1-l2-supply + - vdd-l3-l4-supply + - vdd-l5-supply + - vdd-l6-supply + - vdd-l7-supply + - gpio-controller + - "#gpio-cells" + - gpio-ranges + - interrupt-controller - "#interrupt-cells" + - "#thermal-sensor-cells" additionalProperties: false examples: - | #include - #include #include i2c { #address-cells = <1>; #size-cells = <0>; - pmic@8 { + pm8008: pmic@8 { compatible = "qcom,pm8008"; reg = <0x8>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-controller; - #interrupt-cells = <2>; interrupt-parent = <&tlmm>; interrupts = <32 IRQ_TYPE_EDGE_RISING>; reset-gpios = <&tlmm 42 GPIO_ACTIVE_LOW>; - pm8008_gpios: gpio@c000 { - compatible = "qcom,pm8008-gpio", "qcom,spmi-gpio"; - reg = <0xc000>; - gpio-controller; - gpio-ranges = <&pm8008_gpios 0 0 2>; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; + vdd-l1-l2-supply = <&vreg_s8b_1p2>; + vdd-l3-l4-supply = <&vreg_s1b_1p8>; + vdd-l5-supply = <&vreg_bob>; + vdd-l6-supply = <&vreg_bob>; + vdd-l7-supply = <&vreg_bob>; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pm8008 0 0 2>; + + interrupt-controller; + #interrupt-cells = <2>; + + #thermal-sensor-cells = <0>; + + pinctrl { + gpio-keys-state { + pins = "gpio1"; + function = "normal"; + }; + }; + + regulators { + ldo1 { + regulator-name = "vreg_l1"; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1300000>; + }; }; }; }; From 288b550463cf5dd21ad34f736b8c5ccb7ff69ceb Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Sat, 8 Jun 2024 17:55:24 +0200 Subject: [PATCH 10/87] mfd: pm8008: Rework to match new DT binding Rework the pm8008 driver to match the new devicetree binding which no longer describes internal details like interrupts and register offsets (including which of the two consecutive I2C addresses the registers belong to). Instead make the interrupt controller implementation internal and pass interrupts to the subdrivers using MFD cell resources. Note that subdrivers may either get their resources, like register block offsets, from the parent MFD or this can be included in the subdrivers directly. In the current implementation, the temperature alarm driver is generic enough to just get its base address and alarm interrupt from the parent driver, which already uses this information to implement the interrupt controller. The regulator driver, however, needs additional information like parent supplies and regulator characteristics so in that case it is easier to just augment its table with the regulator register base addresses. Similarly, the current GPIO driver already holds the number of pins and that lookup table can therefore also be extended with register offsets. Note that subdrivers can now access the two regmaps by name, even if the primary regmap is registered last so that it is returned by default when no name is provided in lookups. Finally, note that the temperature alarm and GPIO subdrivers need some minor rework before they can be used with non-SPMI devices like the PM8008. The temperature alarm MFD cell name specifically uses a "qpnp" rather than "spmi" prefix to prevent binding until the driver has been updated. Tested-by: Bryan O'Donoghue Signed-off-by: Johan Hovold Link: https://lore.kernel.org/r/20240608155526.12996-11-johan+linaro@kernel.org Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 1 + drivers/mfd/qcom-pm8008.c | 97 +++++++++++++++++++++++---- include/dt-bindings/mfd/qcom-pm8008.h | 19 ------ 3 files changed, 86 insertions(+), 31 deletions(-) delete mode 100644 include/dt-bindings/mfd/qcom-pm8008.h diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 266b4f54af60..6b220dfea0a4 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -2208,6 +2208,7 @@ config MFD_ACER_A500_EC config MFD_QCOM_PM8008 tristate "QCOM PM8008 Power Management IC" depends on I2C && OF + select MFD_CORE select REGMAP_I2C select REGMAP_IRQ help diff --git a/drivers/mfd/qcom-pm8008.c b/drivers/mfd/qcom-pm8008.c index 72199840231e..246b5fe9819d 100644 --- a/drivers/mfd/qcom-pm8008.c +++ b/drivers/mfd/qcom-pm8008.c @@ -7,8 +7,10 @@ #include #include #include +#include #include #include +#include #include #include #include @@ -16,8 +18,6 @@ #include #include -#include - #define I2C_INTR_STATUS_BASE 0x0550 #define INT_RT_STS_OFFSET 0x10 #define INT_SET_TYPE_OFFSET 0x11 @@ -45,6 +45,16 @@ enum { #define PM8008_GPIO1_ADDR PM8008_PERIPH_2_BASE #define PM8008_GPIO2_ADDR PM8008_PERIPH_3_BASE +/* PM8008 IRQ numbers */ +#define PM8008_IRQ_MISC_UVLO 0 +#define PM8008_IRQ_MISC_OVLO 1 +#define PM8008_IRQ_MISC_OTST2 2 +#define PM8008_IRQ_MISC_OTST3 3 +#define PM8008_IRQ_MISC_LDO_OCP 4 +#define PM8008_IRQ_TEMP_ALARM 5 +#define PM8008_IRQ_GPIO1 6 +#define PM8008_IRQ_GPIO2 7 + enum { SET_TYPE_INDEX, POLARITY_HI_INDEX, @@ -148,21 +158,65 @@ static const struct regmap_irq_chip pm8008_irq_chip = { .get_irq_reg = pm8008_get_irq_reg, }; -static struct regmap_config qcom_mfd_regmap_cfg = { +static const struct regmap_config qcom_mfd_regmap_cfg = { + .name = "primary", .reg_bits = 16, .val_bits = 8, .max_register = 0xffff, }; +static const struct regmap_config pm8008_regmap_cfg_2 = { + .name = "secondary", + .reg_bits = 16, + .val_bits = 8, + .max_register = 0xffff, +}; + +static const struct resource pm8008_temp_res[] = { + DEFINE_RES_MEM(PM8008_TEMP_ALARM_ADDR, 0x100), + DEFINE_RES_IRQ(PM8008_IRQ_TEMP_ALARM), +}; + +static const struct mfd_cell pm8008_cells[] = { + MFD_CELL_NAME("pm8008-regulator"), + MFD_CELL_RES("qpnp-temp-alarm", pm8008_temp_res), + MFD_CELL_NAME("pm8008-gpio"), +}; + +static void devm_irq_domain_fwnode_release(void *data) +{ + struct fwnode_handle *fwnode = data; + + irq_domain_free_fwnode(fwnode); +} + static int pm8008_probe(struct i2c_client *client) { struct regmap_irq_chip_data *irq_data; + struct device *dev = &client->dev; + struct regmap *regmap, *regmap2; + struct fwnode_handle *fwnode; + struct i2c_client *dummy; struct gpio_desc *reset; - int rc; - struct device *dev; - struct regmap *regmap; + char *name; + int ret; - dev = &client->dev; + dummy = devm_i2c_new_dummy_device(dev, client->adapter, client->addr + 1); + if (IS_ERR(dummy)) { + ret = PTR_ERR(dummy); + dev_err(dev, "failed to claim second address: %d\n", ret); + return ret; + } + + regmap2 = devm_regmap_init_i2c(dummy, &qcom_mfd_regmap_cfg); + if (IS_ERR(regmap2)) + return PTR_ERR(regmap2); + + ret = regmap_attach_dev(dev, regmap2, &pm8008_regmap_cfg_2); + if (ret) + return ret; + + /* Default regmap must be attached last. */ regmap = devm_regmap_init_i2c(client, &qcom_mfd_regmap_cfg); if (IS_ERR(regmap)) return PTR_ERR(regmap); @@ -177,14 +231,33 @@ static int pm8008_probe(struct i2c_client *client) */ usleep_range(1000, 2000); - if (of_property_read_bool(dev->of_node, "interrupt-controller")) { - rc = devm_regmap_add_irq_chip(dev, regmap, client->irq, + name = devm_kasprintf(dev, GFP_KERNEL, "%pOF-internal", dev->of_node); + if (!name) + return -ENOMEM; + + name = strreplace(name, '/', ':'); + + fwnode = irq_domain_alloc_named_fwnode(name); + if (!fwnode) + return -ENOMEM; + + ret = devm_add_action_or_reset(dev, devm_irq_domain_fwnode_release, fwnode); + if (ret) + return ret; + + ret = devm_regmap_add_irq_chip_fwnode(dev, fwnode, regmap, client->irq, IRQF_SHARED, 0, &pm8008_irq_chip, &irq_data); - if (rc) - dev_err(dev, "failed to add IRQ chip: %d\n", rc); + if (ret) { + dev_err(dev, "failed to add IRQ chip: %d\n", ret); + return ret; } - return devm_of_platform_populate(dev); + /* Needed by GPIO driver. */ + dev_set_drvdata(dev, regmap_irq_get_domain(irq_data)); + + return devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, pm8008_cells, + ARRAY_SIZE(pm8008_cells), NULL, 0, + regmap_irq_get_domain(irq_data)); } static const struct of_device_id pm8008_match[] = { diff --git a/include/dt-bindings/mfd/qcom-pm8008.h b/include/dt-bindings/mfd/qcom-pm8008.h deleted file mode 100644 index eca9448df228..000000000000 --- a/include/dt-bindings/mfd/qcom-pm8008.h +++ /dev/null @@ -1,19 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2021 The Linux Foundation. All rights reserved. - */ - -#ifndef __DT_BINDINGS_MFD_QCOM_PM8008_H -#define __DT_BINDINGS_MFD_QCOM_PM8008_H - -/* PM8008 IRQ numbers */ -#define PM8008_IRQ_MISC_UVLO 0 -#define PM8008_IRQ_MISC_OVLO 1 -#define PM8008_IRQ_MISC_OTST2 2 -#define PM8008_IRQ_MISC_OTST3 3 -#define PM8008_IRQ_MISC_LDO_OCP 4 -#define PM8008_IRQ_TEMP_ALARM 5 -#define PM8008_IRQ_GPIO1 6 -#define PM8008_IRQ_GPIO2 7 - -#endif From 11d861d227ed1c4068597289267247aac5ac50fa Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Sat, 8 Jun 2024 17:55:25 +0200 Subject: [PATCH 11/87] regulator: add pm8008 pmic regulator driver The Qualcomm PM8008 is an I2C-controlled PMIC containing seven LDO regulators. The driver is based on a driver submitted by Satya Priya, but it has been cleaned up and reworked to match the new devicetree binding which no longer describes each regulator as a separate device. This avoids describing internal details like register offsets in the devicetree and allows for extending the implementation with features like over-current protection without having to update the binding. Specifically note that the regulator interrupts are shared between all regulators. Note that the secondary regmap is looked up by name and that if the driver ever needs to be generalised to support regulators provided by the primary regmap (I2C address) such information could be added to the device-id table. This also fixes the original implementation, which looked up regulators by 'regulator-name' property rather than devicetree node name and which prevented the regulators from being named to match board schematics. Link: https://lore.kernel.org/r/1655200111-18357-8-git-send-email-quic_c_skakit@quicinc.com Cc: Satya Priya Kakitapalli Cc: Stephen Boyd Reviewed-by: Mark Brown Signed-off-by: Johan Hovold Link: https://lore.kernel.org/r/20240608155526.12996-12-johan+linaro@kernel.org Signed-off-by: Lee Jones --- drivers/regulator/Kconfig | 7 + drivers/regulator/Makefile | 1 + drivers/regulator/qcom-pm8008-regulator.c | 198 ++++++++++++++++++++++ 3 files changed, 206 insertions(+) create mode 100644 drivers/regulator/qcom-pm8008-regulator.c diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index d333be2bea3b..17982e1cbf4d 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -1027,6 +1027,13 @@ config REGULATOR_PWM This driver supports PWM controlled voltage regulators. PWM duty cycle can increase or decrease the voltage. +config REGULATOR_QCOM_PM8008 + tristate "Qualcomm PM8008 PMIC regulators" + depends on MFD_QCOM_PM8008 + help + Select this option to enable support for the voltage regulators in + Qualcomm PM8008 PMICs. + config REGULATOR_QCOM_REFGEN tristate "Qualcomm REFGEN regulator driver" depends on ARCH_QCOM || COMPILE_TEST diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index ba15fa5f30ad..ca4d09c60867 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -112,6 +112,7 @@ obj-$(CONFIG_REGULATOR_MT6380) += mt6380-regulator.o obj-$(CONFIG_REGULATOR_MT6397) += mt6397-regulator.o obj-$(CONFIG_REGULATOR_MTK_DVFSRC) += mtk-dvfsrc-regulator.o obj-$(CONFIG_REGULATOR_QCOM_LABIBB) += qcom-labibb-regulator.o +obj-$(CONFIG_REGULATOR_QCOM_PM8008) += qcom-pm8008-regulator.o obj-$(CONFIG_REGULATOR_QCOM_REFGEN) += qcom-refgen-regulator.o obj-$(CONFIG_REGULATOR_QCOM_RPM) += qcom_rpm-regulator.o obj-$(CONFIG_REGULATOR_QCOM_RPMH) += qcom-rpmh-regulator.o diff --git a/drivers/regulator/qcom-pm8008-regulator.c b/drivers/regulator/qcom-pm8008-regulator.c new file mode 100644 index 000000000000..da017c1969d0 --- /dev/null +++ b/drivers/regulator/qcom-pm8008-regulator.c @@ -0,0 +1,198 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024 Linaro Limited + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define DEFAULT_VOLTAGE_STEPPER_RATE 38400 + +#define LDO_STEPPER_CTL_REG 0x3b +#define STEP_RATE_MASK GENMASK(1, 0) + +#define LDO_VSET_LB_REG 0x40 + +#define LDO_ENABLE_REG 0x46 +#define ENABLE_BIT BIT(7) + +struct pm8008_regulator { + struct regmap *regmap; + struct regulator_desc desc; + unsigned int base; +}; + +struct pm8008_regulator_data { + const char *name; + const char *supply_name; + unsigned int base; + int min_dropout_uV; + const struct linear_range *voltage_range; +}; + +static const struct linear_range nldo_ranges[] = { + REGULATOR_LINEAR_RANGE(528000, 0, 122, 8000), +}; + +static const struct linear_range pldo_ranges[] = { + REGULATOR_LINEAR_RANGE(1504000, 0, 237, 8000), +}; + +static const struct pm8008_regulator_data pm8008_reg_data[] = { + { "ldo1", "vdd-l1-l2", 0x4000, 225000, nldo_ranges, }, + { "ldo2", "vdd-l1-l2", 0x4100, 225000, nldo_ranges, }, + { "ldo3", "vdd-l3-l4", 0x4200, 300000, pldo_ranges, }, + { "ldo4", "vdd-l3-l4", 0x4300, 300000, pldo_ranges, }, + { "ldo5", "vdd-l5", 0x4400, 200000, pldo_ranges, }, + { "ldo6", "vdd-l6", 0x4500, 200000, pldo_ranges, }, + { "ldo7", "vdd-l7", 0x4600, 200000, pldo_ranges, }, +}; + +static int pm8008_regulator_set_voltage_sel(struct regulator_dev *rdev, unsigned int sel) +{ + struct pm8008_regulator *preg = rdev_get_drvdata(rdev); + unsigned int mV; + __le16 val; + int ret; + + ret = regulator_list_voltage_linear_range(rdev, sel); + if (ret < 0) + return ret; + + mV = DIV_ROUND_UP(ret, 1000); + + val = cpu_to_le16(mV); + + ret = regmap_bulk_write(preg->regmap, preg->base + LDO_VSET_LB_REG, + &val, sizeof(val)); + if (ret < 0) + return ret; + + return 0; +} + +static int pm8008_regulator_get_voltage_sel(struct regulator_dev *rdev) +{ + struct pm8008_regulator *preg = rdev_get_drvdata(rdev); + unsigned int uV; + __le16 val; + int ret; + + ret = regmap_bulk_read(preg->regmap, preg->base + LDO_VSET_LB_REG, + &val, sizeof(val)); + if (ret < 0) + return ret; + + uV = le16_to_cpu(val) * 1000; + + return (uV - preg->desc.min_uV) / preg->desc.uV_step; +} + +static const struct regulator_ops pm8008_regulator_ops = { + .list_voltage = regulator_list_voltage_linear, + .set_voltage_sel = pm8008_regulator_set_voltage_sel, + .get_voltage_sel = pm8008_regulator_get_voltage_sel, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static int pm8008_regulator_probe(struct platform_device *pdev) +{ + const struct pm8008_regulator_data *data; + struct regulator_config config = {}; + struct device *dev = &pdev->dev; + struct pm8008_regulator *preg; + struct regulator_desc *desc; + struct regulator_dev *rdev; + struct regmap *regmap; + unsigned int val; + int ret, i; + + regmap = dev_get_regmap(dev->parent, "secondary"); + if (!regmap) + return -EINVAL; + + for (i = 0; i < ARRAY_SIZE(pm8008_reg_data); i++) { + data = &pm8008_reg_data[i]; + + preg = devm_kzalloc(dev, sizeof(*preg), GFP_KERNEL); + if (!preg) + return -ENOMEM; + + preg->regmap = regmap; + preg->base = data->base; + + desc = &preg->desc; + + desc->name = data->name; + desc->supply_name = data->supply_name; + desc->of_match = data->name; + desc->regulators_node = of_match_ptr("regulators"); + desc->ops = &pm8008_regulator_ops; + desc->type = REGULATOR_VOLTAGE; + desc->owner = THIS_MODULE; + + desc->linear_ranges = data->voltage_range; + desc->n_linear_ranges = 1; + desc->uV_step = desc->linear_ranges[0].step; + desc->min_uV = desc->linear_ranges[0].min; + desc->n_voltages = linear_range_values_in_range(&desc->linear_ranges[0]); + + ret = regmap_read(regmap, preg->base + LDO_STEPPER_CTL_REG, &val); + if (ret < 0) { + dev_err(dev, "failed to read step rate: %d\n", ret); + return ret; + } + val &= STEP_RATE_MASK; + desc->ramp_delay = DEFAULT_VOLTAGE_STEPPER_RATE >> val; + + desc->min_dropout_uV = data->min_dropout_uV; + + desc->enable_reg = preg->base + LDO_ENABLE_REG; + desc->enable_mask = ENABLE_BIT; + + config.dev = dev->parent; + config.driver_data = preg; + config.regmap = regmap; + + rdev = devm_regulator_register(dev, desc, &config); + if (IS_ERR(rdev)) { + ret = PTR_ERR(rdev); + dev_err(dev, "failed to register regulator %s: %d\n", + desc->name, ret); + return ret; + } + } + + return 0; +} + +static const struct platform_device_id pm8008_regulator_id_table[] = { + { "pm8008-regulator" }, + { } +}; +MODULE_DEVICE_TABLE(platform, pm8008_regulator_id_table); + +static struct platform_driver pm8008_regulator_driver = { + .driver = { + .name = "qcom-pm8008-regulator", + }, + .probe = pm8008_regulator_probe, + .id_table = pm8008_regulator_id_table, +}; +module_platform_driver(pm8008_regulator_driver); + +MODULE_DESCRIPTION("Qualcomm PM8008 PMIC regulator driver"); +MODULE_LICENSE("GPL"); From bfefbecdeadc608c625e85259ad0a89d34728d61 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20Wei=C3=9Fschuh?= Date: Sun, 26 May 2024 20:17:15 +0200 Subject: [PATCH 12/87] leds: class: Warn about name collisions earlier MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Other warnings refer to the name after renaming, which is clearer when that name is mentioned first. It is also clearer where "ret" comes from. While at it, also add the necessary newline to the message and fix the parameter alignment. Signed-off-by: Thomas Weißschuh Link: https://lore.kernel.org/r/20240526-cros_ec-kbd-led-framework-v3-1-ee577415a521@weissschuh.net Signed-off-by: Lee Jones --- drivers/leds/led-class.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/leds/led-class.c b/drivers/leds/led-class.c index 24fcff682b24..c298355d5b7d 100644 --- a/drivers/leds/led-class.c +++ b/drivers/leds/led-class.c @@ -503,6 +503,9 @@ int led_classdev_register_ext(struct device *parent, ret = led_classdev_next_name(proposed_name, final_name, sizeof(final_name)); if (ret < 0) return ret; + else if (ret) + dev_warn(parent, "Led %s renamed to %s due to name collision\n", + proposed_name, final_name); if (led_cdev->color >= LED_COLOR_ID_MAX) dev_warn(parent, "LED %s color identifier out of range\n", final_name); @@ -518,10 +521,6 @@ int led_classdev_register_ext(struct device *parent, if (init_data && init_data->fwnode) device_set_node(led_cdev->dev, init_data->fwnode); - if (ret) - dev_warn(parent, "Led %s renamed to %s due to name collision", - proposed_name, dev_name(led_cdev->dev)); - if (led_cdev->flags & LED_BRIGHT_HW_CHANGED) { ret = led_add_brightness_hw_changed(led_cdev); if (ret) { From 6b0d3355e5a58fd73529fa6f930a877caca3f75d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20Wei=C3=9Fschuh?= Date: Sun, 26 May 2024 20:17:16 +0200 Subject: [PATCH 13/87] leds: class: Add flag to avoid automatic renaming of LED devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a mechanism for drivers to opt-out of the automatic device renaming on conflicts. Those drivers will provide their own conflict resolution. Signed-off-by: Thomas Weißschuh Link: https://lore.kernel.org/r/20240526-cros_ec-kbd-led-framework-v3-2-ee577415a521@weissschuh.net Signed-off-by: Lee Jones --- drivers/leds/led-class.c | 2 ++ include/linux/leds.h | 1 + 2 files changed, 3 insertions(+) diff --git a/drivers/leds/led-class.c b/drivers/leds/led-class.c index c298355d5b7d..2f08c20702f3 100644 --- a/drivers/leds/led-class.c +++ b/drivers/leds/led-class.c @@ -503,6 +503,8 @@ int led_classdev_register_ext(struct device *parent, ret = led_classdev_next_name(proposed_name, final_name, sizeof(final_name)); if (ret < 0) return ret; + else if (ret && led_cdev->flags & LED_REJECT_NAME_CONFLICT) + return -EEXIST; else if (ret) dev_warn(parent, "Led %s renamed to %s due to name collision\n", proposed_name, final_name); diff --git a/include/linux/leds.h b/include/linux/leds.h index 6300313c46b7..36663ac6c58a 100644 --- a/include/linux/leds.h +++ b/include/linux/leds.h @@ -107,6 +107,7 @@ struct led_classdev { #define LED_BRIGHT_HW_CHANGED BIT(21) #define LED_RETAIN_AT_SHUTDOWN BIT(22) #define LED_INIT_DEFAULT_TRIGGER BIT(23) +#define LED_REJECT_NAME_CONFLICT BIT(24) /* set_brightness_work / blink_timer flags, atomic, private. */ unsigned long work_flags; From baa19b650794d58d01ec3ea03c63eb4ae0fa9d84 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20Wei=C3=9Fschuh?= Date: Sun, 26 May 2024 20:17:17 +0200 Subject: [PATCH 14/87] platform/chrome: cros_kbd_led_backlight: allow binding through MFD MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The ChromeOS EC used in Framework laptops supports the standard CrOS EC keyboard backlight protocol. However the firmware on these laptops doesn't implement the ACPI ID GOOG0002 that is recognized by cros_kbd_led_backlight and they also don't use device tree. Prepare the existing cros_kbd_led_backlight driver to be probed through the CrOS EC MFD device which works without ACPI or OF support. Signed-off-by: Thomas Weißschuh Acked-by: Tzung-Bi Shih Link: https://lore.kernel.org/r/20240526-cros_ec-kbd-led-framework-v3-3-ee577415a521@weissschuh.net Signed-off-by: Lee Jones --- drivers/platform/chrome/Kconfig | 2 +- .../platform/chrome/cros_kbd_led_backlight.c | 40 ++++++++++++++++++- 2 files changed, 39 insertions(+), 3 deletions(-) diff --git a/drivers/platform/chrome/Kconfig b/drivers/platform/chrome/Kconfig index 073616b5b5a0..7dbeb786352a 100644 --- a/drivers/platform/chrome/Kconfig +++ b/drivers/platform/chrome/Kconfig @@ -150,7 +150,7 @@ config CROS_EC_PROTO config CROS_KBD_LED_BACKLIGHT tristate "Backlight LED support for Chrome OS keyboards" - depends on LEDS_CLASS && (ACPI || CROS_EC) + depends on LEDS_CLASS && (ACPI || CROS_EC || MFD_CROS_EC_DEV) help This option enables support for the keyboard backlight LEDs on select Chrome OS systems. diff --git a/drivers/platform/chrome/cros_kbd_led_backlight.c b/drivers/platform/chrome/cros_kbd_led_backlight.c index b83e4f328620..78097c8a4966 100644 --- a/drivers/platform/chrome/cros_kbd_led_backlight.c +++ b/drivers/platform/chrome/cros_kbd_led_backlight.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -194,13 +195,46 @@ static const __maybe_unused struct keyboard_led_drvdata keyboard_led_drvdata_ec_ #endif /* IS_ENABLED(CONFIG_CROS_EC) */ +#if IS_ENABLED(CONFIG_MFD_CROS_EC_DEV) +static int keyboard_led_init_ec_pwm_mfd(struct platform_device *pdev) +{ + struct cros_ec_dev *ec_dev = dev_get_drvdata(pdev->dev.parent); + struct cros_ec_device *cros_ec = ec_dev->ec_dev; + struct keyboard_led *keyboard_led = platform_get_drvdata(pdev); + + keyboard_led->ec = cros_ec; + + return 0; +} + +static const struct keyboard_led_drvdata keyboard_led_drvdata_ec_pwm_mfd = { + .init = keyboard_led_init_ec_pwm_mfd, + .brightness_set_blocking = keyboard_led_set_brightness_ec_pwm, + .brightness_get = keyboard_led_get_brightness_ec_pwm, + .max_brightness = KEYBOARD_BACKLIGHT_MAX, +}; + +#else /* IS_ENABLED(CONFIG_MFD_CROS_EC_DEV) */ + +static const struct keyboard_led_drvdata keyboard_led_drvdata_ec_pwm_mfd = {}; + +#endif /* IS_ENABLED(CONFIG_MFD_CROS_EC_DEV) */ + +static int keyboard_led_is_mfd_device(struct platform_device *pdev) +{ + return IS_ENABLED(CONFIG_MFD_CROS_EC_DEV) && mfd_get_cell(pdev); +} + static int keyboard_led_probe(struct platform_device *pdev) { const struct keyboard_led_drvdata *drvdata; struct keyboard_led *keyboard_led; int error; - drvdata = device_get_match_data(&pdev->dev); + if (keyboard_led_is_mfd_device(pdev)) + drvdata = &keyboard_led_drvdata_ec_pwm_mfd; + else + drvdata = device_get_match_data(&pdev->dev); if (!drvdata) return -EINVAL; @@ -216,13 +250,15 @@ static int keyboard_led_probe(struct platform_device *pdev) } keyboard_led->cdev.name = "chromeos::kbd_backlight"; - keyboard_led->cdev.flags |= LED_CORE_SUSPENDRESUME; + keyboard_led->cdev.flags |= LED_CORE_SUSPENDRESUME | LED_REJECT_NAME_CONFLICT; keyboard_led->cdev.max_brightness = drvdata->max_brightness; keyboard_led->cdev.brightness_set = drvdata->brightness_set; keyboard_led->cdev.brightness_set_blocking = drvdata->brightness_set_blocking; keyboard_led->cdev.brightness_get = drvdata->brightness_get; error = devm_led_classdev_register(&pdev->dev, &keyboard_led->cdev); + if (error == -EEXIST) /* Already bound via other mechanism */ + return -ENODEV; if (error) return error; From 970c3a6b7aa3c68ccdf5af2562c3d39533dd62a9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20Wei=C3=9Fschuh?= Date: Sun, 26 May 2024 20:17:18 +0200 Subject: [PATCH 15/87] mfd: cros_ec: Register keyboard backlight subdevice MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Load cros_kbd_led_backlight when the EC reports EC_FEATURE_PWM_KEYB. This makes cros_kbd_led_backlight work on machines without specific ACPI or OF support for the keyboard backlight. Signed-off-by: Thomas Weißschuh Link: https://lore.kernel.org/r/20240526-cros_ec-kbd-led-framework-v3-4-ee577415a521@weissschuh.net Signed-off-by: Lee Jones --- drivers/mfd/cros_ec_dev.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/mfd/cros_ec_dev.c b/drivers/mfd/cros_ec_dev.c index a52d59cc2b1e..4444b361aeae 100644 --- a/drivers/mfd/cros_ec_dev.c +++ b/drivers/mfd/cros_ec_dev.c @@ -99,6 +99,10 @@ static const struct mfd_cell cros_ec_wdt_cells[] = { { .name = "cros-ec-wdt", } }; +static const struct mfd_cell cros_ec_keyboard_leds_cells[] = { + { .name = "cros-keyboard-leds", }, +}; + static const struct cros_feature_to_cells cros_subdevices[] = { { .id = EC_FEATURE_CEC, @@ -125,6 +129,11 @@ static const struct cros_feature_to_cells cros_subdevices[] = { .mfd_cells = cros_ec_wdt_cells, .num_cells = ARRAY_SIZE(cros_ec_wdt_cells), }, + { + .id = EC_FEATURE_PWM_KEYB, + .mfd_cells = cros_ec_keyboard_leds_cells, + .num_cells = ARRAY_SIZE(cros_ec_keyboard_leds_cells), + }, }; static const struct mfd_cell cros_ec_platform_cells[] = { From 5f2e950755c76c6fc20fc4ebd8355671fbbd7ac0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20Wei=C3=9Fschuh?= Date: Thu, 13 Jun 2024 16:48:36 +0200 Subject: [PATCH 16/87] leds: core: Introduce led_get_color_name() function MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is similar to the existing led_colors[] array but is safer to use and usable by everyone. Getting string representations of color ids is useful for drivers which are handling color IDs anyways, for example for the multicolor API. Signed-off-by: Thomas Weißschuh Link: https://lore.kernel.org/r/20240613-cros_ec-led-v3-1-500b50f41e0f@weissschuh.net Signed-off-by: Lee Jones --- drivers/leds/led-core.c | 9 +++++++++ include/linux/leds.h | 10 ++++++++++ 2 files changed, 19 insertions(+) diff --git a/drivers/leds/led-core.c b/drivers/leds/led-core.c index 89c9806cc97f..e0dd2284e84a 100644 --- a/drivers/leds/led-core.c +++ b/drivers/leds/led-core.c @@ -534,6 +534,15 @@ int led_compose_name(struct device *dev, struct led_init_data *init_data, } EXPORT_SYMBOL_GPL(led_compose_name); +const char *led_get_color_name(u8 color_id) +{ + if (color_id >= ARRAY_SIZE(led_colors)) + return NULL; + + return led_colors[color_id]; +} +EXPORT_SYMBOL_GPL(led_get_color_name); + enum led_default_state led_init_default_state_get(struct fwnode_handle *fwnode) { const char *state = NULL; diff --git a/include/linux/leds.h b/include/linux/leds.h index 6300313c46b7..dedea965afbf 100644 --- a/include/linux/leds.h +++ b/include/linux/leds.h @@ -427,6 +427,16 @@ void led_sysfs_enable(struct led_classdev *led_cdev); int led_compose_name(struct device *dev, struct led_init_data *init_data, char *led_classdev_name); +/** + * led_get_color_name - get string representation of color ID + * @color_id: The LED_COLOR_ID_* constant + * + * Get the string name of a LED_COLOR_ID_* constant. + * + * Returns: A string constant or NULL on an invalid ID. + */ +const char *led_get_color_name(u8 color_id); + /** * led_sysfs_is_disabled - check if LED sysfs interface is disabled * @led_cdev: the LED to query From 9cb6de2d2c5ca1a7478ee584954bb997fd9f7834 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20Wei=C3=9Fschuh?= Date: Thu, 13 Jun 2024 16:48:37 +0200 Subject: [PATCH 17/87] leds: multicolor: Use led_get_color_name() function MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit led_get_color_name() is a safer alternative to led_colors. led-class-multicolor.c is the only external user of led_colors and its removal allows unexporting the array. Signed-off-by: Thomas Weißschuh Link: https://lore.kernel.org/r/20240613-cros_ec-led-v3-2-500b50f41e0f@weissschuh.net Signed-off-by: Lee Jones --- drivers/leds/led-class-multicolor.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/leds/led-class-multicolor.c b/drivers/leds/led-class-multicolor.c index ec62a4811613..584e3786a1e7 100644 --- a/drivers/leds/led-class-multicolor.c +++ b/drivers/leds/led-class-multicolor.c @@ -101,7 +101,7 @@ static ssize_t multi_index_show(struct device *dev, for (i = 0; i < mcled_cdev->num_colors; i++) { index = mcled_cdev->subled_info[i].color_index; - len += sprintf(buf + len, "%s", led_colors[index]); + len += sprintf(buf + len, "%s", led_get_color_name(index)); if (i < mcled_cdev->num_colors - 1) len += sprintf(buf + len, " "); } From 493179e692dbb70cac1e54828d0e04bda386f13d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20Wei=C3=9Fschuh?= Date: Thu, 13 Jun 2024 16:48:38 +0200 Subject: [PATCH 18/87] leds: core: Unexport led_colors[] array MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit There are no external users left, make the array static. Signed-off-by: Thomas Weißschuh Link: https://lore.kernel.org/r/20240613-cros_ec-led-v3-3-500b50f41e0f@weissschuh.net Signed-off-by: Lee Jones --- drivers/leds/led-core.c | 3 +-- drivers/leds/leds.h | 1 - 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/leds/led-core.c b/drivers/leds/led-core.c index e0dd2284e84a..f2cea4e094f6 100644 --- a/drivers/leds/led-core.c +++ b/drivers/leds/led-core.c @@ -25,7 +25,7 @@ EXPORT_SYMBOL_GPL(leds_list_lock); LIST_HEAD(leds_list); EXPORT_SYMBOL_GPL(leds_list); -const char * const led_colors[LED_COLOR_ID_MAX] = { +static const char * const led_colors[LED_COLOR_ID_MAX] = { [LED_COLOR_ID_WHITE] = "white", [LED_COLOR_ID_RED] = "red", [LED_COLOR_ID_GREEN] = "green", @@ -42,7 +42,6 @@ const char * const led_colors[LED_COLOR_ID_MAX] = { [LED_COLOR_ID_CYAN] = "cyan", [LED_COLOR_ID_LIME] = "lime", }; -EXPORT_SYMBOL_GPL(led_colors); static int __led_set_brightness(struct led_classdev *led_cdev, unsigned int value) { diff --git a/drivers/leds/leds.h b/drivers/leds/leds.h index 1138e2ab82e5..d7999e7372a4 100644 --- a/drivers/leds/leds.h +++ b/drivers/leds/leds.h @@ -30,6 +30,5 @@ ssize_t led_trigger_write(struct file *filp, struct kobject *kobj, extern struct rw_semaphore leds_list_lock; extern struct list_head leds_list; -extern const char * const led_colors[LED_COLOR_ID_MAX]; #endif /* __LEDS_H_INCLUDED */ From 8d6ce6f3ec9d5f384e3eac92e43cfeac7a36e6b1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20Wei=C3=9Fschuh?= Date: Thu, 13 Jun 2024 16:48:39 +0200 Subject: [PATCH 19/87] leds: Add ChromeOS EC driver MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The ChromeOS Embedded Controller exposes an LED control command. Expose its functionality through the leds subsystem. The LEDs are exposed as multicolor devices. A hardware trigger, which is active by default, is provided to let the EC itself take over control over the LED. The driver is designed to be probed via the cros_ec mfd device. Signed-off-by: Thomas Weißschuh Link: https://lore.kernel.org/r/20240613-cros_ec-led-v3-4-500b50f41e0f@weissschuh.net Signed-off-by: Lee Jones --- MAINTAINERS | 5 + drivers/leds/Kconfig | 15 ++ drivers/leds/Makefile | 1 + drivers/leds/leds-cros_ec.c | 277 ++++++++++++++++++++++++++++++++++++ 4 files changed, 298 insertions(+) create mode 100644 drivers/leds/leds-cros_ec.c diff --git a/MAINTAINERS b/MAINTAINERS index d6c90161c7bf..003118d088f0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5135,6 +5135,11 @@ S: Maintained F: Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml F: sound/soc/codecs/cros_ec_codec.* +CHROMEOS EC LED DRIVER +M: Thomas Weißschuh +S: Maintained +F: drivers/leds/leds-cros_ec.c + CHROMEOS EC SUBDRIVERS M: Benson Leung R: Guenter Roeck diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig index 05e6af88b88c..aa2fec9a34ed 100644 --- a/drivers/leds/Kconfig +++ b/drivers/leds/Kconfig @@ -179,6 +179,21 @@ config LEDS_CR0014114 To compile this driver as a module, choose M here: the module will be called leds-cr0014114. +config LEDS_CROS_EC + tristate "LED Support for ChromeOS EC" + depends on MFD_CROS_EC_DEV + depends on LEDS_CLASS_MULTICOLOR + select LEDS_TRIGGERS + default MFD_CROS_EC_DEV + help + This option enables support for LEDs managed by ChromeOS ECs. + All LEDs exposed by the EC are supported in multicolor mode. + A hardware trigger to switch back to the automatic behaviour is + provided. + + To compile this driver as a module, choose M here: the module + will be called leds-cros_ec. + config LEDS_EL15203000 tristate "LED Support for Crane EL15203000" depends on LEDS_CLASS diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile index effdfc6f1e95..3491904e13f7 100644 --- a/drivers/leds/Makefile +++ b/drivers/leds/Makefile @@ -26,6 +26,7 @@ obj-$(CONFIG_LEDS_CLEVO_MAIL) += leds-clevo-mail.o obj-$(CONFIG_LEDS_COBALT_QUBE) += leds-cobalt-qube.o obj-$(CONFIG_LEDS_COBALT_RAQ) += leds-cobalt-raq.o obj-$(CONFIG_LEDS_CPCAP) += leds-cpcap.o +obj-$(CONFIG_LEDS_CROS_EC) += leds-cros_ec.o obj-$(CONFIG_LEDS_DA903X) += leds-da903x.o obj-$(CONFIG_LEDS_DA9052) += leds-da9052.o obj-$(CONFIG_LEDS_GPIO) += leds-gpio.o diff --git a/drivers/leds/leds-cros_ec.c b/drivers/leds/leds-cros_ec.c new file mode 100644 index 000000000000..275522b81ea5 --- /dev/null +++ b/drivers/leds/leds-cros_ec.c @@ -0,0 +1,277 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * ChromeOS EC LED Driver + * + * Copyright (C) 2024 Thomas Weißschuh + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +static const char * const cros_ec_led_functions[] = { + [EC_LED_ID_BATTERY_LED] = LED_FUNCTION_CHARGING, + [EC_LED_ID_POWER_LED] = LED_FUNCTION_POWER, + [EC_LED_ID_ADAPTER_LED] = "adapter", + [EC_LED_ID_LEFT_LED] = "left", + [EC_LED_ID_RIGHT_LED] = "right", + [EC_LED_ID_RECOVERY_HW_REINIT_LED] = "recovery-hw-reinit", + [EC_LED_ID_SYSRQ_DEBUG_LED] = "sysrq-debug", +}; + +static_assert(ARRAY_SIZE(cros_ec_led_functions) == EC_LED_ID_COUNT); + +static const int cros_ec_led_to_linux_id[] = { + [EC_LED_COLOR_RED] = LED_COLOR_ID_RED, + [EC_LED_COLOR_GREEN] = LED_COLOR_ID_GREEN, + [EC_LED_COLOR_BLUE] = LED_COLOR_ID_BLUE, + [EC_LED_COLOR_YELLOW] = LED_COLOR_ID_YELLOW, + [EC_LED_COLOR_WHITE] = LED_COLOR_ID_WHITE, + [EC_LED_COLOR_AMBER] = LED_COLOR_ID_AMBER, +}; + +static_assert(ARRAY_SIZE(cros_ec_led_to_linux_id) == EC_LED_COLOR_COUNT); + +static const int cros_ec_linux_to_ec_id[] = { + [LED_COLOR_ID_RED] = EC_LED_COLOR_RED, + [LED_COLOR_ID_GREEN] = EC_LED_COLOR_GREEN, + [LED_COLOR_ID_BLUE] = EC_LED_COLOR_BLUE, + [LED_COLOR_ID_YELLOW] = EC_LED_COLOR_YELLOW, + [LED_COLOR_ID_WHITE] = EC_LED_COLOR_WHITE, + [LED_COLOR_ID_AMBER] = EC_LED_COLOR_AMBER, +}; + +struct cros_ec_led_priv { + struct led_classdev_mc led_mc_cdev; + struct cros_ec_device *cros_ec; + enum ec_led_id led_id; +}; + +static inline struct cros_ec_led_priv *cros_ec_led_cdev_to_priv(struct led_classdev *led_cdev) +{ + return container_of(lcdev_to_mccdev(led_cdev), struct cros_ec_led_priv, led_mc_cdev); +} + +union cros_ec_led_cmd_data { + struct ec_params_led_control req; + struct ec_response_led_control resp; +} __packed; + +static int cros_ec_led_send_cmd(struct cros_ec_device *cros_ec, + union cros_ec_led_cmd_data *arg) +{ + int ret; + struct { + struct cros_ec_command msg; + union cros_ec_led_cmd_data data; + } __packed buf = { + .msg = { + .version = 1, + .command = EC_CMD_LED_CONTROL, + .insize = sizeof(arg->resp), + .outsize = sizeof(arg->req), + }, + .data.req = arg->req + }; + + ret = cros_ec_cmd_xfer_status(cros_ec, &buf.msg); + if (ret < 0) + return ret; + + arg->resp = buf.data.resp; + + return 0; +} + +static int cros_ec_led_trigger_activate(struct led_classdev *led_cdev) +{ + struct cros_ec_led_priv *priv = cros_ec_led_cdev_to_priv(led_cdev); + union cros_ec_led_cmd_data arg = {}; + + arg.req.led_id = priv->led_id; + arg.req.flags = EC_LED_FLAGS_AUTO; + + return cros_ec_led_send_cmd(priv->cros_ec, &arg); +} + +static struct led_hw_trigger_type cros_ec_led_trigger_type; + +static struct led_trigger cros_ec_led_trigger = { + .name = "chromeos-auto", + .trigger_type = &cros_ec_led_trigger_type, + .activate = cros_ec_led_trigger_activate, +}; + +static int cros_ec_led_brightness_set_blocking(struct led_classdev *led_cdev, + enum led_brightness brightness) +{ + struct cros_ec_led_priv *priv = cros_ec_led_cdev_to_priv(led_cdev); + union cros_ec_led_cmd_data arg = {}; + enum ec_led_colors led_color; + struct mc_subled *subled; + size_t i; + + led_mc_calc_color_components(&priv->led_mc_cdev, brightness); + + arg.req.led_id = priv->led_id; + + for (i = 0; i < priv->led_mc_cdev.num_colors; i++) { + subled = &priv->led_mc_cdev.subled_info[i]; + led_color = cros_ec_linux_to_ec_id[subled->color_index]; + arg.req.brightness[led_color] = subled->brightness; + } + + return cros_ec_led_send_cmd(priv->cros_ec, &arg); +} + +static int cros_ec_led_count_subleds(struct device *dev, + struct ec_response_led_control *resp, + unsigned int *max_brightness) +{ + unsigned int range, common_range = 0; + int num_subleds = 0; + size_t i; + + for (i = 0; i < EC_LED_COLOR_COUNT; i++) { + range = resp->brightness_range[i]; + + if (!range) + continue; + + num_subleds++; + + if (!common_range) + common_range = range; + + if (common_range != range) { + /* The multicolor LED API expects a uniform max_brightness */ + dev_err(dev, "Inconsistent LED brightness values\n"); + return -EINVAL; + } + } + + if (!num_subleds) + return -EINVAL; + + *max_brightness = common_range; + return num_subleds; +} + +static const char *cros_ec_led_get_color_name(struct led_classdev_mc *led_mc_cdev) +{ + int color; + + if (led_mc_cdev->num_colors == 1) + color = led_mc_cdev->subled_info[0].color_index; + else + color = LED_COLOR_ID_MULTI; + + return led_get_color_name(color); +} + +static int cros_ec_led_probe_one(struct device *dev, struct cros_ec_device *cros_ec, + enum ec_led_id id) +{ + union cros_ec_led_cmd_data arg = {}; + struct cros_ec_led_priv *priv; + struct led_classdev *led_cdev; + struct mc_subled *subleds; + int i, ret, num_subleds; + size_t subled; + + arg.req.led_id = id; + arg.req.flags = EC_LED_FLAGS_QUERY; + ret = cros_ec_led_send_cmd(cros_ec, &arg); + if (ret == -EINVAL) + return 0; /* Unknown LED, skip */ + if (ret == -EOPNOTSUPP) + return -ENODEV; + if (ret < 0) + return ret; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + num_subleds = cros_ec_led_count_subleds(dev, &arg.resp, + &priv->led_mc_cdev.led_cdev.max_brightness); + if (num_subleds < 0) + return num_subleds; + + priv->cros_ec = cros_ec; + priv->led_id = id; + + subleds = devm_kcalloc(dev, num_subleds, sizeof(*subleds), GFP_KERNEL); + if (!subleds) + return -ENOMEM; + + subled = 0; + for (i = 0; i < EC_LED_COLOR_COUNT; i++) { + if (!arg.resp.brightness_range[i]) + continue; + + subleds[subled].color_index = cros_ec_led_to_linux_id[i]; + if (subled == 0) + subleds[subled].intensity = 100; + subled++; + } + + priv->led_mc_cdev.subled_info = subleds; + priv->led_mc_cdev.num_colors = num_subleds; + + led_cdev = &priv->led_mc_cdev.led_cdev; + led_cdev->brightness_set_blocking = cros_ec_led_brightness_set_blocking; + led_cdev->trigger_type = &cros_ec_led_trigger_type; + led_cdev->default_trigger = cros_ec_led_trigger.name; + led_cdev->hw_control_trigger = cros_ec_led_trigger.name; + + led_cdev->name = devm_kasprintf(dev, GFP_KERNEL, "chromeos:%s:%s", + cros_ec_led_get_color_name(&priv->led_mc_cdev), + cros_ec_led_functions[id]); + if (!led_cdev->name) + return -ENOMEM; + + return devm_led_classdev_multicolor_register(dev, &priv->led_mc_cdev); +} + +static int cros_ec_led_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct cros_ec_dev *ec_dev = dev_get_drvdata(dev->parent); + struct cros_ec_device *cros_ec = ec_dev->ec_dev; + int i, ret = 0; + + ret = devm_led_trigger_register(dev, &cros_ec_led_trigger); + if (ret) + return ret; + + for (i = 0; i < EC_LED_ID_COUNT; i++) { + ret = cros_ec_led_probe_one(dev, cros_ec, i); + if (ret) + break; + } + + return ret; +} + +static const struct platform_device_id cros_ec_led_id[] = { + { "cros-ec-led", 0 }, + {} +}; + +static struct platform_driver cros_ec_led_driver = { + .driver.name = "cros-ec-led", + .probe = cros_ec_led_probe, + .id_table = cros_ec_led_id, +}; +module_platform_driver(cros_ec_led_driver); + +MODULE_DEVICE_TABLE(platform, cros_ec_led_id); +MODULE_DESCRIPTION("ChromeOS EC LED Driver"); +MODULE_AUTHOR("Thomas Weißschuh Date: Thu, 13 Jun 2024 16:48:40 +0200 Subject: [PATCH 20/87] mfd: cros_ec: Register LED subdevice MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add ChromeOS EC-based LED control as EC subdevice. Signed-off-by: Thomas Weißschuh Link: https://lore.kernel.org/r/20240613-cros_ec-led-v3-5-500b50f41e0f@weissschuh.net Signed-off-by: Lee Jones --- drivers/mfd/cros_ec_dev.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/mfd/cros_ec_dev.c b/drivers/mfd/cros_ec_dev.c index a52d59cc2b1e..d8408054ba15 100644 --- a/drivers/mfd/cros_ec_dev.c +++ b/drivers/mfd/cros_ec_dev.c @@ -99,6 +99,10 @@ static const struct mfd_cell cros_ec_wdt_cells[] = { { .name = "cros-ec-wdt", } }; +static const struct mfd_cell cros_ec_led_cells[] = { + { .name = "cros-ec-led", }, +}; + static const struct cros_feature_to_cells cros_subdevices[] = { { .id = EC_FEATURE_CEC, @@ -125,6 +129,11 @@ static const struct cros_feature_to_cells cros_subdevices[] = { .mfd_cells = cros_ec_wdt_cells, .num_cells = ARRAY_SIZE(cros_ec_wdt_cells), }, + { + .id = EC_FEATURE_LED, + .mfd_cells = cros_ec_led_cells, + .num_cells = ARRAY_SIZE(cros_ec_led_cells), + }, }; static const struct mfd_cell cros_ec_platform_cells[] = { From 769cb63166d90f1fadafa4352f180cbd96b6cb77 Mon Sep 17 00:00:00 2001 From: Peter Griffin Date: Fri, 21 Jun 2024 12:55:43 +0100 Subject: [PATCH 21/87] mfd: syscon: Add of_syscon_register_regmap() API The of_syscon_register_regmap() API allows an externally created regmap to be registered with syscon. This regmap can then be returned to client drivers using the syscon_regmap_lookup_by_phandle() APIs. The API is used by platforms where mmio access to the syscon registers is not possible, and a underlying soc driver like exynos-pmu provides a SoC specific regmap that can issue a SMC or hypervisor call to write the register. This approach keeps the SoC complexities out of syscon, but allows common drivers such as syscon-poweroff, syscon-reboot and friends that are used by many SoCs already to be re-used. Signed-off-by: Peter Griffin Reviewed-by: Arnd Bergmann Reviewed-by: Sam Protsenko Tested-by: Will McVicker Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240621115544.1655458-2-peter.griffin@linaro.org Signed-off-by: Lee Jones --- drivers/mfd/syscon.c | 48 ++++++++++++++++++++++++++++++++++++++ include/linux/mfd/syscon.h | 8 +++++++ 2 files changed, 56 insertions(+) diff --git a/drivers/mfd/syscon.c b/drivers/mfd/syscon.c index 7d0e91164cba..33f1e07ab24d 100644 --- a/drivers/mfd/syscon.c +++ b/drivers/mfd/syscon.c @@ -192,6 +192,54 @@ static struct regmap *device_node_get_regmap(struct device_node *np, return syscon->regmap; } +/** + * of_syscon_register_regmap() - Register regmap for specified device node + * @np: Device tree node + * @regmap: Pointer to regmap object + * + * Register an externally created regmap object with syscon for the specified + * device tree node. This regmap will then be returned to client drivers using + * the syscon_regmap_lookup_by_phandle() API. + * + * Return: 0 on success, negative error code on failure. + */ +int of_syscon_register_regmap(struct device_node *np, struct regmap *regmap) +{ + struct syscon *entry, *syscon = NULL; + int ret; + + if (!np || !regmap) + return -EINVAL; + + syscon = kzalloc(sizeof(*syscon), GFP_KERNEL); + if (!syscon) + return -ENOMEM; + + /* check if syscon entry already exists */ + spin_lock(&syscon_list_slock); + + list_for_each_entry(entry, &syscon_list, list) + if (entry->np == np) { + ret = -EEXIST; + goto err_unlock; + } + + syscon->regmap = regmap; + syscon->np = np; + + /* register the regmap in syscon list */ + list_add_tail(&syscon->list, &syscon_list); + spin_unlock(&syscon_list_slock); + + return 0; + +err_unlock: + spin_unlock(&syscon_list_slock); + kfree(syscon); + return ret; +} +EXPORT_SYMBOL_GPL(of_syscon_register_regmap); + struct regmap *device_node_to_regmap(struct device_node *np) { return device_node_get_regmap(np, false); diff --git a/include/linux/mfd/syscon.h b/include/linux/mfd/syscon.h index c315903f6dab..aad9c6b50463 100644 --- a/include/linux/mfd/syscon.h +++ b/include/linux/mfd/syscon.h @@ -28,6 +28,8 @@ struct regmap *syscon_regmap_lookup_by_phandle_args(struct device_node *np, unsigned int *out_args); struct regmap *syscon_regmap_lookup_by_phandle_optional(struct device_node *np, const char *property); +int of_syscon_register_regmap(struct device_node *np, + struct regmap *regmap); #else static inline struct regmap *device_node_to_regmap(struct device_node *np) { @@ -67,6 +69,12 @@ static inline struct regmap *syscon_regmap_lookup_by_phandle_optional( return NULL; } +static inline int of_syscon_register_regmap(struct device_node *np, + struct regmap *regmap) +{ + return -EOPNOTSUPP; +} + #endif #endif /* __LINUX_MFD_SYSCON_H__ */ From 35d6b98c625867209bc47df99cf03edf4280799f Mon Sep 17 00:00:00 2001 From: Peter Griffin Date: Fri, 21 Jun 2024 12:55:44 +0100 Subject: [PATCH 22/87] soc: samsung: exynos-pmu: update to use of_syscon_register_regmap() For SoCs like gs101 that need a special regmap, register this with of_syscon_register_regmap api, so it can be returned by syscon_regmap_lookup_by_phandle() and friends. For SoCs that don't require a custom regmap, revert back to syscon creating the mmio regmap rather than duplicating the logic here. exynos_get_pmu_regmap_by_phandle() api is also updated to retrieve the regmap via syscon. The exynos_get_pmu_regmap_by_phandle() api is kept around until fw_devlink support for syscon property is added for the pinctrl-samsung driver that also runs at postcore_initcall level. All other exynos client drivers can revert back to syscon_regmap_lookup_by_phandle(). Signed-off-by: Peter Griffin Reviewed-by: Arnd Bergmann Reviewed-by: Sam Protsenko Tested-by: Will McVicker Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240621115544.1655458-3-peter.griffin@linaro.org Signed-off-by: Lee Jones --- drivers/soc/samsung/exynos-pmu.c | 40 ++++++++++++-------------------- 1 file changed, 15 insertions(+), 25 deletions(-) diff --git a/drivers/soc/samsung/exynos-pmu.c b/drivers/soc/samsung/exynos-pmu.c index fd8b6ac06656..624324f4001c 100644 --- a/drivers/soc/samsung/exynos-pmu.c +++ b/drivers/soc/samsung/exynos-pmu.c @@ -204,16 +204,6 @@ static const struct regmap_config regmap_smccfg = { .reg_update_bits = tensor_sec_update_bits, }; -static const struct regmap_config regmap_mmiocfg = { - .name = "pmu_regs", - .reg_bits = 32, - .reg_stride = 4, - .val_bits = 32, - .fast_io = true, - .use_single_read = true, - .use_single_write = true, -}; - static const struct exynos_pmu_data gs101_pmu_data = { .pmu_secure = true }; @@ -290,7 +280,6 @@ EXPORT_SYMBOL_GPL(exynos_get_pmu_regmap); struct regmap *exynos_get_pmu_regmap_by_phandle(struct device_node *np, const char *propname) { - struct exynos_pmu_context *ctx; struct device_node *pmu_np; struct device *dev; @@ -316,9 +305,7 @@ struct regmap *exynos_get_pmu_regmap_by_phandle(struct device_node *np, if (!dev) return ERR_PTR(-EPROBE_DEFER); - ctx = dev_get_drvdata(dev); - - return ctx->pmureg; + return syscon_node_to_regmap(pmu_np); } EXPORT_SYMBOL_GPL(exynos_get_pmu_regmap_by_phandle); @@ -355,18 +342,21 @@ static int exynos_pmu_probe(struct platform_device *pdev) regmap = devm_regmap_init(dev, NULL, (void *)(uintptr_t)res->start, &pmu_regmcfg); - } else { - /* All other SoCs use a MMIO regmap */ - pmu_regmcfg = regmap_mmiocfg; - pmu_regmcfg.max_register = resource_size(res) - - pmu_regmcfg.reg_stride; - regmap = devm_regmap_init_mmio(dev, pmu_base_addr, - &pmu_regmcfg); - } - if (IS_ERR(regmap)) - return dev_err_probe(&pdev->dev, PTR_ERR(regmap), - "regmap init failed\n"); + if (IS_ERR(regmap)) + return dev_err_probe(&pdev->dev, PTR_ERR(regmap), + "regmap init failed\n"); + + ret = of_syscon_register_regmap(dev->of_node, regmap); + if (ret) + return ret; + } else { + /* let syscon create mmio regmap */ + regmap = syscon_node_to_regmap(dev->of_node); + if (IS_ERR(regmap)) + return dev_err_probe(&pdev->dev, PTR_ERR(regmap), + "syscon_node_to_regmap failed\n"); + } pmu_context->pmureg = regmap; pmu_context->dev = dev; From 7661e680692e8cb70bf92f0e9b567849e2b6405a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 26 Jun 2024 12:09:10 +0200 Subject: [PATCH 23/87] dt-bindings: mfd: syscon: Drop hwlocks Apparently there is no in-tree DTS syscon node having hwlocks, so drop the property to simplify the binding. Acked-by: Rob Herring (Arm) Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240626-dt-bindings-mfd-syscon-split-v3-1-3409903bb99b@linaro.org Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/syscon.yaml | 5 ----- 1 file changed, 5 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 7ed12a938baa..0f8c26efa18a 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -112,11 +112,6 @@ properties: resets: maxItems: 1 - hwlocks: - maxItems: 1 - description: - Reference to a phandle of a hardware spinlock provider node. - required: - compatible - reg From cf87496ba236989a30995e9b98abd65651f5e629 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 26 Jun 2024 12:09:11 +0200 Subject: [PATCH 24/87] dt-bindings: soc: sprd: sc9863a-glbregs: Document SC9863A syscon Document sprd,sc9863a-glbregs compatible already used in DTS and other bindings example. Reviewed-by: Rob Herring (Arm) Reviewed-by: Baolin Wang Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240626-dt-bindings-mfd-syscon-split-v3-2-3409903bb99b@linaro.org Signed-off-by: Lee Jones --- .../soc/sprd/sprd,sc9863a-glbregs.yaml | 55 +++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/sprd/sprd,sc9863a-glbregs.yaml diff --git a/Documentation/devicetree/bindings/soc/sprd/sprd,sc9863a-glbregs.yaml b/Documentation/devicetree/bindings/soc/sprd/sprd,sc9863a-glbregs.yaml new file mode 100644 index 000000000000..49add564e5e1 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/sprd/sprd,sc9863a-glbregs.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/sprd/sprd,sc9863a-glbregs.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SC9863A Syscon + +maintainers: + - Orson Zhai + - Baolin Wang + - Chunyan Zhang + +properties: + compatible: + items: + - const: sprd,sc9863a-glbregs + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + ranges: true + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + +patternProperties: + "@[0-9a-f]+$": + $ref: /schemas/clock/sprd,sc9863a-clk.yaml + description: Clock controllers + +additionalProperties: false + +examples: + - | + syscon@20e00000 { + compatible = "sprd,sc9863a-glbregs", "syscon", "simple-mfd"; + reg = <0x20e00000 0x4000>; + ranges = <0 0x20e00000 0x4000>; + #address-cells = <1>; + #size-cells = <1>; + + apahb_gate: apahb-gate@0 { + compatible = "sprd,sc9863a-apahb-gate"; + reg = <0x0 0x1020>; + #clock-cells = <1>; + }; + }; + +... From c94ee67abd9d22d2f8cff93b3581d99695babe9f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 26 Jun 2024 12:09:12 +0200 Subject: [PATCH 25/87] dt-bindings: soc: intel: lgm-syscon: Move to dedicated schema intel,lgm-syscon is not a simple syscon device - it has children - thus it should be fully documented in its own binding. Reviewed-by: Conor Dooley Reviewed-by: Rob Herring (Arm) Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240626-dt-bindings-mfd-syscon-split-v3-3-3409903bb99b@linaro.org Signed-off-by: Lee Jones --- .../devicetree/bindings/mfd/syscon.yaml | 1 - .../bindings/soc/intel/intel,lgm-syscon.yaml | 57 +++++++++++++++++++ 2 files changed, 57 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/soc/intel/intel,lgm-syscon.yaml diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 0f8c26efa18a..99838787d437 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -57,7 +57,6 @@ properties: - hisilicon,pcie-sas-subctrl - hisilicon,peri-subctrl - hpe,gxp-sysreg - - intel,lgm-syscon - loongson,ls1b-syscon - loongson,ls1c-syscon - marvell,armada-3700-cpu-misc diff --git a/Documentation/devicetree/bindings/soc/intel/intel,lgm-syscon.yaml b/Documentation/devicetree/bindings/soc/intel/intel,lgm-syscon.yaml new file mode 100644 index 000000000000..6951d55356d5 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/intel/intel,lgm-syscon.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/intel/intel,lgm-syscon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel Lightning Mountain(LGM) Syscon + +maintainers: + - Chuanhua Lei + - Rahul Tanwar + +properties: + compatible: + items: + - const: intel,lgm-syscon + - const: syscon + + reg: + maxItems: 1 + + ranges: true + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + +patternProperties: + "^emmc-phy@[0-9a-f]+$": + $ref: /schemas/phy/intel,lgm-emmc-phy.yaml# + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + +additionalProperties: false + +examples: + - | + chiptop@e0200000 { + compatible = "intel,lgm-syscon", "syscon"; + reg = <0xe0200000 0x100>; + ranges = <0x0 0xe0200000 0x100>; + #address-cells = <1>; + #size-cells = <1>; + + emmc-phy@a8 { + compatible = "intel,lgm-emmc-phy"; + reg = <0x00a8 0x10>; + clocks = <&emmc>; + #phy-cells = <0>; + }; + }; From 430ed952ed57bab9164a4bdfd0e73c6c523f11b0 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 26 Jun 2024 12:09:13 +0200 Subject: [PATCH 26/87] dt-bindings: soc: microchip: sparx5-cpu-syscon: Move to dedicated schema microchip,sparx5-cpu-syscon is not a simple syscon device - it has children and implements simple-mfd compatible - thus it should be fully documented in its own binding. Reviewed-by: Rob Herring (Arm) Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240626-dt-bindings-mfd-syscon-split-v3-4-3409903bb99b@linaro.org Signed-off-by: Lee Jones --- .../devicetree/bindings/mfd/syscon.yaml | 1 - .../microchip,sparx5-cpu-syscon.yaml | 49 +++++++++++++++++++ 2 files changed, 49 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,sparx5-cpu-syscon.yaml diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 99838787d437..7d0027cbca2c 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -70,7 +70,6 @@ properties: - mediatek,mt8173-pctl-a-syscfg - mediatek,mt8365-syscfg - microchip,lan966x-cpu-syscon - - microchip,sparx5-cpu-syscon - mstar,msc313-pmsleep - nuvoton,ma35d1-sys - nuvoton,wpcm450-shm diff --git a/Documentation/devicetree/bindings/soc/microchip/microchip,sparx5-cpu-syscon.yaml b/Documentation/devicetree/bindings/soc/microchip/microchip,sparx5-cpu-syscon.yaml new file mode 100644 index 000000000000..1f0b542d2296 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/microchip/microchip,sparx5-cpu-syscon.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/microchip/microchip,sparx5-cpu-syscon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip Sparx5 CPU Syscon + +maintainers: + - Lars Povlsen + +properties: + compatible: + items: + - const: microchip,sparx5-cpu-syscon + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + mux-controller: + $ref: /schemas/mux/reg-mux.yaml# + +required: + - compatible + - reg + - mux-controller + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <1>; + + syscon@600000000 { + compatible = "microchip,sparx5-cpu-syscon", "syscon", + "simple-mfd"; + reg = <0x6 0x00000000 0xd0>; + + mux: mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x88 0xf0>; + }; + }; + }; From 174614d889a2315ebe48b7138db5cde9cc6428e5 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 26 Jun 2024 12:09:14 +0200 Subject: [PATCH 27/87] dt-bindings: soc: ti: am654-serdes-ctrl: Move to dedicated schema ti,am654-serdes-ctrl is not a simple syscon device - it has children - thus it should be fully documented in its own binding. Reviewed-by: Rob Herring (Arm) Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240626-dt-bindings-mfd-syscon-split-v3-5-3409903bb99b@linaro.org Signed-off-by: Lee Jones --- .../devicetree/bindings/mfd/syscon.yaml | 1 - .../bindings/soc/ti/ti,am654-serdes-ctrl.yaml | 42 +++++++++++++++++++ 2 files changed, 42 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/soc/ti/ti,am654-serdes-ctrl.yaml diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 7d0027cbca2c..d331bb260a63 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -88,7 +88,6 @@ properties: - ti,am62-usb-phy-ctrl - ti,am62p-cpsw-mac-efuse - ti,am654-dss-oldi-io-ctrl - - ti,am654-serdes-ctrl - ti,j784s4-pcie-ctrl - const: syscon diff --git a/Documentation/devicetree/bindings/soc/ti/ti,am654-serdes-ctrl.yaml b/Documentation/devicetree/bindings/soc/ti/ti,am654-serdes-ctrl.yaml new file mode 100644 index 000000000000..a10a3b89ae05 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/ti/ti,am654-serdes-ctrl.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/ti/ti,am654-serdes-ctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments AM654 Serdes Control Syscon + +maintainers: + - Nishanth Menon + +properties: + compatible: + items: + - const: ti,am654-serdes-ctrl + - const: syscon + + reg: + maxItems: 1 + + mux-controller: + $ref: /schemas/mux/reg-mux.yaml# + +required: + - compatible + - reg + - mux-controller + +additionalProperties: false + +examples: + - | + clock@4080 { + compatible = "ti,am654-serdes-ctrl", "syscon"; + reg = <0x4080 0x4>; + + mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x0 0x3>; /* lane select */ + }; + }; From fd6e053d23ddf7c1b2c94d2aa8e53d8bc698c052 Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Thu, 27 Jun 2024 10:42:56 +0300 Subject: [PATCH 28/87] dt-bindings: ROHM BD96801 PMIC regulators ROHM BD96801 is a highly configurable automotive grade PMIC. Introduce DT bindings for the BD96801 regulators. Signed-off-by: Matti Vaittinen Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/53a05b77833cb3f06ecada906411c2f46eecea64.1719473802.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones --- .../regulator/rohm,bd96801-regulator.yaml | 63 +++++++++++++++++++ 1 file changed, 63 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/rohm,bd96801-regulator.yaml diff --git a/Documentation/devicetree/bindings/regulator/rohm,bd96801-regulator.yaml b/Documentation/devicetree/bindings/regulator/rohm,bd96801-regulator.yaml new file mode 100644 index 000000000000..b3d2d7d583ce --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/rohm,bd96801-regulator.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/rohm,bd96801-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ROHM BD96801 Power Management Integrated Circuit regulators + +maintainers: + - Matti Vaittinen + +description: + This module is part of the ROHM BD96801 MFD device. For more details + see Documentation/devicetree/bindings/mfd/rohm,bd96801-pmic.yaml. + + The regulator controller is represented as a sub-node of the PMIC node + on the device tree. + + Regulator nodes should be named to buck_ and ldo_. + The valid names for BD96801 regulator nodes are + buck1, buck2, buck3, buck4, ldo5, ldo6, ldo7 + +patternProperties: + "^ldo[5-7]$": + type: object + description: + Properties for single LDO regulator. + $ref: regulator.yaml# + + properties: + rohm,initial-voltage-microvolt: + description: + Initial voltage for regulator. Voltage can be tuned +/-150 mV from + this value. NOTE, This can be modified via I2C only when PMIC is in + STBY state. + minimum: 300000 + maximum: 3300000 + + unevaluatedProperties: false + + "^buck[1-4]$": + type: object + description: + Properties for single BUCK regulator. + $ref: regulator.yaml# + + properties: + rohm,initial-voltage-microvolt: + description: + Initial voltage for regulator. Voltage can be tuned +/-150 mV from + this value. NOTE, This can be modified via I2C only when PMIC is in + STBY state. + minimum: 500000 + maximum: 3300000 + + rohm,keep-on-stby: + description: + Keep the regulator powered when PMIC transitions to STBY state. + type: boolean + + unevaluatedProperties: false + +additionalProperties: false From 8b1a39362ba989849bc3978d03f56f6eb3f290b3 Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Thu, 27 Jun 2024 10:43:12 +0300 Subject: [PATCH 29/87] dt-bindings: mfd: bd96801 PMIC core ROHM BD96801 is a highly configurable automotive grade PMIC. Introduce DT bindings for the BD96801 core. Signed-off-by: Matti Vaittinen Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/9fa3f30dede2b85871a89b20fe1eb13549418489.1719473802.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones --- .../bindings/mfd/rohm,bd96801-pmic.yaml | 173 ++++++++++++++++++ 1 file changed, 173 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/rohm,bd96801-pmic.yaml diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd96801-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd96801-pmic.yaml new file mode 100644 index 000000000000..d381125a0a15 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/rohm,bd96801-pmic.yaml @@ -0,0 +1,173 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/rohm,bd96801-pmic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ROHM BD96801 Scalable Power Management Integrated Circuit + +maintainers: + - Matti Vaittinen + +description: + BD96801 is an automotive grade single-chip power management IC. + It integrates 4 buck converters and 3 LDOs with safety features like + over-/under voltage and over current detection and a watchdog. + +properties: + compatible: + const: rohm,bd96801 + + reg: + maxItems: 1 + + interrupts: + description: + The PMIC provides intb and errb IRQ lines. The errb IRQ line is used + for fatal IRQs which will cause the PMIC to shut down power outputs. + In many systems this will shut down the SoC contolling the PMIC and + connecting/handling the errb can be omitted. However, there are cases + where the SoC is not powered by the PMIC or has a short time backup + energy to handle shutdown of critical hardware. In that case it may be + useful to connect the errb and handle errb events. + minItems: 1 + maxItems: 2 + + interrupt-names: + minItems: 1 + items: + - enum: [intb, errb] + - const: errb + + rohm,hw-timeout-ms: + description: + Watchdog timeout value(s). First walue is timeout limit. Second value is + optional value for 'too early' watchdog ping if window timeout mode is + to be used. + minItems: 1 + maxItems: 2 + + rohm,wdg-action: + description: + Whether the watchdog failure must turn off the regulator power outputs or + just toggle the INTB line. + enum: + - prstb + - intb-only + + timeout-sec: + maxItems: 2 + + regulators: + $ref: /schemas/regulator/rohm,bd96801-regulator.yaml + description: + List of child nodes that specify the regulators. + +required: + - compatible + - reg + - interrupts + - interrupt-names + - regulators + +additionalProperties: false + +examples: + - | + #include + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + pmic: pmic@60 { + reg = <0x60>; + compatible = "rohm,bd96801"; + interrupt-parent = <&gpio1>; + interrupts = <29 IRQ_TYPE_LEVEL_LOW>, <6 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "intb", "errb"; + + regulators { + buck1 { + regulator-name = "buck1"; + regulator-ramp-delay = <1250>; + /* 0.5V min INITIAL - 150 mV tune */ + regulator-min-microvolt = <350000>; + /* 3.3V + 150mV tune */ + regulator-max-microvolt = <3450000>; + + /* These can be set only when PMIC is in STBY */ + rohm,initial-voltage-microvolt = <500000>; + regulator-ov-error-microvolt = <230000>; + regulator-uv-error-microvolt = <230000>; + regulator-temp-protection-kelvin = <1>; + regulator-temp-warn-kelvin = <0>; + }; + buck2 { + regulator-name = "buck2"; + regulator-min-microvolt = <350000>; + regulator-max-microvolt = <3450000>; + + rohm,initial-voltage-microvolt = <3000000>; + regulator-ov-error-microvolt = <18000>; + regulator-uv-error-microvolt = <18000>; + regulator-temp-protection-kelvin = <1>; + regulator-temp-warn-kelvin = <1>; + }; + buck3 { + regulator-name = "buck3"; + regulator-min-microvolt = <350000>; + regulator-max-microvolt = <3450000>; + + rohm,initial-voltage-microvolt = <600000>; + regulator-ov-warn-microvolt = <18000>; + regulator-uv-warn-microvolt = <18000>; + regulator-temp-protection-kelvin = <1>; + regulator-temp-error-kelvin = <0>; + }; + buck4 { + regulator-name = "buck4"; + regulator-min-microvolt = <350000>; + regulator-max-microvolt = <3450000>; + + rohm,initial-voltage-microvolt = <600000>; + regulator-ov-warn-microvolt = <18000>; + regulator-uv-warn-microvolt = <18000>; + regulator-temp-protection-kelvin = <1>; + regulator-temp-error-kelvin = <0>; + }; + ldo5 { + regulator-name = "ldo5"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <3300000>; + + rohm,initial-voltage-microvolt = <500000>; + regulator-ov-error-microvolt = <36000>; + regulator-uv-error-microvolt = <34000>; + regulator-temp-protection-kelvin = <1>; + regulator-temp-warn-kelvin = <0>; + }; + ldo6 { + regulator-name = "ldo6"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <3300000>; + + rohm,initial-voltage-microvolt = <300000>; + regulator-ov-error-microvolt = <36000>; + regulator-uv-error-microvolt = <34000>; + regulator-temp-protection-kelvin = <1>; + regulator-temp-warn-kelvin = <0>; + }; + ldo7 { + regulator-name = "ldo7"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <3300000>; + + rohm,initial-voltage-microvolt = <500000>; + regulator-ov-error-microvolt = <36000>; + regulator-uv-error-microvolt = <34000>; + regulator-temp-protection-kelvin = <1>; + regulator-temp-warn-kelvin = <0>; + }; + }; + }; + }; From 7276f425b744a81eb5a8e519b0c452d5e64b530c Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Thu, 27 Jun 2024 10:43:27 +0300 Subject: [PATCH 30/87] mfd: support ROHM BD96801 PMIC core The ROHM BD96801 PMIC is highly customizable automotive grade PMIC which integrates regulator and watchdog funtionalities. Provide INTB IRQ and register accesses for regulator/watchdog drivers. Signed-off-by: Matti Vaittinen Link: https://lore.kernel.org/r/c5260e2dd222e3c64cdf410802bba195637ccb93.1719473802.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 13 ++ drivers/mfd/Makefile | 1 + drivers/mfd/rohm-bd96801.c | 273 +++++++++++++++++++++++++++++++ include/linux/mfd/rohm-bd96801.h | 215 ++++++++++++++++++++++++ include/linux/mfd/rohm-generic.h | 1 + 5 files changed, 503 insertions(+) create mode 100644 drivers/mfd/rohm-bd96801.c create mode 100644 include/linux/mfd/rohm-bd96801.h diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 266b4f54af60..68cc7af9ef97 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -2089,6 +2089,19 @@ config MFD_ROHM_BD957XMUF BD9573MUF Power Management ICs. BD9576 and BD9573 are primarily designed to be used to power R-Car series processors. +config MFD_ROHM_BD96801 + tristate "ROHM BD96801 Power Management IC" + depends on I2C=y + depends on OF + select REGMAP_I2C + select REGMAP_IRQ + select MFD_CORE + help + Select this option to get support for the ROHM BD96801 Power + Management IC. The ROHM BD96801 is a highly scalable Power Management + IC for industrial and automotive use. The BD96801 can be used as a + master PMIC in a chained PMIC solution with suitable companion PMICs. + config MFD_STM32_LPTIMER tristate "Support for STM32 Low-Power Timer" depends on (ARCH_STM32 && OF) || COMPILE_TEST diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index c66f07edcd0e..e792892d4a8b 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -264,6 +264,7 @@ obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o obj-$(CONFIG_MFD_ROHM_BD71828) += rohm-bd71828.o obj-$(CONFIG_MFD_ROHM_BD718XX) += rohm-bd718x7.o obj-$(CONFIG_MFD_ROHM_BD957XMUF) += rohm-bd9576.o +obj-$(CONFIG_MFD_ROHM_BD96801) += rohm-bd96801.o obj-$(CONFIG_MFD_STMFX) += stmfx.o obj-$(CONFIG_MFD_KHADAS_MCU) += khadas-mcu.o obj-$(CONFIG_MFD_ACER_A500_EC) += acer-ec-a500.o diff --git a/drivers/mfd/rohm-bd96801.c b/drivers/mfd/rohm-bd96801.c new file mode 100644 index 000000000000..714f08ed544b --- /dev/null +++ b/drivers/mfd/rohm-bd96801.c @@ -0,0 +1,273 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2024 ROHM Semiconductors + * + * ROHM BD96801 PMIC driver + * + * This version of the "BD86801 scalable PMIC"'s driver supports only very + * basic set of the PMIC features. Most notably, there is no support for + * the ERRB interrupt and the configurations which should be done when the + * PMIC is in STBY mode. + * + * Supporting the ERRB interrupt would require dropping the regmap-IRQ + * usage or working around (or accepting a presense of) a naming conflict + * in debugFS IRQs. + * + * Being able to reliably do the configurations like changing the + * regulator safety limits (like limits for the over/under -voltages, over + * current, thermal protection) would require the configuring driver to be + * synchronized with entity causing the PMIC state transitions. Eg, one + * should be able to ensure the PMIC is in STBY state when the + * configurations are applied to the hardware. How and when the PMIC state + * transitions are to be done is likely to be very system specific, as will + * be the need to configure these safety limits. Hence it's not simple to + * come up with a generic solution. + * + * Users who require the ERRB handling and STBY state configurations can + * have a look at the original RFC: + * https://lore.kernel.org/all/cover.1712920132.git.mazziesaccount@gmail.com/ + * which implements a workaround to debugFS naming conflict and some of + * the safety limit configurations - but leaves the state change handling + * and synchronization to be implemented. + * + * It would be great to hear (and receive a patch!) if you implement the + * STBY configuration support or a proper fix to the debugFS naming + * conflict in your downstream driver ;) + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +static const struct resource regulator_intb_irqs[] = { + DEFINE_RES_IRQ_NAMED(BD96801_TW_STAT, "bd96801-core-thermal"), + + DEFINE_RES_IRQ_NAMED(BD96801_BUCK1_OCPH_STAT, "bd96801-buck1-overcurr-h"), + DEFINE_RES_IRQ_NAMED(BD96801_BUCK1_OCPL_STAT, "bd96801-buck1-overcurr-l"), + DEFINE_RES_IRQ_NAMED(BD96801_BUCK1_OCPN_STAT, "bd96801-buck1-overcurr-n"), + DEFINE_RES_IRQ_NAMED(BD96801_BUCK1_OVD_STAT, "bd96801-buck1-overvolt"), + DEFINE_RES_IRQ_NAMED(BD96801_BUCK1_UVD_STAT, "bd96801-buck1-undervolt"), + DEFINE_RES_IRQ_NAMED(BD96801_BUCK1_TW_CH_STAT, "bd96801-buck1-thermal"), + + DEFINE_RES_IRQ_NAMED(BD96801_BUCK2_OCPH_STAT, "bd96801-buck2-overcurr-h"), + DEFINE_RES_IRQ_NAMED(BD96801_BUCK2_OCPL_STAT, "bd96801-buck2-overcurr-l"), + DEFINE_RES_IRQ_NAMED(BD96801_BUCK2_OCPN_STAT, "bd96801-buck2-overcurr-n"), + DEFINE_RES_IRQ_NAMED(BD96801_BUCK2_OVD_STAT, "bd96801-buck2-overvolt"), + DEFINE_RES_IRQ_NAMED(BD96801_BUCK2_UVD_STAT, "bd96801-buck2-undervolt"), + DEFINE_RES_IRQ_NAMED(BD96801_BUCK2_TW_CH_STAT, "bd96801-buck2-thermal"), + + DEFINE_RES_IRQ_NAMED(BD96801_BUCK3_OCPH_STAT, "bd96801-buck3-overcurr-h"), + DEFINE_RES_IRQ_NAMED(BD96801_BUCK3_OCPL_STAT, "bd96801-buck3-overcurr-l"), + DEFINE_RES_IRQ_NAMED(BD96801_BUCK3_OCPN_STAT, "bd96801-buck3-overcurr-n"), + DEFINE_RES_IRQ_NAMED(BD96801_BUCK3_OVD_STAT, "bd96801-buck3-overvolt"), + DEFINE_RES_IRQ_NAMED(BD96801_BUCK3_UVD_STAT, "bd96801-buck3-undervolt"), + DEFINE_RES_IRQ_NAMED(BD96801_BUCK3_TW_CH_STAT, "bd96801-buck3-thermal"), + + DEFINE_RES_IRQ_NAMED(BD96801_BUCK4_OCPH_STAT, "bd96801-buck4-overcurr-h"), + DEFINE_RES_IRQ_NAMED(BD96801_BUCK4_OCPL_STAT, "bd96801-buck4-overcurr-l"), + DEFINE_RES_IRQ_NAMED(BD96801_BUCK4_OCPN_STAT, "bd96801-buck4-overcurr-n"), + DEFINE_RES_IRQ_NAMED(BD96801_BUCK4_OVD_STAT, "bd96801-buck4-overvolt"), + DEFINE_RES_IRQ_NAMED(BD96801_BUCK4_UVD_STAT, "bd96801-buck4-undervolt"), + DEFINE_RES_IRQ_NAMED(BD96801_BUCK4_TW_CH_STAT, "bd96801-buck4-thermal"), + + DEFINE_RES_IRQ_NAMED(BD96801_LDO5_OCPH_STAT, "bd96801-ldo5-overcurr"), + DEFINE_RES_IRQ_NAMED(BD96801_LDO5_OVD_STAT, "bd96801-ldo5-overvolt"), + DEFINE_RES_IRQ_NAMED(BD96801_LDO5_UVD_STAT, "bd96801-ldo5-undervolt"), + + DEFINE_RES_IRQ_NAMED(BD96801_LDO6_OCPH_STAT, "bd96801-ldo6-overcurr"), + DEFINE_RES_IRQ_NAMED(BD96801_LDO6_OVD_STAT, "bd96801-ldo6-overvolt"), + DEFINE_RES_IRQ_NAMED(BD96801_LDO6_UVD_STAT, "bd96801-ldo6-undervolt"), + + DEFINE_RES_IRQ_NAMED(BD96801_LDO7_OCPH_STAT, "bd96801-ldo7-overcurr"), + DEFINE_RES_IRQ_NAMED(BD96801_LDO7_OVD_STAT, "bd96801-ldo7-overvolt"), + DEFINE_RES_IRQ_NAMED(BD96801_LDO7_UVD_STAT, "bd96801-ldo7-undervolt"), +}; + +static const struct resource wdg_intb_irqs[] = { + DEFINE_RES_IRQ_NAMED(BD96801_WDT_ERR_STAT, "bd96801-wdg"), +}; + +static struct mfd_cell bd96801_cells[] = { + { + .name = "bd96801-wdt", + .resources = wdg_intb_irqs, + .num_resources = ARRAY_SIZE(wdg_intb_irqs), + }, { + .name = "bd96801-regulator", + .resources = regulator_intb_irqs, + .num_resources = ARRAY_SIZE(regulator_intb_irqs), + }, +}; + +static const struct regmap_range bd96801_volatile_ranges[] = { + /* Status registers */ + regmap_reg_range(BD96801_REG_WD_FEED, BD96801_REG_WD_FAILCOUNT), + regmap_reg_range(BD96801_REG_WD_ASK, BD96801_REG_WD_ASK), + regmap_reg_range(BD96801_REG_WD_STATUS, BD96801_REG_WD_STATUS), + regmap_reg_range(BD96801_REG_PMIC_STATE, BD96801_REG_INT_LDO7_INTB), + /* Registers which do not update value unless PMIC is in STBY */ + regmap_reg_range(BD96801_REG_SSCG_CTRL, BD96801_REG_SHD_INTB), + regmap_reg_range(BD96801_REG_BUCK_OVP, BD96801_REG_BOOT_OVERTIME), + /* + * LDO control registers have single bit (LDO MODE) which does not + * change when we write it unless PMIC is in STBY. It's safer to not + * cache it. + */ + regmap_reg_range(BD96801_LDO5_VOL_LVL_REG, BD96801_LDO7_VOL_LVL_REG), +}; + +static const struct regmap_access_table volatile_regs = { + .yes_ranges = bd96801_volatile_ranges, + .n_yes_ranges = ARRAY_SIZE(bd96801_volatile_ranges), +}; + +static const struct regmap_irq bd96801_intb_irqs[] = { + /* STATUS SYSTEM INTB */ + REGMAP_IRQ_REG(BD96801_TW_STAT, 0, BD96801_TW_STAT_MASK), + REGMAP_IRQ_REG(BD96801_WDT_ERR_STAT, 0, BD96801_WDT_ERR_STAT_MASK), + REGMAP_IRQ_REG(BD96801_I2C_ERR_STAT, 0, BD96801_I2C_ERR_STAT_MASK), + REGMAP_IRQ_REG(BD96801_CHIP_IF_ERR_STAT, 0, BD96801_CHIP_IF_ERR_STAT_MASK), + /* STATUS BUCK1 INTB */ + REGMAP_IRQ_REG(BD96801_BUCK1_OCPH_STAT, 1, BD96801_BUCK_OCPH_STAT_MASK), + REGMAP_IRQ_REG(BD96801_BUCK1_OCPL_STAT, 1, BD96801_BUCK_OCPL_STAT_MASK), + REGMAP_IRQ_REG(BD96801_BUCK1_OCPN_STAT, 1, BD96801_BUCK_OCPN_STAT_MASK), + REGMAP_IRQ_REG(BD96801_BUCK1_OVD_STAT, 1, BD96801_BUCK_OVD_STAT_MASK), + REGMAP_IRQ_REG(BD96801_BUCK1_UVD_STAT, 1, BD96801_BUCK_UVD_STAT_MASK), + REGMAP_IRQ_REG(BD96801_BUCK1_TW_CH_STAT, 1, BD96801_BUCK_TW_CH_STAT_MASK), + /* BUCK 2 INTB */ + REGMAP_IRQ_REG(BD96801_BUCK2_OCPH_STAT, 2, BD96801_BUCK_OCPH_STAT_MASK), + REGMAP_IRQ_REG(BD96801_BUCK2_OCPL_STAT, 2, BD96801_BUCK_OCPL_STAT_MASK), + REGMAP_IRQ_REG(BD96801_BUCK2_OCPN_STAT, 2, BD96801_BUCK_OCPN_STAT_MASK), + REGMAP_IRQ_REG(BD96801_BUCK2_OVD_STAT, 2, BD96801_BUCK_OVD_STAT_MASK), + REGMAP_IRQ_REG(BD96801_BUCK2_UVD_STAT, 2, BD96801_BUCK_UVD_STAT_MASK), + REGMAP_IRQ_REG(BD96801_BUCK2_TW_CH_STAT, 2, BD96801_BUCK_TW_CH_STAT_MASK), + /* BUCK 3 INTB */ + REGMAP_IRQ_REG(BD96801_BUCK3_OCPH_STAT, 3, BD96801_BUCK_OCPH_STAT_MASK), + REGMAP_IRQ_REG(BD96801_BUCK3_OCPL_STAT, 3, BD96801_BUCK_OCPL_STAT_MASK), + REGMAP_IRQ_REG(BD96801_BUCK3_OCPN_STAT, 3, BD96801_BUCK_OCPN_STAT_MASK), + REGMAP_IRQ_REG(BD96801_BUCK3_OVD_STAT, 3, BD96801_BUCK_OVD_STAT_MASK), + REGMAP_IRQ_REG(BD96801_BUCK3_UVD_STAT, 3, BD96801_BUCK_UVD_STAT_MASK), + REGMAP_IRQ_REG(BD96801_BUCK3_TW_CH_STAT, 3, BD96801_BUCK_TW_CH_STAT_MASK), + /* BUCK 4 INTB */ + REGMAP_IRQ_REG(BD96801_BUCK4_OCPH_STAT, 4, BD96801_BUCK_OCPH_STAT_MASK), + REGMAP_IRQ_REG(BD96801_BUCK4_OCPL_STAT, 4, BD96801_BUCK_OCPL_STAT_MASK), + REGMAP_IRQ_REG(BD96801_BUCK4_OCPN_STAT, 4, BD96801_BUCK_OCPN_STAT_MASK), + REGMAP_IRQ_REG(BD96801_BUCK4_OVD_STAT, 4, BD96801_BUCK_OVD_STAT_MASK), + REGMAP_IRQ_REG(BD96801_BUCK4_UVD_STAT, 4, BD96801_BUCK_UVD_STAT_MASK), + REGMAP_IRQ_REG(BD96801_BUCK4_TW_CH_STAT, 4, BD96801_BUCK_TW_CH_STAT_MASK), + /* LDO5 INTB */ + REGMAP_IRQ_REG(BD96801_LDO5_OCPH_STAT, 5, BD96801_LDO_OCPH_STAT_MASK), + REGMAP_IRQ_REG(BD96801_LDO5_OVD_STAT, 5, BD96801_LDO_OVD_STAT_MASK), + REGMAP_IRQ_REG(BD96801_LDO5_UVD_STAT, 5, BD96801_LDO_UVD_STAT_MASK), + /* LDO6 INTB */ + REGMAP_IRQ_REG(BD96801_LDO6_OCPH_STAT, 6, BD96801_LDO_OCPH_STAT_MASK), + REGMAP_IRQ_REG(BD96801_LDO6_OVD_STAT, 6, BD96801_LDO_OVD_STAT_MASK), + REGMAP_IRQ_REG(BD96801_LDO6_UVD_STAT, 6, BD96801_LDO_UVD_STAT_MASK), + /* LDO7 INTB */ + REGMAP_IRQ_REG(BD96801_LDO7_OCPH_STAT, 7, BD96801_LDO_OCPH_STAT_MASK), + REGMAP_IRQ_REG(BD96801_LDO7_OVD_STAT, 7, BD96801_LDO_OVD_STAT_MASK), + REGMAP_IRQ_REG(BD96801_LDO7_UVD_STAT, 7, BD96801_LDO_UVD_STAT_MASK), +}; + +static struct regmap_irq_chip bd96801_irq_chip_intb = { + .name = "bd96801-irq-intb", + .main_status = BD96801_REG_INT_MAIN, + .num_main_regs = 1, + .irqs = &bd96801_intb_irqs[0], + .num_irqs = ARRAY_SIZE(bd96801_intb_irqs), + .status_base = BD96801_REG_INT_SYS_INTB, + .mask_base = BD96801_REG_MASK_SYS_INTB, + .ack_base = BD96801_REG_INT_SYS_INTB, + .init_ack_masked = true, + .num_regs = 8, + .irq_reg_stride = 1, +}; + +static const struct regmap_config bd96801_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .volatile_table = &volatile_regs, + .cache_type = REGCACHE_RBTREE, +}; + +static int bd96801_i2c_probe(struct i2c_client *i2c) +{ + struct regmap_irq_chip_data *intb_irq_data; + const struct fwnode_handle *fwnode; + struct irq_domain *intb_domain; + struct regmap *regmap; + int ret, intb_irq; + + fwnode = dev_fwnode(&i2c->dev); + if (!fwnode) + return dev_err_probe(&i2c->dev, -EINVAL, "Failed to find fwnode\n"); + + intb_irq = fwnode_irq_get_byname(fwnode, "intb"); + if (intb_irq < 0) + return dev_err_probe(&i2c->dev, intb_irq, "INTB IRQ not configured\n"); + + regmap = devm_regmap_init_i2c(i2c, &bd96801_regmap_config); + if (IS_ERR(regmap)) + return dev_err_probe(&i2c->dev, PTR_ERR(regmap), + "Regmap initialization failed\n"); + + ret = regmap_write(regmap, BD96801_LOCK_REG, BD96801_UNLOCK); + if (ret) + return dev_err_probe(&i2c->dev, ret, "Failed to unlock PMIC\n"); + + ret = devm_regmap_add_irq_chip(&i2c->dev, regmap, intb_irq, + IRQF_ONESHOT, 0, &bd96801_irq_chip_intb, + &intb_irq_data); + if (ret) + return dev_err_probe(&i2c->dev, ret, "Failed to add INTB IRQ chip\n"); + + intb_domain = regmap_irq_get_domain(intb_irq_data); + + ret = devm_mfd_add_devices(&i2c->dev, PLATFORM_DEVID_AUTO, + bd96801_cells, + ARRAY_SIZE(bd96801_cells), NULL, 0, + intb_domain); + if (ret) + dev_err(&i2c->dev, "Failed to create subdevices\n"); + + return ret; +} + +static const struct of_device_id bd96801_of_match[] = { + { .compatible = "rohm,bd96801", }, + { } +}; +MODULE_DEVICE_TABLE(of, bd96801_of_match); + +static struct i2c_driver bd96801_i2c_driver = { + .driver = { + .name = "rohm-bd96801", + .of_match_table = bd96801_of_match, + }, + .probe = bd96801_i2c_probe, +}; + +static int __init bd96801_i2c_init(void) +{ + return i2c_add_driver(&bd96801_i2c_driver); +} + +/* Initialise early so consumer devices can complete system boot */ +subsys_initcall(bd96801_i2c_init); + +static void __exit bd96801_i2c_exit(void) +{ + i2c_del_driver(&bd96801_i2c_driver); +} +module_exit(bd96801_i2c_exit); + +MODULE_AUTHOR("Matti Vaittinen "); +MODULE_DESCRIPTION("ROHM BD96801 Power Management IC driver"); +MODULE_LICENSE("GPL"); diff --git a/include/linux/mfd/rohm-bd96801.h b/include/linux/mfd/rohm-bd96801.h new file mode 100644 index 000000000000..e2d9e10b6364 --- /dev/null +++ b/include/linux/mfd/rohm-bd96801.h @@ -0,0 +1,215 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* Copyright (C) 2024 ROHM Semiconductors */ + +#ifndef __MFD_BD96801_H__ +#define __MFD_BD96801_H__ + +#define BD96801_REG_SSCG_CTRL 0x09 +#define BD96801_REG_SHD_INTB 0x20 +#define BD96801_LDO5_VOL_LVL_REG 0x2c +#define BD96801_LDO6_VOL_LVL_REG 0x2d +#define BD96801_LDO7_VOL_LVL_REG 0x2e +#define BD96801_REG_BUCK_OVP 0x30 +#define BD96801_REG_BUCK_OVD 0x35 +#define BD96801_REG_LDO_OVP 0x31 +#define BD96801_REG_LDO_OVD 0x36 +#define BD96801_REG_BOOT_OVERTIME 0x3a +#define BD96801_REG_WD_TMO 0x40 +#define BD96801_REG_WD_CONF 0x41 +#define BD96801_REG_WD_FEED 0x42 +#define BD96801_REG_WD_FAILCOUNT 0x43 +#define BD96801_REG_WD_ASK 0x46 +#define BD96801_REG_WD_STATUS 0x4a +#define BD96801_REG_PMIC_STATE 0x4f +#define BD96801_REG_EXT_STATE 0x50 + +#define BD96801_STATE_STBY 0x09 + +#define BD96801_LOCK_REG 0x04 +#define BD96801_UNLOCK 0x9d +#define BD96801_LOCK 0x00 + +/* IRQ register area */ +#define BD96801_REG_INT_MAIN 0x51 + +/* + * The BD96801 has two physical IRQ lines, INTB and ERRB. + * + * The 'main status register' is located at 0x51. + * The ERRB status registers are located at 0x52 ... 0x5B + * INTB status registers are at range 0x5c ... 0x63 + */ +#define BD96801_REG_INT_SYS_ERRB1 0x52 +#define BD96801_REG_INT_SYS_INTB 0x5c +#define BD96801_REG_INT_LDO7_INTB 0x63 + +/* MASK registers */ +#define BD96801_REG_MASK_SYS_INTB 0x73 +#define BD96801_REG_MASK_SYS_ERRB 0x69 + +#define BD96801_MAX_REGISTER 0x7a + +#define BD96801_OTP_ERR_MASK BIT(0) +#define BD96801_DBIST_ERR_MASK BIT(1) +#define BD96801_EEP_ERR_MASK BIT(2) +#define BD96801_ABIST_ERR_MASK BIT(3) +#define BD96801_PRSTB_ERR_MASK BIT(4) +#define BD96801_DRMOS1_ERR_MASK BIT(5) +#define BD96801_DRMOS2_ERR_MASK BIT(6) +#define BD96801_SLAVE_ERR_MASK BIT(7) +#define BD96801_VREF_ERR_MASK BIT(0) +#define BD96801_TSD_ERR_MASK BIT(1) +#define BD96801_UVLO_ERR_MASK BIT(2) +#define BD96801_OVLO_ERR_MASK BIT(3) +#define BD96801_OSC_ERR_MASK BIT(4) +#define BD96801_PON_ERR_MASK BIT(5) +#define BD96801_POFF_ERR_MASK BIT(6) +#define BD96801_CMD_SHDN_ERR_MASK BIT(7) +#define BD96801_INT_PRSTB_WDT_ERR_MASK BIT(0) +#define BD96801_INT_CHIP_IF_ERR_MASK BIT(3) +#define BD96801_INT_SHDN_ERR_MASK BIT(7) +#define BD96801_OUT_PVIN_ERR_MASK BIT(0) +#define BD96801_OUT_OVP_ERR_MASK BIT(1) +#define BD96801_OUT_UVP_ERR_MASK BIT(2) +#define BD96801_OUT_SHDN_ERR_MASK BIT(7) + +/* ERRB IRQs */ +enum { + /* Reg 0x52, 0x53, 0x54 - ERRB system IRQs */ + BD96801_OTP_ERR_STAT, + BD96801_DBIST_ERR_STAT, + BD96801_EEP_ERR_STAT, + BD96801_ABIST_ERR_STAT, + BD96801_PRSTB_ERR_STAT, + BD96801_DRMOS1_ERR_STAT, + BD96801_DRMOS2_ERR_STAT, + BD96801_SLAVE_ERR_STAT, + BD96801_VREF_ERR_STAT, + BD96801_TSD_ERR_STAT, + BD96801_UVLO_ERR_STAT, + BD96801_OVLO_ERR_STAT, + BD96801_OSC_ERR_STAT, + BD96801_PON_ERR_STAT, + BD96801_POFF_ERR_STAT, + BD96801_CMD_SHDN_ERR_STAT, + BD96801_INT_PRSTB_WDT_ERR, + BD96801_INT_CHIP_IF_ERR, + BD96801_INT_SHDN_ERR_STAT, + + /* Reg 0x55 BUCK1 ERR IRQs */ + BD96801_BUCK1_PVIN_ERR_STAT, + BD96801_BUCK1_OVP_ERR_STAT, + BD96801_BUCK1_UVP_ERR_STAT, + BD96801_BUCK1_SHDN_ERR_STAT, + + /* Reg 0x56 BUCK2 ERR IRQs */ + BD96801_BUCK2_PVIN_ERR_STAT, + BD96801_BUCK2_OVP_ERR_STAT, + BD96801_BUCK2_UVP_ERR_STAT, + BD96801_BUCK2_SHDN_ERR_STAT, + + /* Reg 0x57 BUCK3 ERR IRQs */ + BD96801_BUCK3_PVIN_ERR_STAT, + BD96801_BUCK3_OVP_ERR_STAT, + BD96801_BUCK3_UVP_ERR_STAT, + BD96801_BUCK3_SHDN_ERR_STAT, + + /* Reg 0x58 BUCK4 ERR IRQs */ + BD96801_BUCK4_PVIN_ERR_STAT, + BD96801_BUCK4_OVP_ERR_STAT, + BD96801_BUCK4_UVP_ERR_STAT, + BD96801_BUCK4_SHDN_ERR_STAT, + + /* Reg 0x59 LDO5 ERR IRQs */ + BD96801_LDO5_PVIN_ERR_STAT, + BD96801_LDO5_OVP_ERR_STAT, + BD96801_LDO5_UVP_ERR_STAT, + BD96801_LDO5_SHDN_ERR_STAT, + + /* Reg 0x5a LDO6 ERR IRQs */ + BD96801_LDO6_PVIN_ERR_STAT, + BD96801_LDO6_OVP_ERR_STAT, + BD96801_LDO6_UVP_ERR_STAT, + BD96801_LDO6_SHDN_ERR_STAT, + + /* Reg 0x5b LDO7 ERR IRQs */ + BD96801_LDO7_PVIN_ERR_STAT, + BD96801_LDO7_OVP_ERR_STAT, + BD96801_LDO7_UVP_ERR_STAT, + BD96801_LDO7_SHDN_ERR_STAT, +}; + +/* INTB IRQs */ +enum { + /* Reg 0x5c (System INTB) */ + BD96801_TW_STAT, + BD96801_WDT_ERR_STAT, + BD96801_I2C_ERR_STAT, + BD96801_CHIP_IF_ERR_STAT, + + /* Reg 0x5d (BUCK1 INTB) */ + BD96801_BUCK1_OCPH_STAT, + BD96801_BUCK1_OCPL_STAT, + BD96801_BUCK1_OCPN_STAT, + BD96801_BUCK1_OVD_STAT, + BD96801_BUCK1_UVD_STAT, + BD96801_BUCK1_TW_CH_STAT, + + /* Reg 0x5e (BUCK2 INTB) */ + BD96801_BUCK2_OCPH_STAT, + BD96801_BUCK2_OCPL_STAT, + BD96801_BUCK2_OCPN_STAT, + BD96801_BUCK2_OVD_STAT, + BD96801_BUCK2_UVD_STAT, + BD96801_BUCK2_TW_CH_STAT, + + /* Reg 0x5f (BUCK3 INTB)*/ + BD96801_BUCK3_OCPH_STAT, + BD96801_BUCK3_OCPL_STAT, + BD96801_BUCK3_OCPN_STAT, + BD96801_BUCK3_OVD_STAT, + BD96801_BUCK3_UVD_STAT, + BD96801_BUCK3_TW_CH_STAT, + + /* Reg 0x60 (BUCK4 INTB)*/ + BD96801_BUCK4_OCPH_STAT, + BD96801_BUCK4_OCPL_STAT, + BD96801_BUCK4_OCPN_STAT, + BD96801_BUCK4_OVD_STAT, + BD96801_BUCK4_UVD_STAT, + BD96801_BUCK4_TW_CH_STAT, + + /* Reg 0x61 (LDO5 INTB) */ + BD96801_LDO5_OCPH_STAT, /* bit [0] */ + BD96801_LDO5_OVD_STAT, /* bit [3] */ + BD96801_LDO5_UVD_STAT, /* bit [4] */ + + /* Reg 0x62 (LDO6 INTB) */ + BD96801_LDO6_OCPH_STAT, /* bit [0] */ + BD96801_LDO6_OVD_STAT, /* bit [3] */ + BD96801_LDO6_UVD_STAT, /* bit [4] */ + + /* Reg 0x63 (LDO7 INTB) */ + BD96801_LDO7_OCPH_STAT, /* bit [0] */ + BD96801_LDO7_OVD_STAT, /* bit [3] */ + BD96801_LDO7_UVD_STAT, /* bit [4] */ +}; + +/* IRQ MASKs */ +#define BD96801_TW_STAT_MASK BIT(0) +#define BD96801_WDT_ERR_STAT_MASK BIT(1) +#define BD96801_I2C_ERR_STAT_MASK BIT(2) +#define BD96801_CHIP_IF_ERR_STAT_MASK BIT(3) + +#define BD96801_BUCK_OCPH_STAT_MASK BIT(0) +#define BD96801_BUCK_OCPL_STAT_MASK BIT(1) +#define BD96801_BUCK_OCPN_STAT_MASK BIT(2) +#define BD96801_BUCK_OVD_STAT_MASK BIT(3) +#define BD96801_BUCK_UVD_STAT_MASK BIT(4) +#define BD96801_BUCK_TW_CH_STAT_MASK BIT(5) + +#define BD96801_LDO_OCPH_STAT_MASK BIT(0) +#define BD96801_LDO_OVD_STAT_MASK BIT(3) +#define BD96801_LDO_UVD_STAT_MASK BIT(4) + +#endif diff --git a/include/linux/mfd/rohm-generic.h b/include/linux/mfd/rohm-generic.h index 4eeb22876bad..e7d4e6afe388 100644 --- a/include/linux/mfd/rohm-generic.h +++ b/include/linux/mfd/rohm-generic.h @@ -16,6 +16,7 @@ enum rohm_chip_type { ROHM_CHIP_TYPE_BD71828, ROHM_CHIP_TYPE_BD71837, ROHM_CHIP_TYPE_BD71847, + ROHM_CHIP_TYPE_BD96801, ROHM_CHIP_TYPE_AMOUNT }; From a9b7ce28fd02aade85ce0baadcf6eedcf6147726 Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Thu, 27 Jun 2024 10:43:40 +0300 Subject: [PATCH 31/87] regulator: bd96801: ROHM BD96801 PMIC regulators The ROHM BD96801 "Scalable PMIC" is an automotive grade PMIC which can scale to different applications by allowing chaining of PMICs. The PMIC also supports various protection features which can be configured either to fire IRQs - or to shut down power outputs when failure is detected. The driver implements basic voltage control and sending error notifications. NOTE: The driver does not support doing configuration which require the PMIC to be in STBY state. The omitted feature set includes setting safety limit values, changing LDO voltages and controlling enable state for some regulators. Also, the ERRB IRQ is not handled. Signed-off-by: Matti Vaittinen Reviewed-by: Mark Brown Link: https://lore.kernel.org/r/50cf02b046df218a21a0f9c4820531d821fc20d4.1719473802.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones --- drivers/regulator/Kconfig | 12 + drivers/regulator/Makefile | 1 + drivers/regulator/bd96801-regulator.c | 908 ++++++++++++++++++++++++++ 3 files changed, 921 insertions(+) create mode 100644 drivers/regulator/bd96801-regulator.c diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index d333be2bea3b..88b8c1a23bcf 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -268,6 +268,18 @@ config REGULATOR_BD957XMUF This driver can also be built as a module. If so, the module will be called bd9576-regulator. +config REGULATOR_BD96801 + tristate "ROHM BD96801 Power Regulator" + depends on MFD_ROHM_BD96801 + select REGULATOR_ROHM + help + This driver supports voltage regulators on ROHM BD96801 PMIC. + This will enable support for the software controllable buck + and LDO regulators. + + This driver can also be built as a module. If so, the module + will be called bd96801-regulator. + config REGULATOR_CPCAP tristate "Motorola CPCAP regulator" depends on MFD_CPCAP diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index ba15fa5f30ad..9f36331df771 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -37,6 +37,7 @@ obj-$(CONFIG_REGULATOR_BD718XX) += bd718x7-regulator.o obj-$(CONFIG_REGULATOR_BD9571MWV) += bd9571mwv-regulator.o obj-$(CONFIG_REGULATOR_BD957XMUF) += bd9576-regulator.o obj-$(CONFIG_REGULATOR_DA903X) += da903x-regulator.o +obj-$(CONFIG_REGULATOR_BD96801) += bd96801-regulator.o obj-$(CONFIG_REGULATOR_DA9052) += da9052-regulator.o obj-$(CONFIG_REGULATOR_DA9055) += da9055-regulator.o obj-$(CONFIG_REGULATOR_DA9062) += da9062-regulator.o diff --git a/drivers/regulator/bd96801-regulator.c b/drivers/regulator/bd96801-regulator.c new file mode 100644 index 000000000000..46ca81f18703 --- /dev/null +++ b/drivers/regulator/bd96801-regulator.c @@ -0,0 +1,908 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2024 ROHM Semiconductors +// bd96801-regulator.c ROHM BD96801 regulator driver + +/* + * This version of the "BD86801 scalable PMIC"'s driver supports only very + * basic set of the PMIC features. Most notably, there is no support for + * the ERRB interrupt and the configurations which should be done when the + * PMIC is in STBY mode. + * + * Supporting the ERRB interrupt would require dropping the regmap-IRQ + * usage or working around (or accepting a presense of) a naming conflict + * in debugFS IRQs. + * + * Being able to reliably do the configurations like changing the + * regulator safety limits (like limits for the over/under -voltages, over + * current, thermal protection) would require the configuring driver to be + * synchronized with entity causing the PMIC state transitions. Eg, one + * should be able to ensure the PMIC is in STBY state when the + * configurations are applied to the hardware. How and when the PMIC state + * transitions are to be done is likely to be very system specific, as will + * be the need to configure these safety limits. Hence it's not simple to + * come up with a generic solution. + * + * Users who require the ERRB handling and STBY state configurations can + * have a look at the original RFC: + * https://lore.kernel.org/all/cover.1712920132.git.mazziesaccount@gmail.com/ + * which implements a workaround to debugFS naming conflict and some of + * the safety limit configurations - but leaves the state change handling + * and synchronization to be implemented. + * + * It would be great to hear (and receive a patch!) if you implement the + * STBY configuration support or a proper fix to the debugFS naming + * conflict in your downstream driver ;) + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +enum { + BD96801_BUCK1, + BD96801_BUCK2, + BD96801_BUCK3, + BD96801_BUCK4, + BD96801_LDO5, + BD96801_LDO6, + BD96801_LDO7, + BD96801_REGULATOR_AMOUNT, +}; + +enum { + BD96801_PROT_OVP, + BD96801_PROT_UVP, + BD96801_PROT_OCP, + BD96801_PROT_TEMP, + BD96801_NUM_PROT, +}; + +#define BD96801_ALWAYS_ON_REG 0x3c +#define BD96801_REG_ENABLE 0x0b +#define BD96801_BUCK1_EN_MASK BIT(0) +#define BD96801_BUCK2_EN_MASK BIT(1) +#define BD96801_BUCK3_EN_MASK BIT(2) +#define BD96801_BUCK4_EN_MASK BIT(3) +#define BD96801_LDO5_EN_MASK BIT(4) +#define BD96801_LDO6_EN_MASK BIT(5) +#define BD96801_LDO7_EN_MASK BIT(6) + +#define BD96801_BUCK1_VSEL_REG 0x28 +#define BD96801_BUCK2_VSEL_REG 0x29 +#define BD96801_BUCK3_VSEL_REG 0x2a +#define BD96801_BUCK4_VSEL_REG 0x2b +#define BD96801_LDO5_VSEL_REG 0x25 +#define BD96801_LDO6_VSEL_REG 0x26 +#define BD96801_LDO7_VSEL_REG 0x27 +#define BD96801_BUCK_VSEL_MASK 0x1F +#define BD96801_LDO_VSEL_MASK 0xff + +#define BD96801_MASK_RAMP_DELAY 0xc0 +#define BD96801_INT_VOUT_BASE_REG 0x21 +#define BD96801_BUCK_INT_VOUT_MASK 0xff + +#define BD96801_BUCK_VOLTS 256 +#define BD96801_LDO_VOLTS 256 + +#define BD96801_OVP_MASK 0x03 +#define BD96801_MASK_BUCK1_OVP_SHIFT 0x00 +#define BD96801_MASK_BUCK2_OVP_SHIFT 0x02 +#define BD96801_MASK_BUCK3_OVP_SHIFT 0x04 +#define BD96801_MASK_BUCK4_OVP_SHIFT 0x06 +#define BD96801_MASK_LDO5_OVP_SHIFT 0x00 +#define BD96801_MASK_LDO6_OVP_SHIFT 0x02 +#define BD96801_MASK_LDO7_OVP_SHIFT 0x04 + +#define BD96801_PROT_LIMIT_OCP_MIN 0x00 +#define BD96801_PROT_LIMIT_LOW 0x01 +#define BD96801_PROT_LIMIT_MID 0x02 +#define BD96801_PROT_LIMIT_HI 0x03 + +#define BD96801_REG_BUCK1_OCP 0x32 +#define BD96801_REG_BUCK2_OCP 0x32 +#define BD96801_REG_BUCK3_OCP 0x33 +#define BD96801_REG_BUCK4_OCP 0x33 + +#define BD96801_MASK_BUCK1_OCP_SHIFT 0x00 +#define BD96801_MASK_BUCK2_OCP_SHIFT 0x04 +#define BD96801_MASK_BUCK3_OCP_SHIFT 0x00 +#define BD96801_MASK_BUCK4_OCP_SHIFT 0x04 + +#define BD96801_REG_LDO5_OCP 0x34 +#define BD96801_REG_LDO6_OCP 0x34 +#define BD96801_REG_LDO7_OCP 0x34 + +#define BD96801_MASK_LDO5_OCP_SHIFT 0x00 +#define BD96801_MASK_LDO6_OCP_SHIFT 0x02 +#define BD96801_MASK_LDO7_OCP_SHIFT 0x04 + +#define BD96801_MASK_SHD_INTB BIT(7) +#define BD96801_INTB_FATAL BIT(7) + +#define BD96801_NUM_REGULATORS 7 +#define BD96801_NUM_LDOS 4 + +/* + * Ramp rates for bucks are controlled by bits [7:6] as follows: + * 00 => 1 mV/uS + * 01 => 5 mV/uS + * 10 => 10 mV/uS + * 11 => 20 mV/uS + */ +static const unsigned int buck_ramp_table[] = { 1000, 5000, 10000, 20000 }; + +/* + * This is a voltage range that get's appended to selected + * bd96801_buck_init_volts value. The range from 0x0 to 0xF is actually + * bd96801_buck_init_volts + 0 ... bd96801_buck_init_volts + 150mV + * and the range from 0x10 to 0x1f is bd96801_buck_init_volts - 150mV ... + * bd96801_buck_init_volts - 0. But as the members of linear_range + * are all unsigned I will apply offset of -150 mV to value in + * linear_range - which should increase these ranges with + * 150 mV getting all the values to >= 0. + */ +static const struct linear_range bd96801_tune_volts[] = { + REGULATOR_LINEAR_RANGE(150000, 0x00, 0xF, 10000), + REGULATOR_LINEAR_RANGE(0, 0x10, 0x1F, 10000), +}; + +static const struct linear_range bd96801_buck_init_volts[] = { + REGULATOR_LINEAR_RANGE(500000 - 150000, 0x00, 0xc8, 5000), + REGULATOR_LINEAR_RANGE(1550000 - 150000, 0xc9, 0xec, 50000), + REGULATOR_LINEAR_RANGE(3300000 - 150000, 0xed, 0xff, 0), +}; + +static const struct linear_range bd96801_ldo_int_volts[] = { + REGULATOR_LINEAR_RANGE(300000, 0x00, 0x78, 25000), + REGULATOR_LINEAR_RANGE(3300000, 0x79, 0xff, 0), +}; + +#define BD96801_LDO_SD_VOLT_MASK 0x1 +#define BD96801_LDO_MODE_MASK 0x6 +#define BD96801_LDO_MODE_INT 0x0 +#define BD96801_LDO_MODE_SD 0x2 +#define BD96801_LDO_MODE_DDR 0x4 + +static int ldo_ddr_volt_table[] = {500000, 300000}; +static int ldo_sd_volt_table[] = {3300000, 1800000}; + +/* Constant IRQ initialization data (templates) */ +struct bd96801_irqinfo { + int type; + struct regulator_irq_desc irq_desc; + int err_cfg; + int wrn_cfg; + const char *irq_name; +}; + +#define BD96801_IRQINFO(_type, _name, _irqoff_ms, _irqname) \ +{ \ + .type = (_type), \ + .err_cfg = -1, \ + .wrn_cfg = -1, \ + .irq_name = (_irqname), \ + .irq_desc = { \ + .name = (_name), \ + .irq_off_ms = (_irqoff_ms), \ + .map_event = regulator_irq_map_event_simple, \ + }, \ +} + +static const struct bd96801_irqinfo buck1_irqinfo[] = { + BD96801_IRQINFO(BD96801_PROT_OCP, "buck1-over-curr-h", 500, + "bd96801-buck1-overcurr-h"), + BD96801_IRQINFO(BD96801_PROT_OCP, "buck1-over-curr-l", 500, + "bd96801-buck1-overcurr-l"), + BD96801_IRQINFO(BD96801_PROT_OCP, "buck1-over-curr-n", 500, + "bd96801-buck1-overcurr-n"), + BD96801_IRQINFO(BD96801_PROT_OVP, "buck1-over-voltage", 500, + "bd96801-buck1-overvolt"), + BD96801_IRQINFO(BD96801_PROT_UVP, "buck1-under-voltage", 500, + "bd96801-buck1-undervolt"), + BD96801_IRQINFO(BD96801_PROT_TEMP, "buck1-over-temp", 500, + "bd96801-buck1-thermal") +}; + +static const struct bd96801_irqinfo buck2_irqinfo[] = { + BD96801_IRQINFO(BD96801_PROT_OCP, "buck2-over-curr-h", 500, + "bd96801-buck2-overcurr-h"), + BD96801_IRQINFO(BD96801_PROT_OCP, "buck2-over-curr-l", 500, + "bd96801-buck2-overcurr-l"), + BD96801_IRQINFO(BD96801_PROT_OCP, "buck2-over-curr-n", 500, + "bd96801-buck2-overcurr-n"), + BD96801_IRQINFO(BD96801_PROT_OVP, "buck2-over-voltage", 500, + "bd96801-buck2-overvolt"), + BD96801_IRQINFO(BD96801_PROT_UVP, "buck2-under-voltage", 500, + "bd96801-buck2-undervolt"), + BD96801_IRQINFO(BD96801_PROT_TEMP, "buck2-over-temp", 500, + "bd96801-buck2-thermal") +}; + +static const struct bd96801_irqinfo buck3_irqinfo[] = { + BD96801_IRQINFO(BD96801_PROT_OCP, "buck3-over-curr-h", 500, + "bd96801-buck3-overcurr-h"), + BD96801_IRQINFO(BD96801_PROT_OCP, "buck3-over-curr-l", 500, + "bd96801-buck3-overcurr-l"), + BD96801_IRQINFO(BD96801_PROT_OCP, "buck3-over-curr-n", 500, + "bd96801-buck3-overcurr-n"), + BD96801_IRQINFO(BD96801_PROT_OVP, "buck3-over-voltage", 500, + "bd96801-buck3-overvolt"), + BD96801_IRQINFO(BD96801_PROT_UVP, "buck3-under-voltage", 500, + "bd96801-buck3-undervolt"), + BD96801_IRQINFO(BD96801_PROT_TEMP, "buck3-over-temp", 500, + "bd96801-buck3-thermal") +}; + +static const struct bd96801_irqinfo buck4_irqinfo[] = { + BD96801_IRQINFO(BD96801_PROT_OCP, "buck4-over-curr-h", 500, + "bd96801-buck4-overcurr-h"), + BD96801_IRQINFO(BD96801_PROT_OCP, "buck4-over-curr-l", 500, + "bd96801-buck4-overcurr-l"), + BD96801_IRQINFO(BD96801_PROT_OCP, "buck4-over-curr-n", 500, + "bd96801-buck4-overcurr-n"), + BD96801_IRQINFO(BD96801_PROT_OVP, "buck4-over-voltage", 500, + "bd96801-buck4-overvolt"), + BD96801_IRQINFO(BD96801_PROT_UVP, "buck4-under-voltage", 500, + "bd96801-buck4-undervolt"), + BD96801_IRQINFO(BD96801_PROT_TEMP, "buck4-over-temp", 500, + "bd96801-buck4-thermal") +}; + +static const struct bd96801_irqinfo ldo5_irqinfo[] = { + BD96801_IRQINFO(BD96801_PROT_OCP, "ldo5-overcurr", 500, + "bd96801-ldo5-overcurr"), + BD96801_IRQINFO(BD96801_PROT_OVP, "ldo5-over-voltage", 500, + "bd96801-ldo5-overvolt"), + BD96801_IRQINFO(BD96801_PROT_UVP, "ldo5-under-voltage", 500, + "bd96801-ldo5-undervolt"), +}; + +static const struct bd96801_irqinfo ldo6_irqinfo[] = { + BD96801_IRQINFO(BD96801_PROT_OCP, "ldo6-overcurr", 500, + "bd96801-ldo6-overcurr"), + BD96801_IRQINFO(BD96801_PROT_OVP, "ldo6-over-voltage", 500, + "bd96801-ldo6-overvolt"), + BD96801_IRQINFO(BD96801_PROT_UVP, "ldo6-under-voltage", 500, + "bd96801-ldo6-undervolt"), +}; + +static const struct bd96801_irqinfo ldo7_irqinfo[] = { + BD96801_IRQINFO(BD96801_PROT_OCP, "ldo7-overcurr", 500, + "bd96801-ldo7-overcurr"), + BD96801_IRQINFO(BD96801_PROT_OVP, "ldo7-over-voltage", 500, + "bd96801-ldo7-overvolt"), + BD96801_IRQINFO(BD96801_PROT_UVP, "ldo7-under-voltage", 500, + "bd96801-ldo7-undervolt"), +}; + +struct bd96801_irq_desc { + struct bd96801_irqinfo *irqinfo; + int num_irqs; +}; + +struct bd96801_regulator_data { + struct regulator_desc desc; + const struct linear_range *init_ranges; + int num_ranges; + struct bd96801_irq_desc irq_desc; + int initial_voltage; + int ldo_vol_lvl; + int ldo_errs; +}; + +struct bd96801_pmic_data { + struct bd96801_regulator_data regulator_data[BD96801_NUM_REGULATORS]; + struct regmap *regmap; + int fatal_ind; +}; + +static int ldo_map_notif(int irq, struct regulator_irq_data *rid, + unsigned long *dev_mask) +{ + int i; + + for (i = 0; i < rid->num_states; i++) { + struct bd96801_regulator_data *rdata; + struct regulator_dev *rdev; + + rdev = rid->states[i].rdev; + rdata = container_of(rdev->desc, struct bd96801_regulator_data, + desc); + rid->states[i].notifs = regulator_err2notif(rdata->ldo_errs); + rid->states[i].errors = rdata->ldo_errs; + *dev_mask |= BIT(i); + } + return 0; +} + +static int bd96801_list_voltage_lr(struct regulator_dev *rdev, + unsigned int selector) +{ + int voltage; + struct bd96801_regulator_data *data; + + data = container_of(rdev->desc, struct bd96801_regulator_data, desc); + + /* + * The BD096801 has voltage setting in two registers. One giving the + * "initial voltage" (can be changed only when regulator is disabled. + * This driver caches the value and sets it only at startup. The other + * register is voltage tuning value which applies -150 mV ... +150 mV + * offset to the voltage. + * + * Note that the cached initial voltage stored in regulator data is + * 'scaled down' by the 150 mV so that all of our tuning values are + * >= 0. This is done because the linear_ranges uses unsigned values. + * + * As a result, we increase the tuning voltage which we get based on + * the selector by the stored initial_voltage. + */ + voltage = regulator_list_voltage_linear_range(rdev, selector); + if (voltage < 0) + return voltage; + + return voltage + data->initial_voltage; +} + + +static const struct regulator_ops bd96801_ldo_table_ops = { + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_table, + .get_voltage_sel = regulator_get_voltage_sel_regmap, +}; + +static const struct regulator_ops bd96801_buck_ops = { + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = bd96801_list_voltage_lr, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .set_voltage_time_sel = regulator_set_voltage_time_sel, + .set_ramp_delay = regulator_set_ramp_delay_regmap, +}; + +static const struct regulator_ops bd96801_ldo_ops = { + .is_enabled = regulator_is_enabled_regmap, + .list_voltage = regulator_list_voltage_linear_range, + .get_voltage_sel = regulator_get_voltage_sel_regmap, +}; + +static int buck_get_initial_voltage(struct regmap *regmap, struct device *dev, + struct bd96801_regulator_data *data) +{ + int ret = 0, sel, initial_uv; + int reg = BD96801_INT_VOUT_BASE_REG + data->desc.id; + + if (data->num_ranges) { + ret = regmap_read(regmap, reg, &sel); + sel &= BD96801_BUCK_INT_VOUT_MASK; + + ret = linear_range_get_value_array(data->init_ranges, + data->num_ranges, sel, + &initial_uv); + if (ret) + return ret; + + data->initial_voltage = initial_uv; + dev_dbg(dev, "Tune-scaled initial voltage %u\n", + data->initial_voltage); + } + + return 0; +} + +static int get_ldo_initial_voltage(struct regmap *regmap, + struct device *dev, + struct bd96801_regulator_data *data) +{ + int ret; + int cfgreg; + + ret = regmap_read(regmap, data->ldo_vol_lvl, &cfgreg); + if (ret) + return ret; + + switch (cfgreg & BD96801_LDO_MODE_MASK) { + case BD96801_LDO_MODE_DDR: + data->desc.volt_table = ldo_ddr_volt_table; + data->desc.n_voltages = ARRAY_SIZE(ldo_ddr_volt_table); + break; + case BD96801_LDO_MODE_SD: + data->desc.volt_table = ldo_sd_volt_table; + data->desc.n_voltages = ARRAY_SIZE(ldo_sd_volt_table); + break; + default: + dev_info(dev, "Leaving LDO to normal mode"); + return 0; + } + + /* SD or DDR mode => override default ops */ + data->desc.ops = &bd96801_ldo_table_ops, + data->desc.vsel_mask = 1; + data->desc.vsel_reg = data->ldo_vol_lvl; + + return 0; +} + +static int get_initial_voltage(struct device *dev, struct regmap *regmap, + struct bd96801_regulator_data *data) +{ + /* BUCK */ + if (data->desc.id <= BD96801_BUCK4) + return buck_get_initial_voltage(regmap, dev, data); + + /* LDO */ + return get_ldo_initial_voltage(regmap, dev, data); +} + +static int bd96801_walk_regulator_dt(struct device *dev, struct regmap *regmap, + struct bd96801_regulator_data *data, + int num) +{ + int i, ret; + struct device_node *np; + struct device_node *nproot = dev->parent->of_node; + + nproot = of_get_child_by_name(nproot, "regulators"); + if (!nproot) { + dev_err(dev, "failed to find regulators node\n"); + return -ENODEV; + } + for_each_child_of_node(nproot, np) + for (i = 0; i < num; i++) { + if (!of_node_name_eq(np, data[i].desc.of_match)) + continue; + /* + * If STBY configs are supported, we must pass node + * here to extract the initial voltages from the DT. + * Thus we do the initial voltage getting in this + * loop. + */ + ret = get_initial_voltage(dev, regmap, &data[i]); + if (ret) { + dev_err(dev, + "Initializing voltages for %s failed\n", + data[i].desc.name); + of_node_put(np); + of_node_put(nproot); + + return ret; + } + if (of_property_read_bool(np, "rohm,keep-on-stby")) { + ret = regmap_set_bits(regmap, + BD96801_ALWAYS_ON_REG, + 1 << data[i].desc.id); + if (ret) { + dev_err(dev, + "failed to set %s on-at-stby\n", + data[i].desc.name); + of_node_put(np); + of_node_put(nproot); + + return ret; + } + } + } + of_node_put(nproot); + + return 0; +} + +/* + * Template for regulator data. Probe will allocate dynamic / driver instance + * struct so we should be on a safe side even if there were multiple PMICs to + * control. Note that there is a plan to allow multiple PMICs to be used so + * systems can scale better. I am however still slightly unsure how the + * multi-PMIC case will be handled. I don't know if the processor will have I2C + * acces to all of the PMICs or only the first one. I'd guess there will be + * access provided to all PMICs for voltage scaling - but the errors will only + * be informed via the master PMIC. Eg, we should prepare to support multiple + * driver instances - either with or without the IRQs... Well, let's first + * just support the simple and clear single-PMIC setup and ponder the multi PMIC + * case later. What we can easly do for preparing is to not use static global + * data for regulators though. + */ +static const struct bd96801_pmic_data bd96801_data = { + .regulator_data = { + { + .desc = { + .name = "buck1", + .of_match = of_match_ptr("buck1"), + .regulators_node = of_match_ptr("regulators"), + .id = BD96801_BUCK1, + .ops = &bd96801_buck_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd96801_tune_volts, + .n_linear_ranges = ARRAY_SIZE(bd96801_tune_volts), + .n_voltages = BD96801_BUCK_VOLTS, + .enable_reg = BD96801_REG_ENABLE, + .enable_mask = BD96801_BUCK1_EN_MASK, + .enable_is_inverted = true, + .vsel_reg = BD96801_BUCK1_VSEL_REG, + .vsel_mask = BD96801_BUCK_VSEL_MASK, + .ramp_reg = BD96801_BUCK1_VSEL_REG, + .ramp_mask = BD96801_MASK_RAMP_DELAY, + .ramp_delay_table = &buck_ramp_table[0], + .n_ramp_values = ARRAY_SIZE(buck_ramp_table), + .owner = THIS_MODULE, + }, + .init_ranges = bd96801_buck_init_volts, + .num_ranges = ARRAY_SIZE(bd96801_buck_init_volts), + .irq_desc = { + .irqinfo = (struct bd96801_irqinfo *)&buck1_irqinfo[0], + .num_irqs = ARRAY_SIZE(buck1_irqinfo), + }, + }, { + .desc = { + .name = "buck2", + .of_match = of_match_ptr("buck2"), + .regulators_node = of_match_ptr("regulators"), + .id = BD96801_BUCK2, + .ops = &bd96801_buck_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd96801_tune_volts, + .n_linear_ranges = ARRAY_SIZE(bd96801_tune_volts), + .n_voltages = BD96801_BUCK_VOLTS, + .enable_reg = BD96801_REG_ENABLE, + .enable_mask = BD96801_BUCK2_EN_MASK, + .enable_is_inverted = true, + .vsel_reg = BD96801_BUCK2_VSEL_REG, + .vsel_mask = BD96801_BUCK_VSEL_MASK, + .ramp_reg = BD96801_BUCK2_VSEL_REG, + .ramp_mask = BD96801_MASK_RAMP_DELAY, + .ramp_delay_table = &buck_ramp_table[0], + .n_ramp_values = ARRAY_SIZE(buck_ramp_table), + .owner = THIS_MODULE, + }, + .irq_desc = { + .irqinfo = (struct bd96801_irqinfo *)&buck2_irqinfo[0], + .num_irqs = ARRAY_SIZE(buck2_irqinfo), + }, + .init_ranges = bd96801_buck_init_volts, + .num_ranges = ARRAY_SIZE(bd96801_buck_init_volts), + }, { + .desc = { + .name = "buck3", + .of_match = of_match_ptr("buck3"), + .regulators_node = of_match_ptr("regulators"), + .id = BD96801_BUCK3, + .ops = &bd96801_buck_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd96801_tune_volts, + .n_linear_ranges = ARRAY_SIZE(bd96801_tune_volts), + .n_voltages = BD96801_BUCK_VOLTS, + .enable_reg = BD96801_REG_ENABLE, + .enable_mask = BD96801_BUCK3_EN_MASK, + .enable_is_inverted = true, + .vsel_reg = BD96801_BUCK3_VSEL_REG, + .vsel_mask = BD96801_BUCK_VSEL_MASK, + .ramp_reg = BD96801_BUCK3_VSEL_REG, + .ramp_mask = BD96801_MASK_RAMP_DELAY, + .ramp_delay_table = &buck_ramp_table[0], + .n_ramp_values = ARRAY_SIZE(buck_ramp_table), + .owner = THIS_MODULE, + }, + .irq_desc = { + .irqinfo = (struct bd96801_irqinfo *)&buck3_irqinfo[0], + .num_irqs = ARRAY_SIZE(buck3_irqinfo), + }, + .init_ranges = bd96801_buck_init_volts, + .num_ranges = ARRAY_SIZE(bd96801_buck_init_volts), + }, { + .desc = { + .name = "buck4", + .of_match = of_match_ptr("buck4"), + .regulators_node = of_match_ptr("regulators"), + .id = BD96801_BUCK4, + .ops = &bd96801_buck_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd96801_tune_volts, + .n_linear_ranges = ARRAY_SIZE(bd96801_tune_volts), + .n_voltages = BD96801_BUCK_VOLTS, + .enable_reg = BD96801_REG_ENABLE, + .enable_mask = BD96801_BUCK4_EN_MASK, + .enable_is_inverted = true, + .vsel_reg = BD96801_BUCK4_VSEL_REG, + .vsel_mask = BD96801_BUCK_VSEL_MASK, + .ramp_reg = BD96801_BUCK4_VSEL_REG, + .ramp_mask = BD96801_MASK_RAMP_DELAY, + .ramp_delay_table = &buck_ramp_table[0], + .n_ramp_values = ARRAY_SIZE(buck_ramp_table), + .owner = THIS_MODULE, + }, + .irq_desc = { + .irqinfo = (struct bd96801_irqinfo *)&buck4_irqinfo[0], + .num_irqs = ARRAY_SIZE(buck4_irqinfo), + }, + .init_ranges = bd96801_buck_init_volts, + .num_ranges = ARRAY_SIZE(bd96801_buck_init_volts), + }, { + .desc = { + .name = "ldo5", + .of_match = of_match_ptr("ldo5"), + .regulators_node = of_match_ptr("regulators"), + .id = BD96801_LDO5, + .ops = &bd96801_ldo_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd96801_ldo_int_volts, + .n_linear_ranges = ARRAY_SIZE(bd96801_ldo_int_volts), + .n_voltages = BD96801_LDO_VOLTS, + .enable_reg = BD96801_REG_ENABLE, + .enable_mask = BD96801_LDO5_EN_MASK, + .enable_is_inverted = true, + .vsel_reg = BD96801_LDO5_VSEL_REG, + .vsel_mask = BD96801_LDO_VSEL_MASK, + .owner = THIS_MODULE, + }, + .irq_desc = { + .irqinfo = (struct bd96801_irqinfo *)&ldo5_irqinfo[0], + .num_irqs = ARRAY_SIZE(ldo5_irqinfo), + }, + .ldo_vol_lvl = BD96801_LDO5_VOL_LVL_REG, + }, { + .desc = { + .name = "ldo6", + .of_match = of_match_ptr("ldo6"), + .regulators_node = of_match_ptr("regulators"), + .id = BD96801_LDO6, + .ops = &bd96801_ldo_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd96801_ldo_int_volts, + .n_linear_ranges = ARRAY_SIZE(bd96801_ldo_int_volts), + .n_voltages = BD96801_LDO_VOLTS, + .enable_reg = BD96801_REG_ENABLE, + .enable_mask = BD96801_LDO6_EN_MASK, + .enable_is_inverted = true, + .vsel_reg = BD96801_LDO6_VSEL_REG, + .vsel_mask = BD96801_LDO_VSEL_MASK, + .owner = THIS_MODULE, + }, + .irq_desc = { + .irqinfo = (struct bd96801_irqinfo *)&ldo6_irqinfo[0], + .num_irqs = ARRAY_SIZE(ldo6_irqinfo), + }, + .ldo_vol_lvl = BD96801_LDO6_VOL_LVL_REG, + }, { + .desc = { + .name = "ldo7", + .of_match = of_match_ptr("ldo7"), + .regulators_node = of_match_ptr("regulators"), + .id = BD96801_LDO7, + .ops = &bd96801_ldo_ops, + .type = REGULATOR_VOLTAGE, + .linear_ranges = bd96801_ldo_int_volts, + .n_linear_ranges = ARRAY_SIZE(bd96801_ldo_int_volts), + .n_voltages = BD96801_LDO_VOLTS, + .enable_reg = BD96801_REG_ENABLE, + .enable_mask = BD96801_LDO7_EN_MASK, + .enable_is_inverted = true, + .vsel_reg = BD96801_LDO7_VSEL_REG, + .vsel_mask = BD96801_LDO_VSEL_MASK, + .owner = THIS_MODULE, + }, + .irq_desc = { + .irqinfo = (struct bd96801_irqinfo *)&ldo7_irqinfo[0], + .num_irqs = ARRAY_SIZE(ldo7_irqinfo), + }, + .ldo_vol_lvl = BD96801_LDO7_VOL_LVL_REG, + }, + }, +}; + +static int initialize_pmic_data(struct device *dev, + struct bd96801_pmic_data *pdata) +{ + int r, i; + + /* + * Allocate and initialize IRQ data for all of the regulators. We + * wish to modify IRQ information independently for each driver + * instance. + */ + for (r = 0; r < BD96801_NUM_REGULATORS; r++) { + const struct bd96801_irqinfo *template; + struct bd96801_irqinfo *new; + int num_infos; + + template = pdata->regulator_data[r].irq_desc.irqinfo; + num_infos = pdata->regulator_data[r].irq_desc.num_irqs; + + new = devm_kcalloc(dev, num_infos, sizeof(*new), GFP_KERNEL); + if (!new) + return -ENOMEM; + + pdata->regulator_data[r].irq_desc.irqinfo = new; + + for (i = 0; i < num_infos; i++) + new[i] = template[i]; + } + + return 0; +} + +static int bd96801_rdev_intb_irqs(struct platform_device *pdev, + struct bd96801_pmic_data *pdata, + struct bd96801_irqinfo *iinfo, + struct regulator_dev *rdev) +{ + struct regulator_dev *rdev_arr[1]; + void *retp; + int err = 0; + int irq; + int err_flags[] = { + [BD96801_PROT_OVP] = REGULATOR_ERROR_REGULATION_OUT, + [BD96801_PROT_UVP] = REGULATOR_ERROR_UNDER_VOLTAGE, + [BD96801_PROT_OCP] = REGULATOR_ERROR_OVER_CURRENT, + [BD96801_PROT_TEMP] = REGULATOR_ERROR_OVER_TEMP, + + }; + int wrn_flags[] = { + [BD96801_PROT_OVP] = REGULATOR_ERROR_OVER_VOLTAGE_WARN, + [BD96801_PROT_UVP] = REGULATOR_ERROR_UNDER_VOLTAGE_WARN, + [BD96801_PROT_OCP] = REGULATOR_ERROR_OVER_CURRENT_WARN, + [BD96801_PROT_TEMP] = REGULATOR_ERROR_OVER_TEMP_WARN, + }; + + /* + * Don't install IRQ handler if both error and warning + * notifications are explicitly disabled + */ + if (!iinfo->err_cfg && !iinfo->wrn_cfg) + return 0; + + if (WARN_ON(iinfo->type >= BD96801_NUM_PROT)) + return -EINVAL; + + if (iinfo->err_cfg) + err = err_flags[iinfo->type]; + else if (iinfo->wrn_cfg) + err = wrn_flags[iinfo->type]; + + iinfo->irq_desc.data = pdata; + irq = platform_get_irq_byname(pdev, iinfo->irq_name); + if (irq < 0) + return irq; + /* Find notifications for this IRQ (WARN/ERR) */ + + rdev_arr[0] = rdev; + retp = devm_regulator_irq_helper(&pdev->dev, + &iinfo->irq_desc, irq, + 0, err, NULL, rdev_arr, + 1); + if (IS_ERR(retp)) + return PTR_ERR(retp); + + return 0; +} + + + +static int bd96801_probe(struct platform_device *pdev) +{ + struct regulator_dev *ldo_errs_rdev_arr[BD96801_NUM_LDOS]; + struct bd96801_regulator_data *rdesc; + struct regulator_config config = {}; + int ldo_errs_arr[BD96801_NUM_LDOS]; + struct bd96801_pmic_data *pdata; + int temp_notif_ldos = 0; + struct device *parent; + int i, ret; + void *retp; + + parent = pdev->dev.parent; + + pdata = devm_kmemdup(&pdev->dev, &bd96801_data, sizeof(bd96801_data), + GFP_KERNEL); + if (!pdata) + return -ENOMEM; + + if (initialize_pmic_data(&pdev->dev, pdata)) + return -ENOMEM; + + pdata->regmap = dev_get_regmap(parent, NULL); + if (!pdata->regmap) { + dev_err(&pdev->dev, "No register map found\n"); + return -ENODEV; + } + + rdesc = &pdata->regulator_data[0]; + + config.driver_data = pdata; + config.regmap = pdata->regmap; + config.dev = parent; + + ret = bd96801_walk_regulator_dt(&pdev->dev, pdata->regmap, rdesc, + BD96801_NUM_REGULATORS); + if (ret) + return ret; + + for (i = 0; i < ARRAY_SIZE(pdata->regulator_data); i++) { + struct regulator_dev *rdev; + struct bd96801_irq_desc *idesc = &rdesc[i].irq_desc; + int j; + + rdev = devm_regulator_register(&pdev->dev, + &rdesc[i].desc, &config); + if (IS_ERR(rdev)) { + dev_err(&pdev->dev, + "failed to register %s regulator\n", + rdesc[i].desc.name); + return PTR_ERR(rdev); + } + /* + * LDOs don't have own temperature monitoring. If temperature + * notification was requested for this LDO from DT then we will + * add the regulator to be notified if central IC temperature + * exceeds threshold. + */ + if (rdesc[i].ldo_errs) { + ldo_errs_rdev_arr[temp_notif_ldos] = rdev; + ldo_errs_arr[temp_notif_ldos] = rdesc[i].ldo_errs; + temp_notif_ldos++; + } + if (!idesc) + continue; + + /* Register INTB handlers for configured protections */ + for (j = 0; j < idesc->num_irqs; j++) { + ret = bd96801_rdev_intb_irqs(pdev, pdata, + &idesc->irqinfo[j], rdev); + if (ret) + return ret; + } + } + if (temp_notif_ldos) { + int irq; + struct regulator_irq_desc tw_desc = { + .name = "bd96801-core-thermal", + .irq_off_ms = 500, + .map_event = ldo_map_notif, + }; + + irq = platform_get_irq_byname(pdev, "bd96801-core-thermal"); + if (irq < 0) + return irq; + + retp = devm_regulator_irq_helper(&pdev->dev, &tw_desc, irq, 0, + 0, &ldo_errs_arr[0], + &ldo_errs_rdev_arr[0], + temp_notif_ldos); + if (IS_ERR(retp)) + return PTR_ERR(retp); + } + + return 0; +} + +static const struct platform_device_id bd96801_pmic_id[] = { + { "bd96801-regulator", }, + { } +}; +MODULE_DEVICE_TABLE(platform, bd96801_pmic_id); + +static struct platform_driver bd96801_regulator = { + .driver = { + .name = "bd96801-pmic" + }, + .probe = bd96801_probe, + .id_table = bd96801_pmic_id, +}; + +module_platform_driver(bd96801_regulator); + +MODULE_AUTHOR("Matti Vaittinen "); +MODULE_DESCRIPTION("BD96801 voltage regulator driver"); +MODULE_LICENSE("GPL"); From 09dad69757b6600f6de5b547323e81235fc61d6c Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Thu, 27 Jun 2024 10:43:55 +0300 Subject: [PATCH 32/87] watchdog: ROHM BD96801 PMIC WDG driver Introduce driver for WDG block on ROHM BD96801 scalable PMIC. This driver only supports watchdog with I2C feeding and delayed response detection. Whether the watchdog toggles PRSTB pin or just causes an interrupt can be configured via device-tree. The BD96801 PMIC HW supports also window watchdog (too early feeding detection) and Q&A mode. These are not supported by this driver. Signed-off-by: Matti Vaittinen Reviewed-by: Guenter Roeck Link: https://lore.kernel.org/r/bb3a49d606e793a61b0c033170ff2a9f30f3c2a5.1719473802.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones --- drivers/watchdog/Kconfig | 13 ++ drivers/watchdog/Makefile | 1 + drivers/watchdog/bd96801_wdt.c | 416 +++++++++++++++++++++++++++++++++ 3 files changed, 430 insertions(+) create mode 100644 drivers/watchdog/bd96801_wdt.c diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 85eea38dbdf4..ceb3431f23b8 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -181,6 +181,19 @@ config BD957XMUF_WATCHDOG watchdog. Alternatively say M to compile the driver as a module, which will be called bd9576_wdt. +config BD96801_WATCHDOG + tristate "ROHM BD96801 PMIC Watchdog" + depends on MFD_ROHM_BD96801 + select WATCHDOG_CORE + help + Support for the watchdog in the ROHM BD96801 PMIC. Watchdog can be + configured to only generate IRQ or to trigger system reset via reset + pin. + + Say Y here to include support for the ROHM BD96801 watchdog. + Alternatively say M to compile the driver as a module, + which will be called bd96801_wdt. + config CROS_EC_WATCHDOG tristate "ChromeOS EC-based watchdog" select WATCHDOG_CORE diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 2d1117564f5b..b51030f035a6 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -218,6 +218,7 @@ obj-$(CONFIG_XEN_WDT) += xen_wdt.o # Architecture Independent obj-$(CONFIG_BD957XMUF_WATCHDOG) += bd9576_wdt.o +obj-$(CONFIG_BD96801_WATCHDOG) += bd96801_wdt.o obj-$(CONFIG_CROS_EC_WATCHDOG) += cros_ec_wdt.o obj-$(CONFIG_DA9052_WATCHDOG) += da9052_wdt.o obj-$(CONFIG_DA9055_WATCHDOG) += da9055_wdt.o diff --git a/drivers/watchdog/bd96801_wdt.c b/drivers/watchdog/bd96801_wdt.c new file mode 100644 index 000000000000..ff51f42ced2a --- /dev/null +++ b/drivers/watchdog/bd96801_wdt.c @@ -0,0 +1,416 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2024 ROHM Semiconductors + * + * ROHM BD96801 watchdog driver + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static bool nowayout; +module_param(nowayout, bool, 0); +MODULE_PARM_DESC(nowayout, + "Watchdog cannot be stopped once started (default=\"false\")"); + +#define BD96801_WD_TMO_SHORT_MASK 0x70 +#define BD96801_WD_RATIO_MASK 0x3 +#define BD96801_WD_TYPE_MASK 0x4 +#define BD96801_WD_TYPE_SLOW 0x4 +#define BD96801_WD_TYPE_WIN 0x0 + +#define BD96801_WD_EN_MASK 0x3 +#define BD96801_WD_IF_EN 0x1 +#define BD96801_WD_QA_EN 0x2 +#define BD96801_WD_DISABLE 0x0 + +#define BD96801_WD_ASSERT_MASK 0x8 +#define BD96801_WD_ASSERT_RST 0x8 +#define BD96801_WD_ASSERT_IRQ 0x0 + +#define BD96801_WD_FEED_MASK 0x1 +#define BD96801_WD_FEED 0x1 + +/* 1.1 mS */ +#define FASTNG_MIN 11 +#define FASTNG_MAX_US (100 * FASTNG_MIN << 7) +#define SLOWNG_MAX_US (16 * FASTNG_MAX_US) + +#define BD96801_WDT_DEFAULT_MARGIN_MS 1843 +/* Unit is seconds */ +#define DEFAULT_TIMEOUT 30 + +/* + * BD96801 WDG supports window mode so the TMO consists of SHORT and LONG + * timeout values. SHORT time is meaningful only in window mode where feeding + * period shorter than SHORT would be an error. LONG time is used to detect if + * feeding is not occurring within given time limit (SoC SW hangs). The LONG + * timeout time is a multiple of (2, 4, 8 or 16 times) the SHORT timeout. + */ + +struct wdtbd96801 { + struct device *dev; + struct regmap *regmap; + struct watchdog_device wdt; +}; + +static int bd96801_wdt_ping(struct watchdog_device *wdt) +{ + struct wdtbd96801 *w = watchdog_get_drvdata(wdt); + + return regmap_update_bits(w->regmap, BD96801_REG_WD_FEED, + BD96801_WD_FEED_MASK, BD96801_WD_FEED); +} + +static int bd96801_wdt_start(struct watchdog_device *wdt) +{ + struct wdtbd96801 *w = watchdog_get_drvdata(wdt); + + return regmap_update_bits(w->regmap, BD96801_REG_WD_CONF, + BD96801_WD_EN_MASK, BD96801_WD_IF_EN); +} + +static int bd96801_wdt_stop(struct watchdog_device *wdt) +{ + struct wdtbd96801 *w = watchdog_get_drvdata(wdt); + + return regmap_update_bits(w->regmap, BD96801_REG_WD_CONF, + BD96801_WD_EN_MASK, BD96801_WD_DISABLE); +} + +static const struct watchdog_info bd96801_wdt_info = { + .options = WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING | + WDIOF_SETTIMEOUT, + .identity = "BD96801 Watchdog", +}; + +static const struct watchdog_ops bd96801_wdt_ops = { + .start = bd96801_wdt_start, + .stop = bd96801_wdt_stop, + .ping = bd96801_wdt_ping, +}; + +static int find_closest_fast(unsigned int target, int *sel, unsigned int *val) +{ + unsigned int window = FASTNG_MIN; + int i; + + for (i = 0; i < 8 && window < target; i++) + window <<= 1; + + if (i == 8) + return -EINVAL; + + *val = window; + *sel = i; + + return 0; +} + +static int find_closest_slow_by_fast(unsigned int fast_val, unsigned int *target, + int *slowsel) +{ + static const int multipliers[] = {2, 4, 8, 16}; + int sel; + + for (sel = 0; sel < ARRAY_SIZE(multipliers) && + multipliers[sel] * fast_val < *target; sel++) + ; + + if (sel == ARRAY_SIZE(multipliers)) + return -EINVAL; + + *slowsel = sel; + *target = multipliers[sel] * fast_val; + + return 0; +} + +static int find_closest_slow(unsigned int *target, int *slow_sel, int *fast_sel) +{ + static const int multipliers[] = {2, 4, 8, 16}; + unsigned int window = FASTNG_MIN; + unsigned int val = 0; + int i, j; + + for (i = 0; i < 8; i++) { + for (j = 0; j < ARRAY_SIZE(multipliers); j++) { + unsigned int slow; + + slow = window * multipliers[j]; + if (slow >= *target && (!val || slow < val)) { + val = slow; + *fast_sel = i; + *slow_sel = j; + } + } + window <<= 1; + } + if (!val) + return -EINVAL; + + *target = val; + + return 0; +} + +static int bd96801_set_wdt_mode(struct wdtbd96801 *w, unsigned int hw_margin, + unsigned int hw_margin_min) +{ + int fastng, slowng, type, ret, reg, mask; + struct device *dev = w->dev; + + + if (hw_margin_min * 1000 > FASTNG_MAX_US) { + dev_err(dev, "Unsupported fast timeout %u uS [max %u]\n", + hw_margin_min * 1000, FASTNG_MAX_US); + + return -EINVAL; + } + + if (hw_margin * 1000 > SLOWNG_MAX_US) { + dev_err(dev, "Unsupported slow timeout %u uS [max %u]\n", + hw_margin * 1000, SLOWNG_MAX_US); + + return -EINVAL; + } + + /* + * Convert to 100uS to guarantee reasonable timeouts fit in + * 32bit maintaining also a decent accuracy. + */ + hw_margin *= 10; + hw_margin_min *= 10; + + if (hw_margin_min) { + unsigned int min; + + type = BD96801_WD_TYPE_WIN; + dev_dbg(dev, "Setting type WINDOW 0x%x\n", type); + ret = find_closest_fast(hw_margin_min, &fastng, &min); + if (ret) + return ret; + + ret = find_closest_slow_by_fast(min, &hw_margin, &slowng); + if (ret) { + dev_err(dev, + "can't support slow timeout %u uS using fast %u uS. [max slow %u uS]\n", + hw_margin * 100, min * 100, min * 100 * 16); + + return ret; + } + w->wdt.min_hw_heartbeat_ms = min / 10; + } else { + type = BD96801_WD_TYPE_SLOW; + dev_dbg(dev, "Setting type SLOW 0x%x\n", type); + ret = find_closest_slow(&hw_margin, &slowng, &fastng); + if (ret) + return ret; + } + + w->wdt.max_hw_heartbeat_ms = hw_margin / 10; + + fastng = FIELD_PREP(BD96801_WD_TMO_SHORT_MASK, fastng); + + reg = slowng | fastng; + mask = BD96801_WD_RATIO_MASK | BD96801_WD_TMO_SHORT_MASK; + ret = regmap_update_bits(w->regmap, BD96801_REG_WD_TMO, + mask, reg); + if (ret) + return ret; + + ret = regmap_update_bits(w->regmap, BD96801_REG_WD_CONF, + BD96801_WD_TYPE_MASK, type); + + return ret; +} + +static int bd96801_set_heartbeat_from_hw(struct wdtbd96801 *w, + unsigned int conf_reg) +{ + int ret; + unsigned int val, sel, fast; + + /* + * The BD96801 supports a somewhat peculiar QA-mode, which we do not + * support in this driver. If the QA-mode is enabled then we just + * warn and bail-out. + */ + if ((conf_reg & BD96801_WD_EN_MASK) != BD96801_WD_IF_EN) { + dev_err(w->dev, "watchdog set to Q&A mode - exiting\n"); + return -EINVAL; + } + + ret = regmap_read(w->regmap, BD96801_REG_WD_TMO, &val); + if (ret) + return ret; + + sel = FIELD_GET(BD96801_WD_TMO_SHORT_MASK, val); + fast = FASTNG_MIN << sel; + + sel = (val & BD96801_WD_RATIO_MASK) + 1; + w->wdt.max_hw_heartbeat_ms = (fast << sel) / USEC_PER_MSEC; + + if ((conf_reg & BD96801_WD_TYPE_MASK) == BD96801_WD_TYPE_WIN) + w->wdt.min_hw_heartbeat_ms = fast / USEC_PER_MSEC; + + return 0; +} + +static int init_wdg_hw(struct wdtbd96801 *w) +{ + u32 hw_margin[2]; + int count, ret; + u32 hw_margin_max = BD96801_WDT_DEFAULT_MARGIN_MS, hw_margin_min = 0; + + count = device_property_count_u32(w->dev->parent, "rohm,hw-timeout-ms"); + if (count < 0 && count != -EINVAL) + return count; + + if (count > 0) { + if (count > ARRAY_SIZE(hw_margin)) + return -EINVAL; + + ret = device_property_read_u32_array(w->dev->parent, + "rohm,hw-timeout-ms", + &hw_margin[0], count); + if (ret < 0) + return ret; + + if (count == 1) + hw_margin_max = hw_margin[0]; + + if (count == 2) { + if (hw_margin[1] > hw_margin[0]) { + hw_margin_max = hw_margin[1]; + hw_margin_min = hw_margin[0]; + } else { + hw_margin_max = hw_margin[0]; + hw_margin_min = hw_margin[1]; + } + } + } + + ret = bd96801_set_wdt_mode(w, hw_margin_max, hw_margin_min); + if (ret) + return ret; + + ret = device_property_match_string(w->dev->parent, "rohm,wdg-action", + "prstb"); + if (ret >= 0) { + ret = regmap_update_bits(w->regmap, BD96801_REG_WD_CONF, + BD96801_WD_ASSERT_MASK, + BD96801_WD_ASSERT_RST); + return ret; + } + + ret = device_property_match_string(w->dev->parent, "rohm,wdg-action", + "intb-only"); + if (ret >= 0) { + ret = regmap_update_bits(w->regmap, BD96801_REG_WD_CONF, + BD96801_WD_ASSERT_MASK, + BD96801_WD_ASSERT_IRQ); + return ret; + } + + return 0; +} + +static irqreturn_t bd96801_irq_hnd(int irq, void *data) +{ + emergency_restart(); + + return IRQ_NONE; +} + +static int bd96801_wdt_probe(struct platform_device *pdev) +{ + struct wdtbd96801 *w; + int ret, irq; + unsigned int val; + + w = devm_kzalloc(&pdev->dev, sizeof(*w), GFP_KERNEL); + if (!w) + return -ENOMEM; + + w->regmap = dev_get_regmap(pdev->dev.parent, NULL); + w->dev = &pdev->dev; + + w->wdt.info = &bd96801_wdt_info; + w->wdt.ops = &bd96801_wdt_ops; + w->wdt.parent = pdev->dev.parent; + w->wdt.timeout = DEFAULT_TIMEOUT; + watchdog_set_drvdata(&w->wdt, w); + + ret = regmap_read(w->regmap, BD96801_REG_WD_CONF, &val); + if (ret) + return dev_err_probe(&pdev->dev, ret, + "Failed to get the watchdog state\n"); + + /* + * If the WDG is already enabled we assume it is configured by boot. + * In this case we just update the hw-timeout based on values set to + * the timeout / mode registers and leave the hardware configs + * untouched. + */ + if ((val & BD96801_WD_EN_MASK) != BD96801_WD_DISABLE) { + dev_dbg(&pdev->dev, "watchdog was running during probe\n"); + ret = bd96801_set_heartbeat_from_hw(w, val); + if (ret) + return ret; + + set_bit(WDOG_HW_RUNNING, &w->wdt.status); + } else { + /* If WDG is not running so we will initializate it */ + ret = init_wdg_hw(w); + if (ret) + return ret; + } + + dev_dbg(w->dev, "heartbeat set to %u - %u\n", + w->wdt.min_hw_heartbeat_ms, w->wdt.max_hw_heartbeat_ms); + + watchdog_init_timeout(&w->wdt, 0, pdev->dev.parent); + watchdog_set_nowayout(&w->wdt, nowayout); + watchdog_stop_on_reboot(&w->wdt); + + irq = platform_get_irq_byname(pdev, "bd96801-wdg"); + if (irq > 0) { + ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, + bd96801_irq_hnd, + IRQF_ONESHOT, "bd96801-wdg", + NULL); + if (ret) + return dev_err_probe(&pdev->dev, ret, + "Failed to register IRQ\n"); + } + + return devm_watchdog_register_device(&pdev->dev, &w->wdt); +} + +static const struct platform_device_id bd96801_wdt_id[] = { + { "bd96801-wdt", }, + { } +}; +MODULE_DEVICE_TABLE(platform, bd96801_wdt_id); + +static struct platform_driver bd96801_wdt = { + .driver = { + .name = "bd96801-wdt" + }, + .probe = bd96801_wdt_probe, + .id_table = bd96801_wdt_id, +}; +module_platform_driver(bd96801_wdt); + +MODULE_AUTHOR("Matti Vaittinen "); +MODULE_DESCRIPTION("BD96801 watchdog driver"); +MODULE_LICENSE("GPL"); From fcf1f960a6aa45a22efd4d49114c672ed305b85f Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Thu, 27 Jun 2024 10:44:16 +0300 Subject: [PATCH 33/87] MAINTAINERS: Add ROHM BD96801 'scalable PMIC' entries Add maintainer entries for ROHM BD96801 a.k.a 'scalable PMIC' drivers to be reviewed by ROHM people. Signed-off-by: Matti Vaittinen Link: https://lore.kernel.org/r/5ff9616567983611ea0b07a91403ea848451a339.1719473802.git.mazziesaccount@gmail.com Signed-off-by: Lee Jones --- MAINTAINERS | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index d6c90161c7bf..dc79a45c763e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19446,17 +19446,21 @@ F: drivers/gpio/gpio-bd71828.c F: drivers/mfd/rohm-bd71828.c F: drivers/mfd/rohm-bd718x7.c F: drivers/mfd/rohm-bd9576.c +F: drivers/mfd/rohm-bd96801.c F: drivers/regulator/bd71815-regulator.c F: drivers/regulator/bd71828-regulator.c F: drivers/regulator/bd718x7-regulator.c F: drivers/regulator/bd9576-regulator.c +F: drivers/regulator/bd96801-regulator.c F: drivers/regulator/rohm-regulator.c F: drivers/rtc/rtc-bd70528.c F: drivers/watchdog/bd9576_wdt.c +F: drivers/watchdog/bd96801_wdt.c F: include/linux/mfd/rohm-bd71815.h F: include/linux/mfd/rohm-bd71828.h F: include/linux/mfd/rohm-bd718x7.h F: include/linux/mfd/rohm-bd957x.h +F: include/linux/mfd/rohm-bd96801.h F: include/linux/mfd/rohm-generic.h F: include/linux/mfd/rohm-shared.h From 205fdba5d0ffe1ad8de61763d74323e88b640d41 Mon Sep 17 00:00:00 2001 From: James Ogletree Date: Thu, 20 Jun 2024 16:17:41 +0000 Subject: [PATCH 34/87] firmware: cs_dsp: Add write sequence interface A write sequence is a sequence of register addresses and values executed by some Cirrus DSPs following certain power state transitions. Add support for Cirrus drivers to update or add to a write sequence present in firmware. Reviewed-by: Charles Keepax Signed-off-by: James Ogletree Reviewed-by: Jeff LaBundy Link: https://lore.kernel.org/r/20240620161745.2312359-2-jogletre@opensource.cirrus.com Signed-off-by: Lee Jones --- drivers/firmware/cirrus/cs_dsp.c | 278 +++++++++++++++++++++++++ include/linux/firmware/cirrus/cs_dsp.h | 27 +++ 2 files changed, 305 insertions(+) diff --git a/drivers/firmware/cirrus/cs_dsp.c b/drivers/firmware/cirrus/cs_dsp.c index 0d139e4de37c..85ade75fce32 100644 --- a/drivers/firmware/cirrus/cs_dsp.c +++ b/drivers/firmware/cirrus/cs_dsp.c @@ -275,6 +275,12 @@ #define HALO_MPU_VIO_ERR_SRC_MASK 0x00007fff #define HALO_MPU_VIO_ERR_SRC_SHIFT 0 +/* + * Write Sequence + */ +#define WSEQ_OP_MAX_WORDS 3 +#define WSEQ_END_OF_SCRIPT 0xFFFFFF + struct cs_dsp_ops { bool (*validate_version)(struct cs_dsp *dsp, unsigned int version); unsigned int (*parse_sizes)(struct cs_dsp *dsp, @@ -3398,6 +3404,278 @@ int cs_dsp_chunk_read(struct cs_dsp_chunk *ch, int nbits) } EXPORT_SYMBOL_NS_GPL(cs_dsp_chunk_read, FW_CS_DSP); + +struct cs_dsp_wseq_op { + struct list_head list; + u32 address; + u32 data; + u16 offset; + u8 operation; +}; + +static void cs_dsp_wseq_clear(struct cs_dsp *dsp, struct cs_dsp_wseq *wseq) +{ + struct cs_dsp_wseq_op *op, *op_tmp; + + list_for_each_entry_safe(op, op_tmp, &wseq->ops, list) { + list_del(&op->list); + devm_kfree(dsp->dev, op); + } +} + +static int cs_dsp_populate_wseq(struct cs_dsp *dsp, struct cs_dsp_wseq *wseq) +{ + struct cs_dsp_wseq_op *op = NULL; + struct cs_dsp_chunk chunk; + u8 *words; + int ret; + + if (!wseq->ctl) { + cs_dsp_err(dsp, "No control for write sequence\n"); + return -EINVAL; + } + + words = kzalloc(wseq->ctl->len, GFP_KERNEL); + if (!words) + return -ENOMEM; + + ret = cs_dsp_coeff_read_ctrl(wseq->ctl, 0, words, wseq->ctl->len); + if (ret) { + cs_dsp_err(dsp, "Failed to read %s: %d\n", wseq->ctl->subname, ret); + goto err_free; + } + + INIT_LIST_HEAD(&wseq->ops); + + chunk = cs_dsp_chunk(words, wseq->ctl->len); + + while (!cs_dsp_chunk_end(&chunk)) { + op = devm_kzalloc(dsp->dev, sizeof(*op), GFP_KERNEL); + if (!op) { + ret = -ENOMEM; + goto err_free; + } + + op->offset = cs_dsp_chunk_bytes(&chunk); + op->operation = cs_dsp_chunk_read(&chunk, 8); + + switch (op->operation) { + case CS_DSP_WSEQ_END: + op->data = WSEQ_END_OF_SCRIPT; + break; + case CS_DSP_WSEQ_UNLOCK: + op->data = cs_dsp_chunk_read(&chunk, 16); + break; + case CS_DSP_WSEQ_ADDR8: + op->address = cs_dsp_chunk_read(&chunk, 8); + op->data = cs_dsp_chunk_read(&chunk, 32); + break; + case CS_DSP_WSEQ_H16: + case CS_DSP_WSEQ_L16: + op->address = cs_dsp_chunk_read(&chunk, 24); + op->data = cs_dsp_chunk_read(&chunk, 16); + break; + case CS_DSP_WSEQ_FULL: + op->address = cs_dsp_chunk_read(&chunk, 32); + op->data = cs_dsp_chunk_read(&chunk, 32); + break; + default: + ret = -EINVAL; + cs_dsp_err(dsp, "Unsupported op: %X\n", op->operation); + devm_kfree(dsp->dev, op); + goto err_free; + } + + list_add_tail(&op->list, &wseq->ops); + + if (op->operation == CS_DSP_WSEQ_END) + break; + } + + if (op && op->operation != CS_DSP_WSEQ_END) { + cs_dsp_err(dsp, "%s missing end terminator\n", wseq->ctl->subname); + ret = -ENOENT; + } + +err_free: + kfree(words); + + return ret; +} + +/** + * cs_dsp_wseq_init() - Initialize write sequences contained within the loaded DSP firmware + * @dsp: Pointer to DSP structure + * @wseqs: List of write sequences to initialize + * @num_wseqs: Number of write sequences to initialize + * + * Return: Zero for success, a negative number on error. + */ +int cs_dsp_wseq_init(struct cs_dsp *dsp, struct cs_dsp_wseq *wseqs, unsigned int num_wseqs) +{ + int i, ret; + + lockdep_assert_held(&dsp->pwr_lock); + + for (i = 0; i < num_wseqs; i++) { + ret = cs_dsp_populate_wseq(dsp, &wseqs[i]); + if (ret) { + cs_dsp_wseq_clear(dsp, &wseqs[i]); + return ret; + } + } + + return 0; +} +EXPORT_SYMBOL_NS_GPL(cs_dsp_wseq_init, FW_CS_DSP); + +static struct cs_dsp_wseq_op *cs_dsp_wseq_find_op(u32 addr, u8 op_code, + struct list_head *wseq_ops) +{ + struct cs_dsp_wseq_op *op; + + list_for_each_entry(op, wseq_ops, list) { + if (op->operation == op_code && op->address == addr) + return op; + } + + return NULL; +} + +/** + * cs_dsp_wseq_write() - Add or update an entry in a write sequence + * @dsp: Pointer to a DSP structure + * @wseq: Write sequence to write to + * @addr: Address of the register to be written to + * @data: Data to be written + * @op_code: The type of operation of the new entry + * @update: If true, searches for the first entry in the write sequence with + * the same address and op_code, and replaces it. If false, creates a new entry + * at the tail + * + * This function formats register address and value pairs into the format + * required for write sequence entries, and either updates or adds the + * new entry into the write sequence. + * + * If update is set to true and no matching entry is found, it will add a new entry. + * + * Return: Zero for success, a negative number on error. + */ +int cs_dsp_wseq_write(struct cs_dsp *dsp, struct cs_dsp_wseq *wseq, + u32 addr, u32 data, u8 op_code, bool update) +{ + struct cs_dsp_wseq_op *op_end, *op_new = NULL; + u32 words[WSEQ_OP_MAX_WORDS]; + struct cs_dsp_chunk chunk; + int new_op_size, ret; + + if (update) + op_new = cs_dsp_wseq_find_op(addr, op_code, &wseq->ops); + + /* If entry to update is not found, treat it as a new operation */ + if (!op_new) { + op_end = cs_dsp_wseq_find_op(0, CS_DSP_WSEQ_END, &wseq->ops); + if (!op_end) { + cs_dsp_err(dsp, "Missing terminator for %s\n", wseq->ctl->subname); + return -EINVAL; + } + + op_new = devm_kzalloc(dsp->dev, sizeof(*op_new), GFP_KERNEL); + if (!op_new) + return -ENOMEM; + + op_new->operation = op_code; + op_new->address = addr; + op_new->offset = op_end->offset; + update = false; + } + + op_new->data = data; + + chunk = cs_dsp_chunk(words, sizeof(words)); + cs_dsp_chunk_write(&chunk, 8, op_new->operation); + + switch (op_code) { + case CS_DSP_WSEQ_FULL: + cs_dsp_chunk_write(&chunk, 32, op_new->address); + cs_dsp_chunk_write(&chunk, 32, op_new->data); + break; + case CS_DSP_WSEQ_L16: + case CS_DSP_WSEQ_H16: + cs_dsp_chunk_write(&chunk, 24, op_new->address); + cs_dsp_chunk_write(&chunk, 16, op_new->data); + break; + default: + ret = -EINVAL; + cs_dsp_err(dsp, "Operation %X not supported\n", op_code); + goto op_new_free; + } + + new_op_size = cs_dsp_chunk_bytes(&chunk); + + if (!update) { + if (wseq->ctl->len - op_end->offset < new_op_size) { + cs_dsp_err(dsp, "Not enough memory in %s for entry\n", wseq->ctl->subname); + ret = -E2BIG; + goto op_new_free; + } + + op_end->offset += new_op_size; + + ret = cs_dsp_coeff_write_ctrl(wseq->ctl, op_end->offset / sizeof(u32), + &op_end->data, sizeof(u32)); + if (ret) + goto op_new_free; + + list_add_tail(&op_new->list, &op_end->list); + } + + ret = cs_dsp_coeff_write_ctrl(wseq->ctl, op_new->offset / sizeof(u32), + words, new_op_size); + if (ret) + goto op_new_free; + + return 0; + +op_new_free: + devm_kfree(dsp->dev, op_new); + + return ret; +} +EXPORT_SYMBOL_NS_GPL(cs_dsp_wseq_write, FW_CS_DSP); + +/** + * cs_dsp_wseq_multi_write() - Add or update multiple entries in a write sequence + * @dsp: Pointer to a DSP structure + * @wseq: Write sequence to write to + * @reg_seq: List of address-data pairs + * @num_regs: Number of address-data pairs + * @op_code: The types of operations of the new entries + * @update: If true, searches for the first entry in the write sequence with + * the same address and op_code, and replaces it. If false, creates a new entry + * at the tail + * + * This function calls cs_dsp_wseq_write() for multiple address-data pairs. + * + * Return: Zero for success, a negative number on error. + */ +int cs_dsp_wseq_multi_write(struct cs_dsp *dsp, struct cs_dsp_wseq *wseq, + const struct reg_sequence *reg_seq, int num_regs, + u8 op_code, bool update) +{ + int i, ret; + + for (i = 0; i < num_regs; i++) { + ret = cs_dsp_wseq_write(dsp, wseq, reg_seq[i].reg, + reg_seq[i].def, op_code, update); + if (ret) + return ret; + } + + return 0; +} +EXPORT_SYMBOL_NS_GPL(cs_dsp_wseq_multi_write, FW_CS_DSP); + MODULE_DESCRIPTION("Cirrus Logic DSP Support"); MODULE_AUTHOR("Simon Trimmer "); MODULE_LICENSE("GPL v2"); diff --git a/include/linux/firmware/cirrus/cs_dsp.h b/include/linux/firmware/cirrus/cs_dsp.h index 82687e07a7c2..c28a6b9c3b2d 100644 --- a/include/linux/firmware/cirrus/cs_dsp.h +++ b/include/linux/firmware/cirrus/cs_dsp.h @@ -42,6 +42,16 @@ #define CS_DSP_ACKED_CTL_MIN_VALUE 0 #define CS_DSP_ACKED_CTL_MAX_VALUE 0xFFFFFF +/* + * Write sequence operation codes + */ +#define CS_DSP_WSEQ_FULL 0x00 +#define CS_DSP_WSEQ_ADDR8 0x02 +#define CS_DSP_WSEQ_L16 0x04 +#define CS_DSP_WSEQ_H16 0x05 +#define CS_DSP_WSEQ_UNLOCK 0xFD +#define CS_DSP_WSEQ_END 0xFF + /** * struct cs_dsp_region - Describes a logical memory region in DSP address space * @type: Memory region type @@ -258,6 +268,23 @@ struct cs_dsp_alg_region *cs_dsp_find_alg_region(struct cs_dsp *dsp, const char *cs_dsp_mem_region_name(unsigned int type); +/** + * struct cs_dsp_wseq - Describes a write sequence + * @ctl: Write sequence cs_dsp control + * @ops: Operations contained within + */ +struct cs_dsp_wseq { + struct cs_dsp_coeff_ctl *ctl; + struct list_head ops; +}; + +int cs_dsp_wseq_init(struct cs_dsp *dsp, struct cs_dsp_wseq *wseqs, unsigned int num_wseqs); +int cs_dsp_wseq_write(struct cs_dsp *dsp, struct cs_dsp_wseq *wseq, u32 addr, u32 data, + u8 op_code, bool update); +int cs_dsp_wseq_multi_write(struct cs_dsp *dsp, struct cs_dsp_wseq *wseq, + const struct reg_sequence *reg_seq, int num_regs, + u8 op_code, bool update); + /** * struct cs_dsp_chunk - Describes a buffer holding data formatted for the DSP * @data: Pointer to underlying buffer memory From 2fab5abad124fe7e1b99ccba3305aa4c5a24496b Mon Sep 17 00:00:00 2001 From: James Ogletree Date: Thu, 20 Jun 2024 16:17:42 +0000 Subject: [PATCH 35/87] dt-bindings: input: cirrus,cs40l50: Add initial DT binding CS40L50 is a haptic driver with waveform memory, integrated DSP, and closed-loop algorithms. Add a YAML DT binding document for this device. Reviewed-by: Krzysztof Kozlowski Signed-off-by: James Ogletree Reviewed-by: Jeff LaBundy Link: https://lore.kernel.org/r/20240620161745.2312359-3-jogletre@opensource.cirrus.com Signed-off-by: Lee Jones --- .../bindings/input/cirrus,cs40l50.yaml | 68 +++++++++++++++++++ MAINTAINERS | 8 +++ 2 files changed, 76 insertions(+) create mode 100644 Documentation/devicetree/bindings/input/cirrus,cs40l50.yaml diff --git a/Documentation/devicetree/bindings/input/cirrus,cs40l50.yaml b/Documentation/devicetree/bindings/input/cirrus,cs40l50.yaml new file mode 100644 index 000000000000..89bd06864bd4 --- /dev/null +++ b/Documentation/devicetree/bindings/input/cirrus,cs40l50.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/cirrus,cs40l50.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cirrus Logic CS40L50 Advanced Haptic Driver + +maintainers: + - James Ogletree + +description: + CS40L50 is a haptic driver with waveform memory, + integrated DSP, and closed-loop algorithms. + +properties: + compatible: + enum: + - cirrus,cs40l50 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + reset-gpios: + maxItems: 1 + + vdd-a-supply: + description: Power supply for internal analog circuits. + + vdd-p-supply: + description: Power supply for always-on circuits. + + vdd-io-supply: + description: Power supply for digital input/output. + + vdd-b-supply: + description: Power supply for the boost converter. + +required: + - compatible + - reg + - interrupts + - reset-gpios + - vdd-io-supply + +additionalProperties: false + +examples: + - | + #include + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + haptic-driver@34 { + compatible = "cirrus,cs40l50"; + reg = <0x34>; + interrupt-parent = <&gpio>; + interrupts = <113 IRQ_TYPE_LEVEL_LOW>; + reset-gpios = <&gpio 112 GPIO_ACTIVE_LOW>; + vdd-io-supply = <&vreg>; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index d6c90161c7bf..6db96604ac50 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5206,6 +5206,14 @@ F: sound/pci/hda/hda_component* F: sound/pci/hda/hda_cs_dsp_ctl.* F: sound/soc/codecs/cs* +CIRRUS LOGIC HAPTIC DRIVERS +M: James Ogletree +M: Fred Treven +M: Ben Bright +L: patches@opensource.cirrus.com +S: Supported +F: Documentation/devicetree/bindings/input/cirrus,cs40l50.yaml + CIRRUS LOGIC DSP FIRMWARE DRIVER M: Simon Trimmer M: Charles Keepax From cb626376cbd00cd69329371519a8e9568baef715 Mon Sep 17 00:00:00 2001 From: James Ogletree Date: Thu, 20 Jun 2024 16:17:43 +0000 Subject: [PATCH 36/87] mfd: cs40l50: Add support for CS40L50 core driver Introduce support for Cirrus Logic Device CS40L50: a haptic driver with waveform memory, integrated DSP, and closed-loop algorithms. The MFD component registers and initializes the device. Signed-off-by: James Ogletree Reviewed-by: Jeff LaBundy Link: https://lore.kernel.org/r/20240620161745.2312359-4-jogletre@opensource.cirrus.com Signed-off-by: Lee Jones --- MAINTAINERS | 2 + drivers/mfd/Kconfig | 30 ++ drivers/mfd/Makefile | 4 + drivers/mfd/cs40l50-core.c | 570 ++++++++++++++++++++++++++++++++++++ drivers/mfd/cs40l50-i2c.c | 68 +++++ drivers/mfd/cs40l50-spi.c | 68 +++++ include/linux/mfd/cs40l50.h | 137 +++++++++ 7 files changed, 879 insertions(+) create mode 100644 drivers/mfd/cs40l50-core.c create mode 100644 drivers/mfd/cs40l50-i2c.c create mode 100644 drivers/mfd/cs40l50-spi.c create mode 100644 include/linux/mfd/cs40l50.h diff --git a/MAINTAINERS b/MAINTAINERS index 6db96604ac50..5c776ac417b9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5213,6 +5213,8 @@ M: Ben Bright L: patches@opensource.cirrus.com S: Supported F: Documentation/devicetree/bindings/input/cirrus,cs40l50.yaml +F: drivers/mfd/cs40l* +F: include/linux/mfd/cs40l* CIRRUS LOGIC DSP FIRMWARE DRIVER M: Simon Trimmer diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 266b4f54af60..c09403ea408e 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -2243,6 +2243,36 @@ config MCP_UCB1200_TS endmenu +config MFD_CS40L50_CORE + tristate + select MFD_CORE + select FW_CS_DSP + select REGMAP_IRQ + +config MFD_CS40L50_I2C + tristate "Cirrus Logic CS40L50 (I2C)" + select REGMAP_I2C + select MFD_CS40L50_CORE + depends on I2C + help + Select this to support the Cirrus Logic CS40L50 Haptic + Driver over I2C. + + This driver can be built as a module. If built as a module it will be + called "cs40l50-i2c". + +config MFD_CS40L50_SPI + tristate "Cirrus Logic CS40L50 (SPI)" + select REGMAP_SPI + select MFD_CS40L50_CORE + depends on SPI + help + Select this to support the Cirrus Logic CS40L50 Haptic + Driver over SPI. + + This driver can be built as a module. If built as a module it will be + called "cs40l50-spi". + config MFD_VEXPRESS_SYSREG tristate "Versatile Express System Registers" depends on VEXPRESS_CONFIG && GPIOLIB diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index c66f07edcd0e..a8d18ba155d0 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -88,6 +88,10 @@ obj-$(CONFIG_MFD_MADERA) += madera.o obj-$(CONFIG_MFD_MADERA_I2C) += madera-i2c.o obj-$(CONFIG_MFD_MADERA_SPI) += madera-spi.o +obj-$(CONFIG_MFD_CS40L50_CORE) += cs40l50-core.o +obj-$(CONFIG_MFD_CS40L50_I2C) += cs40l50-i2c.o +obj-$(CONFIG_MFD_CS40L50_SPI) += cs40l50-spi.o + obj-$(CONFIG_TPS6105X) += tps6105x.o obj-$(CONFIG_TPS65010) += tps65010.o obj-$(CONFIG_TPS6507X) += tps6507x.o diff --git a/drivers/mfd/cs40l50-core.c b/drivers/mfd/cs40l50-core.c new file mode 100644 index 000000000000..26e7a769eb14 --- /dev/null +++ b/drivers/mfd/cs40l50-core.c @@ -0,0 +1,570 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * CS40L50 Advanced Haptic Driver with waveform memory, + * integrated DSP, and closed-loop algorithms + * + * Copyright 2024 Cirrus Logic, Inc. + * + * Author: James Ogletree + */ + +#include +#include +#include +#include +#include +#include + +static const struct mfd_cell cs40l50_devs[] = { + { .name = "cs40l50-codec", }, + { .name = "cs40l50-vibra", }, +}; + +const struct regmap_config cs40l50_regmap = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .reg_format_endian = REGMAP_ENDIAN_BIG, + .val_format_endian = REGMAP_ENDIAN_BIG, +}; +EXPORT_SYMBOL_GPL(cs40l50_regmap); + +static const char * const cs40l50_supplies[] = { + "vdd-io", +}; + +static const struct regmap_irq cs40l50_reg_irqs[] = { + REGMAP_IRQ_REG(CS40L50_DSP_QUEUE_IRQ, CS40L50_IRQ1_INT_2_OFFSET, + CS40L50_DSP_QUEUE_MASK), + REGMAP_IRQ_REG(CS40L50_AMP_SHORT_IRQ, CS40L50_IRQ1_INT_1_OFFSET, + CS40L50_AMP_SHORT_MASK), + REGMAP_IRQ_REG(CS40L50_TEMP_ERR_IRQ, CS40L50_IRQ1_INT_8_OFFSET, + CS40L50_TEMP_ERR_MASK), + REGMAP_IRQ_REG(CS40L50_BST_UVP_IRQ, CS40L50_IRQ1_INT_9_OFFSET, + CS40L50_BST_UVP_MASK), + REGMAP_IRQ_REG(CS40L50_BST_SHORT_IRQ, CS40L50_IRQ1_INT_9_OFFSET, + CS40L50_BST_SHORT_MASK), + REGMAP_IRQ_REG(CS40L50_BST_ILIMIT_IRQ, CS40L50_IRQ1_INT_9_OFFSET, + CS40L50_BST_ILIMIT_MASK), + REGMAP_IRQ_REG(CS40L50_UVLO_VDDBATT_IRQ, CS40L50_IRQ1_INT_10_OFFSET, + CS40L50_UVLO_VDDBATT_MASK), + REGMAP_IRQ_REG(CS40L50_GLOBAL_ERROR_IRQ, CS40L50_IRQ1_INT_18_OFFSET, + CS40L50_GLOBAL_ERROR_MASK), +}; + +static struct regmap_irq_chip cs40l50_irq_chip = { + .name = "cs40l50", + .status_base = CS40L50_IRQ1_INT_1, + .mask_base = CS40L50_IRQ1_MASK_1, + .ack_base = CS40L50_IRQ1_INT_1, + .num_regs = 22, + .irqs = cs40l50_reg_irqs, + .num_irqs = ARRAY_SIZE(cs40l50_reg_irqs), + .runtime_pm = true, +}; + +int cs40l50_dsp_write(struct device *dev, struct regmap *regmap, u32 val) +{ + int i, ret; + u32 ack; + + /* Device NAKs if hibernating, so optionally retry */ + for (i = 0; i < CS40L50_DSP_TIMEOUT_COUNT; i++) { + ret = regmap_write(regmap, CS40L50_DSP_QUEUE, val); + if (!ret) + break; + + usleep_range(CS40L50_DSP_POLL_US, CS40L50_DSP_POLL_US + 100); + } + + /* If the write never took place, no need to check for the ACK */ + if (i == CS40L50_DSP_TIMEOUT_COUNT) { + dev_err(dev, "Timed out writing %#X to DSP: %d\n", val, ret); + return ret; + } + + ret = regmap_read_poll_timeout(regmap, CS40L50_DSP_QUEUE, ack, !ack, + CS40L50_DSP_POLL_US, + CS40L50_DSP_POLL_US * CS40L50_DSP_TIMEOUT_COUNT); + if (ret) + dev_err(dev, "DSP failed to ACK %#X: %d\n", val, ret); + + return ret; +} +EXPORT_SYMBOL_GPL(cs40l50_dsp_write); + +static const struct cs_dsp_region cs40l50_dsp_regions[] = { + { .type = WMFW_HALO_PM_PACKED, .base = CS40L50_PMEM_0 }, + { .type = WMFW_HALO_XM_PACKED, .base = CS40L50_XMEM_PACKED_0 }, + { .type = WMFW_HALO_YM_PACKED, .base = CS40L50_YMEM_PACKED_0 }, + { .type = WMFW_ADSP2_XM, .base = CS40L50_XMEM_UNPACKED24_0 }, + { .type = WMFW_ADSP2_YM, .base = CS40L50_YMEM_UNPACKED24_0 }, +}; + +static const struct reg_sequence cs40l50_internal_vamp_config[] = { + { CS40L50_BST_LPMODE_SEL, CS40L50_DCM_LOW_POWER }, + { CS40L50_BLOCK_ENABLES2, CS40L50_OVERTEMP_WARN }, +}; + +static const struct reg_sequence cs40l50_irq_mask_override[] = { + { CS40L50_IRQ1_MASK_2, CS40L50_IRQ_MASK_2_OVERRIDE }, + { CS40L50_IRQ1_MASK_20, CS40L50_IRQ_MASK_20_OVERRIDE }, +}; + +static int cs40l50_wseq_init(struct cs40l50 *cs40l50) +{ + struct cs_dsp *dsp = &cs40l50->dsp; + + cs40l50->wseqs[CS40L50_STANDBY].ctl = cs_dsp_get_ctl(dsp, "STANDBY_SEQUENCE", + WMFW_ADSP2_XM, + CS40L50_PM_ALGO); + if (!cs40l50->wseqs[CS40L50_STANDBY].ctl) { + dev_err(cs40l50->dev, "Control not found for standby sequence\n"); + return -ENOENT; + } + + cs40l50->wseqs[CS40L50_ACTIVE].ctl = cs_dsp_get_ctl(dsp, "ACTIVE_SEQUENCE", + WMFW_ADSP2_XM, + CS40L50_PM_ALGO); + if (!cs40l50->wseqs[CS40L50_ACTIVE].ctl) { + dev_err(cs40l50->dev, "Control not found for active sequence\n"); + return -ENOENT; + } + + cs40l50->wseqs[CS40L50_PWR_ON].ctl = cs_dsp_get_ctl(dsp, "PM_PWR_ON_SEQ", + WMFW_ADSP2_XM, + CS40L50_PM_ALGO); + if (!cs40l50->wseqs[CS40L50_PWR_ON].ctl) { + dev_err(cs40l50->dev, "Control not found for power-on sequence\n"); + return -ENOENT; + } + + return cs_dsp_wseq_init(&cs40l50->dsp, cs40l50->wseqs, ARRAY_SIZE(cs40l50->wseqs)); +} + +static int cs40l50_dsp_config(struct cs40l50 *cs40l50) +{ + int ret; + + /* Configure internal V_AMP supply */ + ret = regmap_multi_reg_write(cs40l50->regmap, cs40l50_internal_vamp_config, + ARRAY_SIZE(cs40l50_internal_vamp_config)); + if (ret) + return ret; + + ret = cs_dsp_wseq_multi_write(&cs40l50->dsp, &cs40l50->wseqs[CS40L50_PWR_ON], + cs40l50_internal_vamp_config, CS_DSP_WSEQ_FULL, + ARRAY_SIZE(cs40l50_internal_vamp_config), false); + if (ret) + return ret; + + /* Override firmware defaults for IRQ masks */ + ret = regmap_multi_reg_write(cs40l50->regmap, cs40l50_irq_mask_override, + ARRAY_SIZE(cs40l50_irq_mask_override)); + if (ret) + return ret; + + return cs_dsp_wseq_multi_write(&cs40l50->dsp, &cs40l50->wseqs[CS40L50_PWR_ON], + cs40l50_irq_mask_override, CS_DSP_WSEQ_FULL, + ARRAY_SIZE(cs40l50_irq_mask_override), false); +} + +static int cs40l50_dsp_post_run(struct cs_dsp *dsp) +{ + struct cs40l50 *cs40l50 = container_of(dsp, struct cs40l50, dsp); + int ret; + + ret = cs40l50_wseq_init(cs40l50); + if (ret) + return ret; + + ret = cs40l50_dsp_config(cs40l50); + if (ret) { + dev_err(cs40l50->dev, "Failed to configure DSP: %d\n", ret); + return ret; + } + + ret = devm_mfd_add_devices(cs40l50->dev, PLATFORM_DEVID_NONE, cs40l50_devs, + ARRAY_SIZE(cs40l50_devs), NULL, 0, NULL); + if (ret) + dev_err(cs40l50->dev, "Failed to add child devices: %d\n", ret); + + return ret; +} + +static const struct cs_dsp_client_ops client_ops = { + .post_run = cs40l50_dsp_post_run, +}; + +static void cs40l50_dsp_remove(void *data) +{ + cs_dsp_remove(data); +} + +static int cs40l50_dsp_init(struct cs40l50 *cs40l50) +{ + int ret; + + cs40l50->dsp.num = 1; + cs40l50->dsp.type = WMFW_HALO; + cs40l50->dsp.dev = cs40l50->dev; + cs40l50->dsp.regmap = cs40l50->regmap; + cs40l50->dsp.base = CS40L50_CORE_BASE; + cs40l50->dsp.base_sysinfo = CS40L50_SYS_INFO_ID; + cs40l50->dsp.mem = cs40l50_dsp_regions; + cs40l50->dsp.num_mems = ARRAY_SIZE(cs40l50_dsp_regions); + cs40l50->dsp.no_core_startstop = true; + cs40l50->dsp.client_ops = &client_ops; + + ret = cs_dsp_halo_init(&cs40l50->dsp); + if (ret) + return ret; + + return devm_add_action_or_reset(cs40l50->dev, cs40l50_dsp_remove, + &cs40l50->dsp); +} + +static int cs40l50_reset_dsp(struct cs40l50 *cs40l50) +{ + int ret; + + mutex_lock(&cs40l50->lock); + + if (cs40l50->dsp.running) + cs_dsp_stop(&cs40l50->dsp); + + if (cs40l50->dsp.booted) + cs_dsp_power_down(&cs40l50->dsp); + + ret = cs40l50_dsp_write(cs40l50->dev, cs40l50->regmap, CS40L50_SHUTDOWN); + if (ret) + goto err_mutex; + + ret = cs_dsp_power_up(&cs40l50->dsp, cs40l50->fw, "cs40l50.wmfw", + cs40l50->bin, "cs40l50.bin", "cs40l50"); + if (ret) + goto err_mutex; + + ret = cs40l50_dsp_write(cs40l50->dev, cs40l50->regmap, CS40L50_SYSTEM_RESET); + if (ret) + goto err_mutex; + + ret = cs40l50_dsp_write(cs40l50->dev, cs40l50->regmap, CS40L50_PREVENT_HIBER); + if (ret) + goto err_mutex; + + ret = cs_dsp_run(&cs40l50->dsp); +err_mutex: + mutex_unlock(&cs40l50->lock); + + return ret; +} + +static void cs40l50_dsp_power_down(void *data) +{ + cs_dsp_power_down(data); +} + +static void cs40l50_dsp_stop(void *data) +{ + cs_dsp_stop(data); +} + +static void cs40l50_dsp_bringup(const struct firmware *bin, void *context) +{ + struct cs40l50 *cs40l50 = context; + u32 nwaves; + int ret; + + /* Wavetable is optional; bringup DSP regardless */ + cs40l50->bin = bin; + + ret = cs40l50_reset_dsp(cs40l50); + if (ret) { + dev_err(cs40l50->dev, "Failed to reset DSP: %d\n", ret); + goto err_fw; + } + + ret = regmap_read(cs40l50->regmap, CS40L50_NUM_WAVES, &nwaves); + if (ret) + goto err_fw; + + dev_info(cs40l50->dev, "%u RAM effects loaded\n", nwaves); + + /* Add teardown actions for first-time bringup */ + ret = devm_add_action_or_reset(cs40l50->dev, cs40l50_dsp_power_down, + &cs40l50->dsp); + if (ret) { + dev_err(cs40l50->dev, "Failed to add power down action: %d\n", ret); + goto err_fw; + } + + ret = devm_add_action_or_reset(cs40l50->dev, cs40l50_dsp_stop, &cs40l50->dsp); + if (ret) + dev_err(cs40l50->dev, "Failed to add stop action: %d\n", ret); +err_fw: + release_firmware(cs40l50->bin); + release_firmware(cs40l50->fw); +} + +static void cs40l50_request_firmware(const struct firmware *fw, void *context) +{ + struct cs40l50 *cs40l50 = context; + int ret; + + if (!fw) { + dev_err(cs40l50->dev, "No firmware file found\n"); + return; + } + + cs40l50->fw = fw; + + ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_UEVENT, CS40L50_WT, + cs40l50->dev, GFP_KERNEL, cs40l50, + cs40l50_dsp_bringup); + if (ret) { + dev_err(cs40l50->dev, "Failed to request %s: %d\n", CS40L50_WT, ret); + release_firmware(cs40l50->fw); + } +} + +struct cs40l50_irq { + const char *name; + int virq; +}; + +static struct cs40l50_irq cs40l50_irqs[] = { + { "DSP", }, + { "Global", }, + { "Boost UVLO", }, + { "Boost current limit", }, + { "Boost short", }, + { "Boost undervolt", }, + { "Overtemp", }, + { "Amp short", }, +}; + +static const struct reg_sequence cs40l50_err_rls[] = { + { CS40L50_ERR_RLS, CS40L50_GLOBAL_ERR_RLS_SET }, + { CS40L50_ERR_RLS, CS40L50_GLOBAL_ERR_RLS_CLEAR }, +}; + +static irqreturn_t cs40l50_hw_err(int irq, void *data) +{ + struct cs40l50 *cs40l50 = data; + int ret = 0, i; + + mutex_lock(&cs40l50->lock); + + /* Log hardware interrupt and execute error release sequence */ + for (i = 1; i < ARRAY_SIZE(cs40l50_irqs); i++) { + if (cs40l50_irqs[i].virq == irq) { + dev_err(cs40l50->dev, "%s error\n", cs40l50_irqs[i].name); + ret = regmap_multi_reg_write(cs40l50->regmap, cs40l50_err_rls, + ARRAY_SIZE(cs40l50_err_rls)); + break; + } + } + + mutex_unlock(&cs40l50->lock); + return IRQ_RETVAL(!ret); +} + +static irqreturn_t cs40l50_dsp_queue(int irq, void *data) +{ + struct cs40l50 *cs40l50 = data; + u32 rd_ptr, val, wt_ptr; + int ret = 0; + + mutex_lock(&cs40l50->lock); + + /* Read from DSP queue, log, and update read pointer */ + while (!ret) { + ret = regmap_read(cs40l50->regmap, CS40L50_DSP_QUEUE_WT, &wt_ptr); + if (ret) + break; + + ret = regmap_read(cs40l50->regmap, CS40L50_DSP_QUEUE_RD, &rd_ptr); + if (ret) + break; + + /* Check if queue is empty */ + if (wt_ptr == rd_ptr) + break; + + ret = regmap_read(cs40l50->regmap, rd_ptr, &val); + if (ret) + break; + + dev_dbg(cs40l50->dev, "DSP payload: %#X", val); + + rd_ptr += sizeof(u32); + + if (rd_ptr > CS40L50_DSP_QUEUE_END) + rd_ptr = CS40L50_DSP_QUEUE_BASE; + + ret = regmap_write(cs40l50->regmap, CS40L50_DSP_QUEUE_RD, rd_ptr); + } + + mutex_unlock(&cs40l50->lock); + + return IRQ_RETVAL(!ret); +} + +static int cs40l50_irq_init(struct cs40l50 *cs40l50) +{ + int ret, i, virq; + + ret = devm_regmap_add_irq_chip(cs40l50->dev, cs40l50->regmap, cs40l50->irq, + IRQF_ONESHOT | IRQF_SHARED, 0, + &cs40l50_irq_chip, &cs40l50->irq_data); + if (ret) { + dev_err(cs40l50->dev, "Failed adding IRQ chip\n"); + return ret; + } + + for (i = 0; i < ARRAY_SIZE(cs40l50_irqs); i++) { + virq = regmap_irq_get_virq(cs40l50->irq_data, i); + if (virq < 0) { + dev_err(cs40l50->dev, "Failed getting virq for %s\n", + cs40l50_irqs[i].name); + return virq; + } + + cs40l50_irqs[i].virq = virq; + + /* Handle DSP and hardware interrupts separately */ + ret = devm_request_threaded_irq(cs40l50->dev, virq, NULL, + i ? cs40l50_hw_err : cs40l50_dsp_queue, + IRQF_ONESHOT | IRQF_SHARED, + cs40l50_irqs[i].name, cs40l50); + if (ret) { + return dev_err_probe(cs40l50->dev, ret, + "Failed requesting %s IRQ\n", + cs40l50_irqs[i].name); + } + } + + return 0; +} + +static int cs40l50_get_model(struct cs40l50 *cs40l50) +{ + int ret; + + ret = regmap_read(cs40l50->regmap, CS40L50_DEVID, &cs40l50->devid); + if (ret) + return ret; + + if (cs40l50->devid != CS40L50_DEVID_A) + return -EINVAL; + + ret = regmap_read(cs40l50->regmap, CS40L50_REVID, &cs40l50->revid); + if (ret) + return ret; + + if (cs40l50->revid < CS40L50_REVID_B0) + return -EINVAL; + + dev_dbg(cs40l50->dev, "Cirrus Logic CS40L50 rev. %02X\n", cs40l50->revid); + + return 0; +} + +static int cs40l50_pm_runtime_setup(struct device *dev) +{ + int ret; + + pm_runtime_set_autosuspend_delay(dev, CS40L50_AUTOSUSPEND_MS); + pm_runtime_use_autosuspend(dev); + pm_runtime_get_noresume(dev); + ret = pm_runtime_set_active(dev); + if (ret) + return ret; + + return devm_pm_runtime_enable(dev); +} + +int cs40l50_probe(struct cs40l50 *cs40l50) +{ + struct device *dev = cs40l50->dev; + int ret; + + mutex_init(&cs40l50->lock); + + cs40l50->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); + if (IS_ERR(cs40l50->reset_gpio)) + return dev_err_probe(dev, PTR_ERR(cs40l50->reset_gpio), + "Failed getting reset GPIO\n"); + + ret = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(cs40l50_supplies), + cs40l50_supplies); + if (ret) + return dev_err_probe(dev, ret, "Failed getting supplies\n"); + + /* Ensure minimum reset pulse width */ + usleep_range(CS40L50_RESET_PULSE_US, CS40L50_RESET_PULSE_US + 100); + + gpiod_set_value_cansleep(cs40l50->reset_gpio, 0); + + /* Wait for control port to be ready */ + usleep_range(CS40L50_CP_READY_US, CS40L50_CP_READY_US + 100); + + ret = cs40l50_get_model(cs40l50); + if (ret) + return dev_err_probe(dev, ret, "Failed to get part number\n"); + + ret = cs40l50_dsp_init(cs40l50); + if (ret) + return dev_err_probe(dev, ret, "Failed to initialize DSP\n"); + + ret = cs40l50_pm_runtime_setup(dev); + if (ret) + return dev_err_probe(dev, ret, "Failed to initialize runtime PM\n"); + + ret = cs40l50_irq_init(cs40l50); + if (ret) + return ret; + + ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_UEVENT, CS40L50_FW, + dev, GFP_KERNEL, cs40l50, cs40l50_request_firmware); + if (ret) + return dev_err_probe(dev, ret, "Failed to request %s\n", CS40L50_FW); + + pm_runtime_mark_last_busy(dev); + pm_runtime_put_autosuspend(dev); + + return 0; +} +EXPORT_SYMBOL_GPL(cs40l50_probe); + +int cs40l50_remove(struct cs40l50 *cs40l50) +{ + gpiod_set_value_cansleep(cs40l50->reset_gpio, 1); + + return 0; +} +EXPORT_SYMBOL_GPL(cs40l50_remove); + +static int cs40l50_runtime_suspend(struct device *dev) +{ + struct cs40l50 *cs40l50 = dev_get_drvdata(dev); + + return regmap_write(cs40l50->regmap, CS40L50_DSP_QUEUE, CS40L50_ALLOW_HIBER); +} + +static int cs40l50_runtime_resume(struct device *dev) +{ + struct cs40l50 *cs40l50 = dev_get_drvdata(dev); + + return cs40l50_dsp_write(dev, cs40l50->regmap, CS40L50_PREVENT_HIBER); +} + +EXPORT_GPL_DEV_PM_OPS(cs40l50_pm_ops) = { + RUNTIME_PM_OPS(cs40l50_runtime_suspend, cs40l50_runtime_resume, NULL) +}; + +MODULE_DESCRIPTION("CS40L50 Advanced Haptic Driver"); +MODULE_AUTHOR("James Ogletree, Cirrus Logic Inc. "); +MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS(FW_CS_DSP); diff --git a/drivers/mfd/cs40l50-i2c.c b/drivers/mfd/cs40l50-i2c.c new file mode 100644 index 000000000000..639be743d956 --- /dev/null +++ b/drivers/mfd/cs40l50-i2c.c @@ -0,0 +1,68 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * CS40L50 Advanced Haptic Driver with waveform memory, + * integrated DSP, and closed-loop algorithms + * + * Copyright 2024 Cirrus Logic, Inc. + * + * Author: James Ogletree + */ + +#include +#include + +static int cs40l50_i2c_probe(struct i2c_client *i2c) +{ + struct cs40l50 *cs40l50; + + cs40l50 = devm_kzalloc(&i2c->dev, sizeof(*cs40l50), GFP_KERNEL); + if (!cs40l50) + return -ENOMEM; + + i2c_set_clientdata(i2c, cs40l50); + + cs40l50->dev = &i2c->dev; + cs40l50->irq = i2c->irq; + + cs40l50->regmap = devm_regmap_init_i2c(i2c, &cs40l50_regmap); + if (IS_ERR(cs40l50->regmap)) + return dev_err_probe(cs40l50->dev, PTR_ERR(cs40l50->regmap), + "Failed to initialize register map\n"); + + return cs40l50_probe(cs40l50); +} + +static void cs40l50_i2c_remove(struct i2c_client *i2c) +{ + struct cs40l50 *cs40l50 = i2c_get_clientdata(i2c); + + cs40l50_remove(cs40l50); +} + +static const struct i2c_device_id cs40l50_id_i2c[] = { + { "cs40l50" }, + {} +}; +MODULE_DEVICE_TABLE(i2c, cs40l50_id_i2c); + +static const struct of_device_id cs40l50_of_match[] = { + { .compatible = "cirrus,cs40l50" }, + {} +}; +MODULE_DEVICE_TABLE(of, cs40l50_of_match); + +static struct i2c_driver cs40l50_i2c_driver = { + .driver = { + .name = "cs40l50", + .of_match_table = cs40l50_of_match, + .pm = pm_ptr(&cs40l50_pm_ops), + }, + .id_table = cs40l50_id_i2c, + .probe = cs40l50_i2c_probe, + .remove = cs40l50_i2c_remove, +}; +module_i2c_driver(cs40l50_i2c_driver); + +MODULE_DESCRIPTION("CS40L50 I2C Driver"); +MODULE_AUTHOR("James Ogletree, Cirrus Logic Inc. "); +MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/cs40l50-spi.c b/drivers/mfd/cs40l50-spi.c new file mode 100644 index 000000000000..53526b595a0d --- /dev/null +++ b/drivers/mfd/cs40l50-spi.c @@ -0,0 +1,68 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * CS40L50 Advanced Haptic Driver with waveform memory, + * integrated DSP, and closed-loop algorithms + * + * Copyright 2024 Cirrus Logic, Inc. + * + * Author: James Ogletree + */ + +#include +#include + +static int cs40l50_spi_probe(struct spi_device *spi) +{ + struct cs40l50 *cs40l50; + + cs40l50 = devm_kzalloc(&spi->dev, sizeof(*cs40l50), GFP_KERNEL); + if (!cs40l50) + return -ENOMEM; + + spi_set_drvdata(spi, cs40l50); + + cs40l50->dev = &spi->dev; + cs40l50->irq = spi->irq; + + cs40l50->regmap = devm_regmap_init_spi(spi, &cs40l50_regmap); + if (IS_ERR(cs40l50->regmap)) + return dev_err_probe(cs40l50->dev, PTR_ERR(cs40l50->regmap), + "Failed to initialize register map\n"); + + return cs40l50_probe(cs40l50); +} + +static void cs40l50_spi_remove(struct spi_device *spi) +{ + struct cs40l50 *cs40l50 = spi_get_drvdata(spi); + + cs40l50_remove(cs40l50); +} + +static const struct spi_device_id cs40l50_id_spi[] = { + { "cs40l50" }, + {} +}; +MODULE_DEVICE_TABLE(spi, cs40l50_id_spi); + +static const struct of_device_id cs40l50_of_match[] = { + { .compatible = "cirrus,cs40l50" }, + {} +}; +MODULE_DEVICE_TABLE(of, cs40l50_of_match); + +static struct spi_driver cs40l50_spi_driver = { + .driver = { + .name = "cs40l50", + .of_match_table = cs40l50_of_match, + .pm = pm_ptr(&cs40l50_pm_ops), + }, + .id_table = cs40l50_id_spi, + .probe = cs40l50_spi_probe, + .remove = cs40l50_spi_remove, +}; +module_spi_driver(cs40l50_spi_driver); + +MODULE_DESCRIPTION("CS40L50 SPI Driver"); +MODULE_AUTHOR("James Ogletree, Cirrus Logic Inc. "); +MODULE_LICENSE("GPL"); diff --git a/include/linux/mfd/cs40l50.h b/include/linux/mfd/cs40l50.h new file mode 100644 index 000000000000..e5dc49860944 --- /dev/null +++ b/include/linux/mfd/cs40l50.h @@ -0,0 +1,137 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * CS40L50 Advanced Haptic Driver with waveform memory, + * integrated DSP, and closed-loop algorithms + * + * Copyright 2024 Cirrus Logic, Inc. + * + * Author: James Ogletree + */ + +#ifndef __MFD_CS40L50_H__ +#define __MFD_CS40L50_H__ + +#include +#include +#include +#include + +/* Power Supply Configuration */ +#define CS40L50_BLOCK_ENABLES2 0x201C +#define CS40L50_ERR_RLS 0x2034 +#define CS40L50_BST_LPMODE_SEL 0x3810 +#define CS40L50_DCM_LOW_POWER 0x1 +#define CS40L50_OVERTEMP_WARN 0x4000010 + +/* Interrupts */ +#define CS40L50_IRQ1_INT_1 0xE010 +#define CS40L50_IRQ1_BASE CS40L50_IRQ1_INT_1 +#define CS40L50_IRQ1_INT_2 0xE014 +#define CS40L50_IRQ1_INT_8 0xE02C +#define CS40L50_IRQ1_INT_9 0xE030 +#define CS40L50_IRQ1_INT_10 0xE034 +#define CS40L50_IRQ1_INT_18 0xE054 +#define CS40L50_IRQ1_MASK_1 0xE090 +#define CS40L50_IRQ1_MASK_2 0xE094 +#define CS40L50_IRQ1_MASK_20 0xE0DC +#define CS40L50_IRQ1_INT_1_OFFSET (CS40L50_IRQ1_INT_1 - CS40L50_IRQ1_BASE) +#define CS40L50_IRQ1_INT_2_OFFSET (CS40L50_IRQ1_INT_2 - CS40L50_IRQ1_BASE) +#define CS40L50_IRQ1_INT_8_OFFSET (CS40L50_IRQ1_INT_8 - CS40L50_IRQ1_BASE) +#define CS40L50_IRQ1_INT_9_OFFSET (CS40L50_IRQ1_INT_9 - CS40L50_IRQ1_BASE) +#define CS40L50_IRQ1_INT_10_OFFSET (CS40L50_IRQ1_INT_10 - CS40L50_IRQ1_BASE) +#define CS40L50_IRQ1_INT_18_OFFSET (CS40L50_IRQ1_INT_18 - CS40L50_IRQ1_BASE) +#define CS40L50_IRQ_MASK_2_OVERRIDE 0xFFDF7FFF +#define CS40L50_IRQ_MASK_20_OVERRIDE 0x15C01000 +#define CS40L50_AMP_SHORT_MASK BIT(31) +#define CS40L50_DSP_QUEUE_MASK BIT(21) +#define CS40L50_TEMP_ERR_MASK BIT(31) +#define CS40L50_BST_UVP_MASK BIT(6) +#define CS40L50_BST_SHORT_MASK BIT(7) +#define CS40L50_BST_ILIMIT_MASK BIT(18) +#define CS40L50_UVLO_VDDBATT_MASK BIT(16) +#define CS40L50_GLOBAL_ERROR_MASK BIT(15) + +enum cs40l50_irq_list { + CS40L50_DSP_QUEUE_IRQ, + CS40L50_GLOBAL_ERROR_IRQ, + CS40L50_UVLO_VDDBATT_IRQ, + CS40L50_BST_ILIMIT_IRQ, + CS40L50_BST_SHORT_IRQ, + CS40L50_BST_UVP_IRQ, + CS40L50_TEMP_ERR_IRQ, + CS40L50_AMP_SHORT_IRQ, +}; + +/* DSP */ +#define CS40L50_XMEM_PACKED_0 0x2000000 +#define CS40L50_XMEM_UNPACKED24_0 0x2800000 +#define CS40L50_SYS_INFO_ID 0x25E0000 +#define CS40L50_DSP_QUEUE_WT 0x28042C8 +#define CS40L50_DSP_QUEUE_RD 0x28042CC +#define CS40L50_NUM_WAVES 0x2805C18 +#define CS40L50_CORE_BASE 0x2B80000 +#define CS40L50_YMEM_PACKED_0 0x2C00000 +#define CS40L50_YMEM_UNPACKED24_0 0x3400000 +#define CS40L50_PMEM_0 0x3800000 +#define CS40L50_DSP_POLL_US 1000 +#define CS40L50_DSP_TIMEOUT_COUNT 100 +#define CS40L50_RESET_PULSE_US 2200 +#define CS40L50_CP_READY_US 3100 +#define CS40L50_AUTOSUSPEND_MS 2000 +#define CS40L50_PM_ALGO 0x9F206 +#define CS40L50_GLOBAL_ERR_RLS_SET BIT(11) +#define CS40L50_GLOBAL_ERR_RLS_CLEAR 0 + +enum cs40l50_wseqs { + CS40L50_PWR_ON, + CS40L50_STANDBY, + CS40L50_ACTIVE, + CS40L50_NUM_WSEQS, +}; + +/* DSP Queue */ +#define CS40L50_DSP_QUEUE_BASE 0x11004 +#define CS40L50_DSP_QUEUE_END 0x1101C +#define CS40L50_DSP_QUEUE 0x11020 +#define CS40L50_PREVENT_HIBER 0x2000003 +#define CS40L50_ALLOW_HIBER 0x2000004 +#define CS40L50_SHUTDOWN 0x2000005 +#define CS40L50_SYSTEM_RESET 0x2000007 +#define CS40L50_START_I2S 0x3000002 +#define CS40L50_OWT_PUSH 0x3000008 +#define CS40L50_STOP_PLAYBACK 0x5000000 +#define CS40L50_OWT_DELETE 0xD000000 + +/* Firmware files */ +#define CS40L50_FW "cs40l50.wmfw" +#define CS40L50_WT "cs40l50.bin" + +/* Device */ +#define CS40L50_DEVID 0x0 +#define CS40L50_REVID 0x4 +#define CS40L50_DEVID_A 0x40A50 +#define CS40L50_REVID_B0 0xB0 + +struct cs40l50 { + struct device *dev; + struct regmap *regmap; + struct mutex lock; + struct cs_dsp dsp; + struct gpio_desc *reset_gpio; + struct regmap_irq_chip_data *irq_data; + const struct firmware *fw; + const struct firmware *bin; + struct cs_dsp_wseq wseqs[CS40L50_NUM_WSEQS]; + int irq; + u32 devid; + u32 revid; +}; + +int cs40l50_dsp_write(struct device *dev, struct regmap *regmap, u32 val); +int cs40l50_probe(struct cs40l50 *cs40l50); +int cs40l50_remove(struct cs40l50 *cs40l50); + +extern const struct regmap_config cs40l50_regmap; +extern const struct dev_pm_ops cs40l50_pm_ops; + +#endif /* __MFD_CS40L50_H__ */ From c38fe1bb5d21c2ce0857965ee06174ee587d6b42 Mon Sep 17 00:00:00 2001 From: James Ogletree Date: Thu, 20 Jun 2024 16:17:44 +0000 Subject: [PATCH 37/87] Input: cs40l50 - Add support for the CS40L50 haptic driver Introduce support for Cirrus Logic Device CS40L50: a haptic driver with waveform memory, integrated DSP, and closed-loop algorithms. The input driver provides the interface for control of haptic effects through the device. Signed-off-by: James Ogletree Reviewed-by: Jeff LaBundy Acked-by: Dmitry Torokhov Link: https://lore.kernel.org/r/20240620161745.2312359-5-jogletre@opensource.cirrus.com Signed-off-by: Lee Jones --- MAINTAINERS | 1 + drivers/input/misc/Kconfig | 10 + drivers/input/misc/Makefile | 1 + drivers/input/misc/cs40l50-vibra.c | 555 +++++++++++++++++++++++++++++ 4 files changed, 567 insertions(+) create mode 100644 drivers/input/misc/cs40l50-vibra.c diff --git a/MAINTAINERS b/MAINTAINERS index 5c776ac417b9..2cc63d886e59 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5213,6 +5213,7 @@ M: Ben Bright L: patches@opensource.cirrus.com S: Supported F: Documentation/devicetree/bindings/input/cirrus,cs40l50.yaml +F: drivers/input/misc/cs40l* F: drivers/mfd/cs40l* F: include/linux/mfd/cs40l* diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig index 6ba984d7f0b1..ee45dbb0636e 100644 --- a/drivers/input/misc/Kconfig +++ b/drivers/input/misc/Kconfig @@ -140,6 +140,16 @@ config INPUT_BMA150 To compile this driver as a module, choose M here: the module will be called bma150. +config INPUT_CS40L50_VIBRA + tristate "CS40L50 Haptic Driver support" + depends on MFD_CS40L50_CORE + help + Say Y here to enable support for Cirrus Logic's CS40L50 + haptic driver. + + To compile this driver as a module, choose M here: the + module will be called cs40l50-vibra. + config INPUT_E3X0_BUTTON tristate "NI Ettus Research USRP E3xx Button support." default n diff --git a/drivers/input/misc/Makefile b/drivers/input/misc/Makefile index 04296a4abe8e..88279de6d3d5 100644 --- a/drivers/input/misc/Makefile +++ b/drivers/input/misc/Makefile @@ -28,6 +28,7 @@ obj-$(CONFIG_INPUT_CMA3000) += cma3000_d0x.o obj-$(CONFIG_INPUT_CMA3000_I2C) += cma3000_d0x_i2c.o obj-$(CONFIG_INPUT_COBALT_BTNS) += cobalt_btns.o obj-$(CONFIG_INPUT_CPCAP_PWRBUTTON) += cpcap-pwrbutton.o +obj-$(CONFIG_INPUT_CS40L50_VIBRA) += cs40l50-vibra.o obj-$(CONFIG_INPUT_DA7280_HAPTICS) += da7280.o obj-$(CONFIG_INPUT_DA9052_ONKEY) += da9052_onkey.o obj-$(CONFIG_INPUT_DA9055_ONKEY) += da9055_onkey.o diff --git a/drivers/input/misc/cs40l50-vibra.c b/drivers/input/misc/cs40l50-vibra.c new file mode 100644 index 000000000000..03bdb7c26ec0 --- /dev/null +++ b/drivers/input/misc/cs40l50-vibra.c @@ -0,0 +1,555 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * CS40L50 Advanced Haptic Driver with waveform memory, + * integrated DSP, and closed-loop algorithms + * + * Copyright 2024 Cirrus Logic, Inc. + * + * Author: James Ogletree + */ + +#include +#include +#include +#include +#include + +/* Wavetables */ +#define CS40L50_RAM_INDEX_START 0x1000000 +#define CS40L50_RAM_INDEX_END 0x100007F +#define CS40L50_RTH_INDEX_START 0x1400000 +#define CS40L50_RTH_INDEX_END 0x1400001 +#define CS40L50_ROM_INDEX_START 0x1800000 +#define CS40L50_ROM_INDEX_END 0x180001A +#define CS40L50_TYPE_PCM 8 +#define CS40L50_TYPE_PWLE 12 +#define CS40L50_PCM_ID 0x0 +#define CS40L50_OWT_CUSTOM_DATA_SIZE 2 +#define CS40L50_CUSTOM_DATA_MASK 0xFFFFU + +/* DSP */ +#define CS40L50_GPIO_BASE 0x2804140 +#define CS40L50_OWT_BASE 0x2805C34 +#define CS40L50_OWT_SIZE 0x2805C38 +#define CS40L50_OWT_NEXT 0x2805C3C +#define CS40L50_EFFECTS_MAX 1 + +/* GPIO */ +#define CS40L50_GPIO_NUM_MASK GENMASK(14, 12) +#define CS40L50_GPIO_EDGE_MASK BIT(15) +#define CS40L50_GPIO_MAPPING_NONE 0 +#define CS40L50_GPIO_DISABLE 0x1FF + +enum cs40l50_bank_type { + CS40L50_WVFRM_BANK_RAM, + CS40L50_WVFRM_BANK_ROM, + CS40L50_WVFRM_BANK_OWT, + CS40L50_WVFRM_BANK_NUM, +}; + +/* Describes an area in DSP memory populated by effects */ +struct cs40l50_bank { + enum cs40l50_bank_type type; + u32 base_index; + u32 max_index; +}; + +struct cs40l50_effect { + enum cs40l50_bank_type type; + struct list_head list; + u32 gpio_reg; + u32 index; + int id; +}; + +/* Describes haptic interface of loaded DSP firmware */ +struct cs40l50_vibra_dsp { + struct cs40l50_bank *banks; + u32 gpio_base_reg; + u32 owt_offset_reg; + u32 owt_size_reg; + u32 owt_base_reg; + u32 push_owt_cmd; + u32 delete_owt_cmd; + u32 stop_cmd; + int (*write)(struct device *dev, struct regmap *regmap, u32 val); +}; + +/* Describes configuration and state of haptic operations */ +struct cs40l50_vibra { + struct device *dev; + struct regmap *regmap; + struct input_dev *input; + struct workqueue_struct *vib_wq; + struct list_head effect_head; + struct cs40l50_vibra_dsp dsp; +}; + +struct cs40l50_work { + struct cs40l50_vibra *vib; + struct ff_effect *effect; + struct work_struct work; + s16 *custom_data; + int custom_len; + int count; + int error; +}; + +static struct cs40l50_bank cs40l50_banks[] = { + { + .type = CS40L50_WVFRM_BANK_RAM, + .base_index = CS40L50_RAM_INDEX_START, + .max_index = CS40L50_RAM_INDEX_END, + }, + { + .type = CS40L50_WVFRM_BANK_ROM, + .base_index = CS40L50_ROM_INDEX_START, + .max_index = CS40L50_ROM_INDEX_END, + }, + { + .type = CS40L50_WVFRM_BANK_OWT, + .base_index = CS40L50_RTH_INDEX_START, + .max_index = CS40L50_RTH_INDEX_END, + }, +}; + +static struct cs40l50_vibra_dsp cs40l50_dsp = { + .banks = cs40l50_banks, + .gpio_base_reg = CS40L50_GPIO_BASE, + .owt_base_reg = CS40L50_OWT_BASE, + .owt_offset_reg = CS40L50_OWT_NEXT, + .owt_size_reg = CS40L50_OWT_SIZE, + .push_owt_cmd = CS40L50_OWT_PUSH, + .delete_owt_cmd = CS40L50_OWT_DELETE, + .stop_cmd = CS40L50_STOP_PLAYBACK, + .write = cs40l50_dsp_write, +}; + +static struct cs40l50_effect *cs40l50_find_effect(int id, struct list_head *effect_head) +{ + struct cs40l50_effect *effect; + + list_for_each_entry(effect, effect_head, list) + if (effect->id == id) + return effect; + + return NULL; +} + +static int cs40l50_effect_bank_set(struct cs40l50_work *work_data, + struct cs40l50_effect *effect) +{ + s16 bank_type = work_data->custom_data[0] & CS40L50_CUSTOM_DATA_MASK; + + if (bank_type >= CS40L50_WVFRM_BANK_NUM) { + dev_err(work_data->vib->dev, "Invalid bank (%d)\n", bank_type); + return -EINVAL; + } + + if (work_data->custom_len > CS40L50_OWT_CUSTOM_DATA_SIZE) + effect->type = CS40L50_WVFRM_BANK_OWT; + else + effect->type = bank_type; + + return 0; +} + +static int cs40l50_effect_index_set(struct cs40l50_work *work_data, + struct cs40l50_effect *effect) +{ + struct cs40l50_vibra *vib = work_data->vib; + struct cs40l50_effect *owt_effect; + u32 base_index, max_index; + + base_index = vib->dsp.banks[effect->type].base_index; + max_index = vib->dsp.banks[effect->type].max_index; + + effect->index = base_index; + + switch (effect->type) { + case CS40L50_WVFRM_BANK_OWT: + list_for_each_entry(owt_effect, &vib->effect_head, list) + if (owt_effect->type == CS40L50_WVFRM_BANK_OWT) + effect->index++; + break; + case CS40L50_WVFRM_BANK_ROM: + case CS40L50_WVFRM_BANK_RAM: + effect->index += work_data->custom_data[1] & CS40L50_CUSTOM_DATA_MASK; + break; + default: + dev_err(vib->dev, "Bank type %d not supported\n", effect->type); + return -EINVAL; + } + + if (effect->index > max_index || effect->index < base_index) { + dev_err(vib->dev, "Index out of bounds: %u\n", effect->index); + return -ENOSPC; + } + + return 0; +} + +static int cs40l50_effect_gpio_mapping_set(struct cs40l50_work *work_data, + struct cs40l50_effect *effect) +{ + u16 gpio_edge, gpio_num, button = work_data->effect->trigger.button; + struct cs40l50_vibra *vib = work_data->vib; + + if (button) { + gpio_num = FIELD_GET(CS40L50_GPIO_NUM_MASK, button); + gpio_edge = FIELD_GET(CS40L50_GPIO_EDGE_MASK, button); + effect->gpio_reg = vib->dsp.gpio_base_reg + (gpio_num * 8) - gpio_edge; + + return regmap_write(vib->regmap, effect->gpio_reg, button); + } + + effect->gpio_reg = CS40L50_GPIO_MAPPING_NONE; + + return 0; +} + +struct cs40l50_owt_header { + u32 type; + u32 data_words; + u32 offset; +} __packed; + +static int cs40l50_upload_owt(struct cs40l50_work *work_data) +{ + u8 *new_owt_effect_data __free(kfree) = NULL; + struct cs40l50_vibra *vib = work_data->vib; + size_t len = work_data->custom_len * 2; + struct cs40l50_owt_header header; + u32 offset, size; + int error; + + error = regmap_read(vib->regmap, vib->dsp.owt_size_reg, &size); + if (error) + return error; + + if ((size * sizeof(u32)) < sizeof(header) + len) { + dev_err(vib->dev, "No space in open wavetable for effect\n"); + return -ENOSPC; + } + + header.type = work_data->custom_data[0] == CS40L50_PCM_ID ? CS40L50_TYPE_PCM : + CS40L50_TYPE_PWLE; + header.offset = sizeof(header) / sizeof(u32); + header.data_words = len / sizeof(u32); + + new_owt_effect_data = kmalloc(sizeof(header) + len, GFP_KERNEL); + + memcpy(new_owt_effect_data, &header, sizeof(header)); + memcpy(new_owt_effect_data + sizeof(header), work_data->custom_data, len); + + error = regmap_read(vib->regmap, vib->dsp.owt_offset_reg, &offset); + if (error) + return error; + + error = regmap_bulk_write(vib->regmap, vib->dsp.owt_base_reg + + (offset * sizeof(u32)), new_owt_effect_data, + sizeof(header) + len); + if (error) + return error; + + error = vib->dsp.write(vib->dev, vib->regmap, vib->dsp.push_owt_cmd); + if (error) + return error; + + return 0; +} + +static void cs40l50_add_worker(struct work_struct *work) +{ + struct cs40l50_work *work_data = container_of(work, struct cs40l50_work, work); + struct cs40l50_vibra *vib = work_data->vib; + struct cs40l50_effect *effect; + bool is_new = false; + int error; + + error = pm_runtime_resume_and_get(vib->dev); + if (error) + goto err_exit; + + /* Update effect if already uploaded, otherwise create new effect */ + effect = cs40l50_find_effect(work_data->effect->id, &vib->effect_head); + if (!effect) { + effect = kzalloc(sizeof(*effect), GFP_KERNEL); + if (!effect) { + error = -ENOMEM; + goto err_pm; + } + + effect->id = work_data->effect->id; + is_new = true; + } + + error = cs40l50_effect_bank_set(work_data, effect); + if (error) + goto err_free; + + error = cs40l50_effect_index_set(work_data, effect); + if (error) + goto err_free; + + error = cs40l50_effect_gpio_mapping_set(work_data, effect); + if (error) + goto err_free; + + if (effect->type == CS40L50_WVFRM_BANK_OWT) + error = cs40l50_upload_owt(work_data); +err_free: + if (is_new) { + if (error) + kfree(effect); + else + list_add(&effect->list, &vib->effect_head); + } +err_pm: + pm_runtime_mark_last_busy(vib->dev); + pm_runtime_put_autosuspend(vib->dev); +err_exit: + work_data->error = error; +} + +static int cs40l50_add(struct input_dev *dev, struct ff_effect *effect, + struct ff_effect *old) +{ + struct ff_periodic_effect *periodic = &effect->u.periodic; + struct cs40l50_vibra *vib = input_get_drvdata(dev); + struct cs40l50_work work_data; + + if (effect->type != FF_PERIODIC || periodic->waveform != FF_CUSTOM) { + dev_err(vib->dev, "Type (%#X) or waveform (%#X) unsupported\n", + effect->type, periodic->waveform); + return -EINVAL; + } + + work_data.custom_data = memdup_array_user(effect->u.periodic.custom_data, + effect->u.periodic.custom_len, + sizeof(s16)); + if (IS_ERR(work_data.custom_data)) + return PTR_ERR(work_data.custom_data); + + work_data.custom_len = effect->u.periodic.custom_len; + work_data.vib = vib; + work_data.effect = effect; + INIT_WORK(&work_data.work, cs40l50_add_worker); + + /* Push to the workqueue to serialize with playbacks */ + queue_work(vib->vib_wq, &work_data.work); + flush_work(&work_data.work); + + kfree(work_data.custom_data); + + return work_data.error; +} + +static void cs40l50_start_worker(struct work_struct *work) +{ + struct cs40l50_work *work_data = container_of(work, struct cs40l50_work, work); + struct cs40l50_vibra *vib = work_data->vib; + struct cs40l50_effect *start_effect; + + if (pm_runtime_resume_and_get(vib->dev) < 0) + goto err_free; + + start_effect = cs40l50_find_effect(work_data->effect->id, &vib->effect_head); + if (start_effect) { + while (--work_data->count >= 0) { + vib->dsp.write(vib->dev, vib->regmap, start_effect->index); + usleep_range(work_data->effect->replay.length, + work_data->effect->replay.length + 100); + } + } else { + dev_err(vib->dev, "Effect to play not found\n"); + } + + pm_runtime_mark_last_busy(vib->dev); + pm_runtime_put_autosuspend(vib->dev); +err_free: + kfree(work_data); +} + +static void cs40l50_stop_worker(struct work_struct *work) +{ + struct cs40l50_work *work_data = container_of(work, struct cs40l50_work, work); + struct cs40l50_vibra *vib = work_data->vib; + + if (pm_runtime_resume_and_get(vib->dev) < 0) + return; + + vib->dsp.write(vib->dev, vib->regmap, vib->dsp.stop_cmd); + + pm_runtime_mark_last_busy(vib->dev); + pm_runtime_put_autosuspend(vib->dev); + + kfree(work_data); +} + +static int cs40l50_playback(struct input_dev *dev, int effect_id, int val) +{ + struct cs40l50_vibra *vib = input_get_drvdata(dev); + struct cs40l50_work *work_data; + + work_data = kzalloc(sizeof(*work_data), GFP_ATOMIC); + if (!work_data) + return -ENOMEM; + + work_data->vib = vib; + + if (val > 0) { + work_data->effect = &dev->ff->effects[effect_id]; + work_data->count = val; + INIT_WORK(&work_data->work, cs40l50_start_worker); + } else { + /* Stop the amplifier as device drives only one effect */ + INIT_WORK(&work_data->work, cs40l50_stop_worker); + } + + queue_work(vib->vib_wq, &work_data->work); + + return 0; +} + +static void cs40l50_erase_worker(struct work_struct *work) +{ + struct cs40l50_work *work_data = container_of(work, struct cs40l50_work, work); + struct cs40l50_effect *erase_effect, *owt_effect; + struct cs40l50_vibra *vib = work_data->vib; + int error; + + error = pm_runtime_resume_and_get(vib->dev); + if (error) + goto err_exit; + + erase_effect = cs40l50_find_effect(work_data->effect->id, &vib->effect_head); + if (!erase_effect) { + dev_err(vib->dev, "Effect to erase not found\n"); + error = -EINVAL; + goto err_pm; + } + + if (erase_effect->gpio_reg != CS40L50_GPIO_MAPPING_NONE) { + error = regmap_write(vib->regmap, erase_effect->gpio_reg, + CS40L50_GPIO_DISABLE); + if (error) + goto err_pm; + } + + if (erase_effect->type == CS40L50_WVFRM_BANK_OWT) { + error = vib->dsp.write(vib->dev, vib->regmap, + vib->dsp.delete_owt_cmd | + (erase_effect->index & 0xFF)); + if (error) + goto err_pm; + + list_for_each_entry(owt_effect, &vib->effect_head, list) + if (owt_effect->type == CS40L50_WVFRM_BANK_OWT && + owt_effect->index > erase_effect->index) + owt_effect->index--; + } + + list_del(&erase_effect->list); + kfree(erase_effect); +err_pm: + pm_runtime_mark_last_busy(vib->dev); + pm_runtime_put_autosuspend(vib->dev); +err_exit: + work_data->error = error; +} + +static int cs40l50_erase(struct input_dev *dev, int effect_id) +{ + struct cs40l50_vibra *vib = input_get_drvdata(dev); + struct cs40l50_work work_data; + + work_data.vib = vib; + work_data.effect = &dev->ff->effects[effect_id]; + + INIT_WORK(&work_data.work, cs40l50_erase_worker); + + /* Push to workqueue to serialize with playbacks */ + queue_work(vib->vib_wq, &work_data.work); + flush_work(&work_data.work); + + return work_data.error; +} + +static void cs40l50_remove_wq(void *data) +{ + flush_workqueue(data); + destroy_workqueue(data); +} + +static int cs40l50_vibra_probe(struct platform_device *pdev) +{ + struct cs40l50 *cs40l50 = dev_get_drvdata(pdev->dev.parent); + struct cs40l50_vibra *vib; + int error; + + vib = devm_kzalloc(pdev->dev.parent, sizeof(*vib), GFP_KERNEL); + if (!vib) + return -ENOMEM; + + vib->dev = cs40l50->dev; + vib->regmap = cs40l50->regmap; + vib->dsp = cs40l50_dsp; + + vib->input = devm_input_allocate_device(vib->dev); + if (!vib->input) + return -ENOMEM; + + vib->input->id.product = cs40l50->devid; + vib->input->id.version = cs40l50->revid; + vib->input->name = "cs40l50_vibra"; + + input_set_drvdata(vib->input, vib); + input_set_capability(vib->input, EV_FF, FF_PERIODIC); + input_set_capability(vib->input, EV_FF, FF_CUSTOM); + + error = input_ff_create(vib->input, CS40L50_EFFECTS_MAX); + if (error) { + dev_err(vib->dev, "Failed to create input device\n"); + return error; + } + + vib->input->ff->upload = cs40l50_add; + vib->input->ff->playback = cs40l50_playback; + vib->input->ff->erase = cs40l50_erase; + + INIT_LIST_HEAD(&vib->effect_head); + + vib->vib_wq = alloc_ordered_workqueue("vib_wq", WQ_HIGHPRI); + if (!vib->vib_wq) + return -ENOMEM; + + error = devm_add_action_or_reset(vib->dev, cs40l50_remove_wq, vib->vib_wq); + if (error) + return error; + + error = input_register_device(vib->input); + if (error) + return error; + + return 0; +} + +static const struct platform_device_id cs40l50_vibra_id_match[] = { + { "cs40l50-vibra", }, + {} +}; +MODULE_DEVICE_TABLE(platform, cs40l50_vibra_id_match); + +static struct platform_driver cs40l50_vibra_driver = { + .probe = cs40l50_vibra_probe, + .id_table = cs40l50_vibra_id_match, + .driver = { + .name = "cs40l50-vibra", + }, +}; +module_platform_driver(cs40l50_vibra_driver); + +MODULE_DESCRIPTION("CS40L50 Advanced Haptic Driver"); +MODULE_AUTHOR("James Ogletree, Cirrus Logic Inc. "); +MODULE_LICENSE("GPL"); From c486def5b3ba6c55294cee9abc7396d9dc18f223 Mon Sep 17 00:00:00 2001 From: James Ogletree Date: Thu, 20 Jun 2024 16:17:45 +0000 Subject: [PATCH 38/87] ASoC: cs40l50: Support I2S streaming to CS40L50 Introduce support for Cirrus Logic Device CS40L50: a haptic driver with waveform memory, integrated DSP, and closed-loop algorithms. The ASoC driver enables I2S streaming to the device. Reviewed-by: David Rhodes Signed-off-by: James Ogletree Reviewed-by: Jeff LaBundy Reviewed-by: Ricardo Rivera-Matos Reviewed-by: Mark Brown Link: https://lore.kernel.org/r/20240620161745.2312359-6-jogletre@opensource.cirrus.com Signed-off-by: Lee Jones --- MAINTAINERS | 1 + sound/soc/codecs/Kconfig | 11 ++ sound/soc/codecs/Makefile | 2 + sound/soc/codecs/cs40l50-codec.c | 307 +++++++++++++++++++++++++++++++ 4 files changed, 321 insertions(+) create mode 100644 sound/soc/codecs/cs40l50-codec.c diff --git a/MAINTAINERS b/MAINTAINERS index 2cc63d886e59..5932228347a3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5216,6 +5216,7 @@ F: Documentation/devicetree/bindings/input/cirrus,cs40l50.yaml F: drivers/input/misc/cs40l* F: drivers/mfd/cs40l* F: include/linux/mfd/cs40l* +F: sound/soc/codecs/cs40l* CIRRUS LOGIC DSP FIRMWARE DRIVER M: Simon Trimmer diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 4afc43d3f71f..91b502f8cc3f 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -75,6 +75,7 @@ config SND_SOC_ALL_CODECS imply SND_SOC_CS35L56_I2C imply SND_SOC_CS35L56_SPI imply SND_SOC_CS35L56_SDW + imply SND_SOC_CS40L50 imply SND_SOC_CS42L42 imply SND_SOC_CS42L42_SDW imply SND_SOC_CS42L43 @@ -847,6 +848,16 @@ config SND_SOC_CS35L56_SDW help Enable support for Cirrus Logic CS35L56 boosted amplifier with SoundWire control +config SND_SOC_CS40L50 + tristate "Cirrus Logic CS40L50 CODEC" + depends on MFD_CS40L50_CORE + help + This option enables support for I2S streaming to Cirrus Logic CS40L50. + + CS40L50 is a haptic driver with waveform memory, an integrated + DSP, and closed-loop algorithms. If built as a module, it will be + called snd-soc-cs40l50. + config SND_SOC_CS42L42_CORE tristate diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index b4df22186e25..3afd7c16c959 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -78,6 +78,7 @@ snd-soc-cs35l56-shared-y := cs35l56-shared.o snd-soc-cs35l56-i2c-y := cs35l56-i2c.o snd-soc-cs35l56-spi-y := cs35l56-spi.o snd-soc-cs35l56-sdw-y := cs35l56-sdw.o +snd-soc-cs40l50-objs := cs40l50-codec.o snd-soc-cs42l42-y := cs42l42.o snd-soc-cs42l42-i2c-y := cs42l42-i2c.o snd-soc-cs42l42-sdw-y := cs42l42-sdw.o @@ -475,6 +476,7 @@ obj-$(CONFIG_SND_SOC_CS35L56_SHARED) += snd-soc-cs35l56-shared.o obj-$(CONFIG_SND_SOC_CS35L56_I2C) += snd-soc-cs35l56-i2c.o obj-$(CONFIG_SND_SOC_CS35L56_SPI) += snd-soc-cs35l56-spi.o obj-$(CONFIG_SND_SOC_CS35L56_SDW) += snd-soc-cs35l56-sdw.o +obj-$(CONFIG_SND_SOC_CS40L50) += snd-soc-cs40l50.o obj-$(CONFIG_SND_SOC_CS42L42_CORE) += snd-soc-cs42l42.o obj-$(CONFIG_SND_SOC_CS42L42) += snd-soc-cs42l42-i2c.o obj-$(CONFIG_SND_SOC_CS42L42_SDW) += snd-soc-cs42l42-sdw.o diff --git a/sound/soc/codecs/cs40l50-codec.c b/sound/soc/codecs/cs40l50-codec.c new file mode 100644 index 000000000000..aa629ef53db4 --- /dev/null +++ b/sound/soc/codecs/cs40l50-codec.c @@ -0,0 +1,307 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// CS40L50 Advanced Haptic Driver with waveform memory, +// integrated DSP, and closed-loop algorithms +// +// Copyright 2024 Cirrus Logic, Inc. +// +// Author: James Ogletree + +#include +#include +#include +#include + +#define CS40L50_REFCLK_INPUT 0x2C04 +#define CS40L50_ASP_CONTROL2 0x4808 +#define CS40L50_ASP_DATA_CONTROL5 0x4840 + +/* PLL Config */ +#define CS40L50_PLL_REFCLK_BCLK 0x0 +#define CS40L50_PLL_REFCLK_MCLK 0x5 +#define CS40L50_PLL_REEFCLK_MCLK_CFG 0x00 +#define CS40L50_PLL_REFCLK_LOOP_MASK BIT(11) +#define CS40L50_PLL_REFCLK_OPEN_LOOP 1 +#define CS40L50_PLL_REFCLK_CLOSED_LOOP 0 +#define CS40L50_PLL_REFCLK_LOOP_SHIFT 11 +#define CS40L50_PLL_REFCLK_FREQ_MASK GENMASK(10, 5) +#define CS40L50_PLL_REFCLK_FREQ_SHIFT 5 +#define CS40L50_PLL_REFCLK_SEL_MASK GENMASK(2, 0) +#define CS40L50_BCLK_RATIO_DEFAULT 32 + +/* ASP Config */ +#define CS40L50_ASP_RX_WIDTH_SHIFT 24 +#define CS40L50_ASP_RX_WIDTH_MASK GENMASK(31, 24) +#define CS40L50_ASP_RX_WL_MASK GENMASK(5, 0) +#define CS40L50_ASP_FSYNC_INV_MASK BIT(2) +#define CS40L50_ASP_BCLK_INV_MASK BIT(6) +#define CS40L50_ASP_FMT_MASK GENMASK(10, 8) +#define CS40L50_ASP_FMT_I2S 0x2 + +struct cs40l50_pll_config { + unsigned int freq; + unsigned int cfg; +}; + +struct cs40l50_codec { + struct device *dev; + struct regmap *regmap; + unsigned int daifmt; + unsigned int bclk_ratio; + unsigned int rate; +}; + +static const struct cs40l50_pll_config cs40l50_pll_cfg[] = { + { 32768, 0x00 }, + { 1536000, 0x1B }, + { 3072000, 0x21 }, + { 6144000, 0x28 }, + { 9600000, 0x30 }, + { 12288000, 0x33 }, +}; + +static int cs40l50_get_clk_config(const unsigned int freq, unsigned int *cfg) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(cs40l50_pll_cfg); i++) { + if (cs40l50_pll_cfg[i].freq == freq) { + *cfg = cs40l50_pll_cfg[i].cfg; + return 0; + } + } + + return -EINVAL; +} + +static int cs40l50_swap_ext_clk(struct cs40l50_codec *codec, const unsigned int clk_src) +{ + unsigned int cfg; + int ret; + + switch (clk_src) { + case CS40L50_PLL_REFCLK_BCLK: + ret = cs40l50_get_clk_config(codec->bclk_ratio * codec->rate, &cfg); + if (ret) + return ret; + break; + case CS40L50_PLL_REFCLK_MCLK: + cfg = CS40L50_PLL_REEFCLK_MCLK_CFG; + break; + default: + return -EINVAL; + } + + ret = regmap_update_bits(codec->regmap, CS40L50_REFCLK_INPUT, + CS40L50_PLL_REFCLK_LOOP_MASK, + CS40L50_PLL_REFCLK_OPEN_LOOP << + CS40L50_PLL_REFCLK_LOOP_SHIFT); + if (ret) + return ret; + + ret = regmap_update_bits(codec->regmap, CS40L50_REFCLK_INPUT, + CS40L50_PLL_REFCLK_FREQ_MASK | + CS40L50_PLL_REFCLK_SEL_MASK, + (cfg << CS40L50_PLL_REFCLK_FREQ_SHIFT) | clk_src); + if (ret) + return ret; + + return regmap_update_bits(codec->regmap, CS40L50_REFCLK_INPUT, + CS40L50_PLL_REFCLK_LOOP_MASK, + CS40L50_PLL_REFCLK_CLOSED_LOOP << + CS40L50_PLL_REFCLK_LOOP_SHIFT); +} + +static int cs40l50_clk_en(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) +{ + struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm); + struct cs40l50_codec *codec = snd_soc_component_get_drvdata(comp); + int ret; + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + ret = cs40l50_dsp_write(codec->dev, codec->regmap, CS40L50_STOP_PLAYBACK); + if (ret) + return ret; + + ret = cs40l50_dsp_write(codec->dev, codec->regmap, CS40L50_START_I2S); + if (ret) + return ret; + + ret = cs40l50_swap_ext_clk(codec, CS40L50_PLL_REFCLK_BCLK); + if (ret) + return ret; + break; + case SND_SOC_DAPM_PRE_PMD: + ret = cs40l50_swap_ext_clk(codec, CS40L50_PLL_REFCLK_MCLK); + if (ret) + return ret; + break; + default: + return -EINVAL; + } + + return 0; +} + +static const struct snd_soc_dapm_widget cs40l50_dapm_widgets[] = { + SND_SOC_DAPM_SUPPLY_S("ASP PLL", 0, SND_SOC_NOPM, 0, 0, cs40l50_clk_en, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), + SND_SOC_DAPM_AIF_IN("ASPRX1", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("ASPRX2", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_OUTPUT("OUT"), +}; + +static const struct snd_soc_dapm_route cs40l50_dapm_routes[] = { + { "ASP Playback", NULL, "ASP PLL" }, + { "ASPRX1", NULL, "ASP Playback" }, + { "ASPRX2", NULL, "ASP Playback" }, + + { "OUT", NULL, "ASPRX1" }, + { "OUT", NULL, "ASPRX2" }, +}; + +static int cs40l50_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) +{ + struct cs40l50_codec *codec = snd_soc_component_get_drvdata(codec_dai->component); + + if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBC_CFC) + return -EINVAL; + + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + codec->daifmt = 0; + break; + case SND_SOC_DAIFMT_NB_IF: + codec->daifmt = CS40L50_ASP_FSYNC_INV_MASK; + break; + case SND_SOC_DAIFMT_IB_NF: + codec->daifmt = CS40L50_ASP_BCLK_INV_MASK; + break; + case SND_SOC_DAIFMT_IB_IF: + codec->daifmt = CS40L50_ASP_FSYNC_INV_MASK | CS40L50_ASP_BCLK_INV_MASK; + break; + default: + dev_err(codec->dev, "Invalid clock invert\n"); + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + codec->daifmt |= FIELD_PREP(CS40L50_ASP_FMT_MASK, CS40L50_ASP_FMT_I2S); + break; + default: + dev_err(codec->dev, "Unsupported DAI format\n"); + return -EINVAL; + } + + return 0; +} + +static int cs40l50_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct cs40l50_codec *codec = snd_soc_component_get_drvdata(dai->component); + unsigned int asp_rx_wl = params_width(params); + int ret; + + codec->rate = params_rate(params); + + ret = regmap_update_bits(codec->regmap, CS40L50_ASP_DATA_CONTROL5, + CS40L50_ASP_RX_WL_MASK, asp_rx_wl); + if (ret) + return ret; + + codec->daifmt |= (asp_rx_wl << CS40L50_ASP_RX_WIDTH_SHIFT); + + return regmap_update_bits(codec->regmap, CS40L50_ASP_CONTROL2, + CS40L50_ASP_FSYNC_INV_MASK | + CS40L50_ASP_BCLK_INV_MASK | + CS40L50_ASP_FMT_MASK | + CS40L50_ASP_RX_WIDTH_MASK, codec->daifmt); +} + +static int cs40l50_set_dai_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio) +{ + struct cs40l50_codec *codec = snd_soc_component_get_drvdata(dai->component); + + codec->bclk_ratio = ratio; + + return 0; +} + +static const struct snd_soc_dai_ops cs40l50_dai_ops = { + .set_fmt = cs40l50_set_dai_fmt, + .set_bclk_ratio = cs40l50_set_dai_bclk_ratio, + .hw_params = cs40l50_hw_params, +}; + +static struct snd_soc_dai_driver cs40l50_dai[] = { + { + .name = "cs40l50-pcm", + .id = 0, + .playback = { + .stream_name = "ASP Playback", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, + }, + .ops = &cs40l50_dai_ops, + }, +}; + +static int cs40l50_codec_probe(struct snd_soc_component *component) +{ + struct cs40l50_codec *codec = snd_soc_component_get_drvdata(component); + + codec->bclk_ratio = CS40L50_BCLK_RATIO_DEFAULT; + + return 0; +} + +static const struct snd_soc_component_driver soc_codec_dev_cs40l50 = { + .probe = cs40l50_codec_probe, + .dapm_widgets = cs40l50_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(cs40l50_dapm_widgets), + .dapm_routes = cs40l50_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(cs40l50_dapm_routes), +}; + +static int cs40l50_codec_driver_probe(struct platform_device *pdev) +{ + struct cs40l50 *cs40l50 = dev_get_drvdata(pdev->dev.parent); + struct cs40l50_codec *codec; + + codec = devm_kzalloc(&pdev->dev, sizeof(*codec), GFP_KERNEL); + if (!codec) + return -ENOMEM; + + codec->regmap = cs40l50->regmap; + codec->dev = &pdev->dev; + + return devm_snd_soc_register_component(&pdev->dev, &soc_codec_dev_cs40l50, + cs40l50_dai, ARRAY_SIZE(cs40l50_dai)); +} + +static const struct platform_device_id cs40l50_id[] = { + { "cs40l50-codec", }, + {} +}; +MODULE_DEVICE_TABLE(platform, cs40l50_id); + +static struct platform_driver cs40l50_codec_driver = { + .probe = cs40l50_codec_driver_probe, + .id_table = cs40l50_id, + .driver = { + .name = "cs40l50-codec", + }, +}; +module_platform_driver(cs40l50_codec_driver); + +MODULE_DESCRIPTION("ASoC CS40L50 driver"); +MODULE_AUTHOR("James Ogletree "); +MODULE_LICENSE("GPL"); From c4725350a9f76fbec45cbbfffb20be2e574eb6ef Mon Sep 17 00:00:00 2001 From: Karel Balej Date: Fri, 31 May 2024 19:34:56 +0200 Subject: [PATCH 39/87] dt-bindings: mfd: Add entry for Marvell 88PM886 PMIC Marvell 88PM886 is a PMIC with several subdevices such as onkey, regulators or battery and charger. It comes in at least two revisions, A0 and A1 -- only A1 is described here at the moment. Signed-off-by: Karel Balej Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240531175109.15599-2-balejk@matfyz.cz Signed-off-by: Lee Jones --- .../bindings/mfd/marvell,88pm886-a1.yaml | 76 +++++++++++++++++++ 1 file changed, 76 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/marvell,88pm886-a1.yaml diff --git a/Documentation/devicetree/bindings/mfd/marvell,88pm886-a1.yaml b/Documentation/devicetree/bindings/mfd/marvell,88pm886-a1.yaml new file mode 100644 index 000000000000..d6a71c912b76 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/marvell,88pm886-a1.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/marvell,88pm886-a1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell 88PM886 PMIC core + +maintainers: + - Karel Balej + +description: + Marvell 88PM886 is a PMIC providing several functions such as onkey, + regulators or battery and charger. + +properties: + compatible: + const: marvell,88pm886-a1 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + wakeup-source: true + + regulators: + type: object + additionalProperties: false + patternProperties: + "^(ldo(1[0-6]|[1-9])|buck[1-5])$": + type: object + $ref: /schemas/regulator/regulator.yaml# + description: LDO or buck regulator. + unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + pmic@30 { + compatible = "marvell,88pm886-a1"; + reg = <0x30>; + interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&gic>; + wakeup-source; + + regulators { + ldo2: ldo2 { + regulator-min-microvolt = <3100000>; + regulator-max-microvolt = <3300000>; + }; + + ldo15: ldo15 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + buck2: buck2 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + }; + }; + }; +... From 860f8e3beac0b800bbe20f23c5f3440b1c470b8f Mon Sep 17 00:00:00 2001 From: Karel Balej Date: Fri, 31 May 2024 19:34:57 +0200 Subject: [PATCH 40/87] mfd: Add driver for Marvell 88PM886 PMIC Marvell 88PM886 is a PMIC which provides various functions such as onkey, battery, charger and regulators. It is found for instance in the samsung,coreprimevelte smartphone with which this was tested. Implement basic support to allow for the use of regulators and onkey. Signed-off-by: Karel Balej Link: https://lore.kernel.org/r/20240531175109.15599-3-balejk@matfyz.cz Signed-off-by: Lee Jones --- drivers/mfd/88pm886.c | 148 ++++++++++++++++++++++++++++++++++++ drivers/mfd/Kconfig | 12 +++ drivers/mfd/Makefile | 1 + include/linux/mfd/88pm886.h | 69 +++++++++++++++++ 4 files changed, 230 insertions(+) create mode 100644 drivers/mfd/88pm886.c create mode 100644 include/linux/mfd/88pm886.h diff --git a/drivers/mfd/88pm886.c b/drivers/mfd/88pm886.c new file mode 100644 index 000000000000..dbe9efc027d2 --- /dev/null +++ b/drivers/mfd/88pm886.c @@ -0,0 +1,148 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +static const struct regmap_config pm886_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = PM886_REG_RTC_SPARE6, +}; + +static struct regmap_irq pm886_regmap_irqs[] = { + REGMAP_IRQ_REG(PM886_IRQ_ONKEY, 0, PM886_INT_ENA1_ONKEY), +}; + +static struct regmap_irq_chip pm886_regmap_irq_chip = { + .name = "88pm886", + .irqs = pm886_regmap_irqs, + .num_irqs = ARRAY_SIZE(pm886_regmap_irqs), + .num_regs = 4, + .status_base = PM886_REG_INT_STATUS1, + .ack_base = PM886_REG_INT_STATUS1, + .unmask_base = PM886_REG_INT_ENA_1, +}; + +static struct resource pm886_onkey_resources[] = { + DEFINE_RES_IRQ_NAMED(PM886_IRQ_ONKEY, "88pm886-onkey"), +}; + +static struct mfd_cell pm886_devs[] = { + MFD_CELL_RES("88pm886-onkey", pm886_onkey_resources), + MFD_CELL_NAME("88pm886-regulator"), +}; + +static int pm886_power_off_handler(struct sys_off_data *sys_off_data) +{ + struct pm886_chip *chip = sys_off_data->cb_data; + struct regmap *regmap = chip->regmap; + struct device *dev = &chip->client->dev; + int err; + + err = regmap_update_bits(regmap, PM886_REG_MISC_CONFIG1, PM886_SW_PDOWN, PM886_SW_PDOWN); + if (err) { + dev_err(dev, "Failed to power off the device: %d\n", err); + return NOTIFY_BAD; + } + return NOTIFY_DONE; +} + +static int pm886_setup_irq(struct pm886_chip *chip, + struct regmap_irq_chip_data **irq_data) +{ + struct regmap *regmap = chip->regmap; + struct device *dev = &chip->client->dev; + int err; + + /* Set interrupt clearing mode to clear on write. */ + err = regmap_update_bits(regmap, PM886_REG_MISC_CONFIG2, + PM886_INT_INV | PM886_INT_CLEAR | PM886_INT_MASK_MODE, + PM886_INT_WC); + if (err) { + dev_err(dev, "Failed to set interrupt clearing mode: %d\n", err); + return err; + } + + err = devm_regmap_add_irq_chip(dev, regmap, chip->client->irq, + IRQF_ONESHOT, 0, &pm886_regmap_irq_chip, + irq_data); + if (err) { + dev_err(dev, "Failed to request IRQ: %d\n", err); + return err; + } + + return 0; +} + +static int pm886_probe(struct i2c_client *client) +{ + struct regmap_irq_chip_data *irq_data; + struct device *dev = &client->dev; + struct pm886_chip *chip; + struct regmap *regmap; + unsigned int chip_id; + int err; + + chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); + if (!chip) + return -ENOMEM; + + chip->client = client; + chip->chip_id = (uintptr_t)device_get_match_data(dev); + i2c_set_clientdata(client, chip); + + regmap = devm_regmap_init_i2c(client, &pm886_regmap_config); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "Failed to initialize regmap\n"); + chip->regmap = regmap; + + err = regmap_read(regmap, PM886_REG_ID, &chip_id); + if (err) + return dev_err_probe(dev, err, "Failed to read chip ID\n"); + + if (chip->chip_id != chip_id) + return dev_err_probe(dev, -EINVAL, "Unsupported chip: 0x%x\n", chip_id); + + err = pm886_setup_irq(chip, &irq_data); + if (err) + return err; + + err = devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE, pm886_devs, ARRAY_SIZE(pm886_devs), + NULL, 0, regmap_irq_get_domain(irq_data)); + if (err) + return dev_err_probe(dev, err, "Failed to add devices\n"); + + err = devm_register_power_off_handler(dev, pm886_power_off_handler, chip); + if (err) + return dev_err_probe(dev, err, "Failed to register power off handler\n"); + + device_init_wakeup(dev, device_property_read_bool(dev, "wakeup-source")); + + return 0; +} + +static const struct of_device_id pm886_of_match[] = { + { .compatible = "marvell,88pm886-a1", .data = (void *)PM886_A1_CHIP_ID }, + { } +}; +MODULE_DEVICE_TABLE(of, pm886_of_match); + +static struct i2c_driver pm886_i2c_driver = { + .driver = { + .name = "88pm886", + .of_match_table = pm886_of_match, + }, + .probe = pm886_probe, +}; +module_i2c_driver(pm886_i2c_driver); + +MODULE_DESCRIPTION("Marvell 88PM886 PMIC driver"); +MODULE_AUTHOR("Karel Balej "); +MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 266b4f54af60..96c0019b14c1 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -794,6 +794,18 @@ config MFD_88PM860X select individual components like voltage regulators, RTC and battery-charger under the corresponding menus. +config MFD_88PM886_PMIC + bool "Marvell 88PM886 PMIC" + depends on I2C=y + depends on OF + select REGMAP_I2C + select REGMAP_IRQ + select MFD_CORE + help + This enables support for Marvell 88PM886 Power Management IC. + This includes the I2C driver and the core APIs _only_, you have to + select individual components like onkey under the corresponding menus. + config MFD_MAX14577 tristate "Maxim Semiconductor MAX14577/77836 MUIC + Charger Support" depends on I2C diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index c66f07edcd0e..d016b7fed354 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -7,6 +7,7 @@ obj-$(CONFIG_MFD_88PM860X) += 88pm860x.o obj-$(CONFIG_MFD_88PM800) += 88pm800.o 88pm80x.o obj-$(CONFIG_MFD_88PM805) += 88pm805.o 88pm80x.o +obj-$(CONFIG_MFD_88PM886_PMIC) += 88pm886.o obj-$(CONFIG_MFD_ACT8945A) += act8945a.o obj-$(CONFIG_MFD_SM501) += sm501.o obj-$(CONFIG_ARCH_BCM2835) += bcm2835-pm.o diff --git a/include/linux/mfd/88pm886.h b/include/linux/mfd/88pm886.h new file mode 100644 index 000000000000..133aa302e492 --- /dev/null +++ b/include/linux/mfd/88pm886.h @@ -0,0 +1,69 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef __MFD_88PM886_H +#define __MFD_88PM886_H + +#include +#include + +#define PM886_A1_CHIP_ID 0xa1 + +#define PM886_IRQ_ONKEY 0 + +#define PM886_PAGE_OFFSET_REGULATORS 1 + +#define PM886_REG_ID 0x00 + +#define PM886_REG_STATUS1 0x01 +#define PM886_ONKEY_STS1 BIT(0) + +#define PM886_REG_INT_STATUS1 0x05 + +#define PM886_REG_INT_ENA_1 0x0a +#define PM886_INT_ENA1_ONKEY BIT(0) + +#define PM886_REG_MISC_CONFIG1 0x14 +#define PM886_SW_PDOWN BIT(5) + +#define PM886_REG_MISC_CONFIG2 0x15 +#define PM886_INT_INV BIT(0) +#define PM886_INT_CLEAR BIT(1) +#define PM886_INT_RC 0x00 +#define PM886_INT_WC BIT(1) +#define PM886_INT_MASK_MODE BIT(2) + +#define PM886_REG_RTC_SPARE6 0xef + +#define PM886_REG_BUCK_EN 0x08 +#define PM886_REG_LDO_EN1 0x09 +#define PM886_REG_LDO_EN2 0x0a +#define PM886_REG_LDO1_VOUT 0x20 +#define PM886_REG_LDO2_VOUT 0x26 +#define PM886_REG_LDO3_VOUT 0x2c +#define PM886_REG_LDO4_VOUT 0x32 +#define PM886_REG_LDO5_VOUT 0x38 +#define PM886_REG_LDO6_VOUT 0x3e +#define PM886_REG_LDO7_VOUT 0x44 +#define PM886_REG_LDO8_VOUT 0x4a +#define PM886_REG_LDO9_VOUT 0x50 +#define PM886_REG_LDO10_VOUT 0x56 +#define PM886_REG_LDO11_VOUT 0x5c +#define PM886_REG_LDO12_VOUT 0x62 +#define PM886_REG_LDO13_VOUT 0x68 +#define PM886_REG_LDO14_VOUT 0x6e +#define PM886_REG_LDO15_VOUT 0x74 +#define PM886_REG_LDO16_VOUT 0x7a +#define PM886_REG_BUCK1_VOUT 0xa5 +#define PM886_REG_BUCK2_VOUT 0xb3 +#define PM886_REG_BUCK3_VOUT 0xc1 +#define PM886_REG_BUCK4_VOUT 0xcf +#define PM886_REG_BUCK5_VOUT 0xdd + +#define PM886_LDO_VSEL_MASK 0x0f +#define PM886_BUCK_VSEL_MASK 0x7f + +struct pm886_chip { + struct i2c_client *client; + unsigned int chip_id; + struct regmap *regmap; +}; +#endif /* __MFD_88PM886_H */ From 5d1a5144396e9570efea02d467df0a68fd28db6f Mon Sep 17 00:00:00 2001 From: Karel Balej Date: Fri, 31 May 2024 19:34:58 +0200 Subject: [PATCH 41/87] regulator: Add regulators driver for Marvell 88PM886 PMIC Support the LDO and buck regulators of the Marvell 88PM886 PMIC. Signed-off-by: Karel Balej Reviewed-by: Mark Brown Link: https://lore.kernel.org/r/20240531175109.15599-4-balejk@matfyz.cz Signed-off-by: Lee Jones --- drivers/regulator/88pm886-regulator.c | 392 ++++++++++++++++++++++++++ drivers/regulator/Kconfig | 6 + drivers/regulator/Makefile | 1 + 3 files changed, 399 insertions(+) create mode 100644 drivers/regulator/88pm886-regulator.c diff --git a/drivers/regulator/88pm886-regulator.c b/drivers/regulator/88pm886-regulator.c new file mode 100644 index 000000000000..a38bd4f312b7 --- /dev/null +++ b/drivers/regulator/88pm886-regulator.c @@ -0,0 +1,392 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include +#include +#include +#include +#include + +#include + +static const struct regmap_config pm886_regulator_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = PM886_REG_BUCK5_VOUT, +}; + +static const struct regulator_ops pm886_ldo_ops = { + .list_voltage = regulator_list_voltage_table, + .map_voltage = regulator_map_voltage_iterate, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const struct regulator_ops pm886_buck_ops = { + .list_voltage = regulator_list_voltage_linear_range, + .map_voltage = regulator_map_voltage_linear_range, + .set_voltage_sel = regulator_set_voltage_sel_regmap, + .get_voltage_sel = regulator_get_voltage_sel_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, + .is_enabled = regulator_is_enabled_regmap, +}; + +static const unsigned int pm886_ldo_volt_table1[] = { + 1700000, 1800000, 1900000, 2500000, 2800000, 2900000, 3100000, 3300000, +}; + +static const unsigned int pm886_ldo_volt_table2[] = { + 1200000, 1250000, 1700000, 1800000, 1850000, 1900000, 2500000, 2600000, + 2700000, 2750000, 2800000, 2850000, 2900000, 3000000, 3100000, 3300000, +}; + +static const unsigned int pm886_ldo_volt_table3[] = { + 1700000, 1800000, 1900000, 2000000, 2100000, 2500000, 2700000, 2800000, +}; + +static const struct linear_range pm886_buck_volt_ranges1[] = { + REGULATOR_LINEAR_RANGE(600000, 0, 79, 12500), + REGULATOR_LINEAR_RANGE(1600000, 80, 84, 50000), +}; + +static const struct linear_range pm886_buck_volt_ranges2[] = { + REGULATOR_LINEAR_RANGE(600000, 0, 79, 12500), + REGULATOR_LINEAR_RANGE(1600000, 80, 114, 50000), +}; + +static struct regulator_desc pm886_regulators[] = { + { + .name = "LDO1", + .regulators_node = "regulators", + .of_match = "ldo1", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN1, + .enable_mask = BIT(0), + .volt_table = pm886_ldo_volt_table1, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table1), + .vsel_reg = PM886_REG_LDO1_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO2", + .regulators_node = "regulators", + .of_match = "ldo2", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN1, + .enable_mask = BIT(1), + .volt_table = pm886_ldo_volt_table1, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table1), + .vsel_reg = PM886_REG_LDO2_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO3", + .regulators_node = "regulators", + .of_match = "ldo3", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN1, + .enable_mask = BIT(2), + .volt_table = pm886_ldo_volt_table1, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table1), + .vsel_reg = PM886_REG_LDO3_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO4", + .regulators_node = "regulators", + .of_match = "ldo4", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN1, + .enable_mask = BIT(3), + .volt_table = pm886_ldo_volt_table2, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table2), + .vsel_reg = PM886_REG_LDO4_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO5", + .regulators_node = "regulators", + .of_match = "ldo5", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN1, + .enable_mask = BIT(4), + .volt_table = pm886_ldo_volt_table2, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table2), + .vsel_reg = PM886_REG_LDO5_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO6", + .regulators_node = "regulators", + .of_match = "ldo6", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN1, + .enable_mask = BIT(5), + .volt_table = pm886_ldo_volt_table2, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table2), + .vsel_reg = PM886_REG_LDO6_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO7", + .regulators_node = "regulators", + .of_match = "ldo7", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN1, + .enable_mask = BIT(6), + .volt_table = pm886_ldo_volt_table2, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table2), + .vsel_reg = PM886_REG_LDO7_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO8", + .regulators_node = "regulators", + .of_match = "ldo8", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN1, + .enable_mask = BIT(7), + .volt_table = pm886_ldo_volt_table2, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table2), + .vsel_reg = PM886_REG_LDO8_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO9", + .regulators_node = "regulators", + .of_match = "ldo9", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN2, + .enable_mask = BIT(0), + .volt_table = pm886_ldo_volt_table2, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table2), + .vsel_reg = PM886_REG_LDO9_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO10", + .regulators_node = "regulators", + .of_match = "ldo10", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN2, + .enable_mask = BIT(1), + .volt_table = pm886_ldo_volt_table2, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table2), + .vsel_reg = PM886_REG_LDO10_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO11", + .regulators_node = "regulators", + .of_match = "ldo11", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN2, + .enable_mask = BIT(2), + .volt_table = pm886_ldo_volt_table2, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table2), + .vsel_reg = PM886_REG_LDO11_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO12", + .regulators_node = "regulators", + .of_match = "ldo12", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN2, + .enable_mask = BIT(3), + .volt_table = pm886_ldo_volt_table2, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table2), + .vsel_reg = PM886_REG_LDO12_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO13", + .regulators_node = "regulators", + .of_match = "ldo13", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN2, + .enable_mask = BIT(4), + .volt_table = pm886_ldo_volt_table2, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table2), + .vsel_reg = PM886_REG_LDO13_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO14", + .regulators_node = "regulators", + .of_match = "ldo14", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN2, + .enable_mask = BIT(5), + .volt_table = pm886_ldo_volt_table2, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table2), + .vsel_reg = PM886_REG_LDO14_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO15", + .regulators_node = "regulators", + .of_match = "ldo15", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN2, + .enable_mask = BIT(6), + .volt_table = pm886_ldo_volt_table2, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table2), + .vsel_reg = PM886_REG_LDO15_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "LDO16", + .regulators_node = "regulators", + .of_match = "ldo16", + .ops = &pm886_ldo_ops, + .type = REGULATOR_VOLTAGE, + .enable_reg = PM886_REG_LDO_EN2, + .enable_mask = BIT(7), + .volt_table = pm886_ldo_volt_table3, + .n_voltages = ARRAY_SIZE(pm886_ldo_volt_table3), + .vsel_reg = PM886_REG_LDO16_VOUT, + .vsel_mask = PM886_LDO_VSEL_MASK, + }, + { + .name = "buck1", + .regulators_node = "regulators", + .of_match = "buck1", + .ops = &pm886_buck_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = 85, + .linear_ranges = pm886_buck_volt_ranges1, + .n_linear_ranges = ARRAY_SIZE(pm886_buck_volt_ranges1), + .vsel_reg = PM886_REG_BUCK1_VOUT, + .vsel_mask = PM886_BUCK_VSEL_MASK, + .enable_reg = PM886_REG_BUCK_EN, + .enable_mask = BIT(0), + }, + { + .name = "buck2", + .regulators_node = "regulators", + .of_match = "buck2", + .ops = &pm886_buck_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = 115, + .linear_ranges = pm886_buck_volt_ranges2, + .n_linear_ranges = ARRAY_SIZE(pm886_buck_volt_ranges2), + .vsel_reg = PM886_REG_BUCK2_VOUT, + .vsel_mask = PM886_BUCK_VSEL_MASK, + .enable_reg = PM886_REG_BUCK_EN, + .enable_mask = BIT(1), + }, + { + .name = "buck3", + .regulators_node = "regulators", + .of_match = "buck3", + .ops = &pm886_buck_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = 115, + .linear_ranges = pm886_buck_volt_ranges2, + .n_linear_ranges = ARRAY_SIZE(pm886_buck_volt_ranges2), + .vsel_reg = PM886_REG_BUCK3_VOUT, + .vsel_mask = PM886_BUCK_VSEL_MASK, + .enable_reg = PM886_REG_BUCK_EN, + .enable_mask = BIT(2), + }, + { + .name = "buck4", + .regulators_node = "regulators", + .of_match = "buck4", + .ops = &pm886_buck_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = 115, + .linear_ranges = pm886_buck_volt_ranges2, + .n_linear_ranges = ARRAY_SIZE(pm886_buck_volt_ranges2), + .vsel_reg = PM886_REG_BUCK4_VOUT, + .vsel_mask = PM886_BUCK_VSEL_MASK, + .enable_reg = PM886_REG_BUCK_EN, + .enable_mask = BIT(3), + }, + { + .name = "buck5", + .regulators_node = "regulators", + .of_match = "buck5", + .ops = &pm886_buck_ops, + .type = REGULATOR_VOLTAGE, + .n_voltages = 115, + .linear_ranges = pm886_buck_volt_ranges2, + .n_linear_ranges = ARRAY_SIZE(pm886_buck_volt_ranges2), + .vsel_reg = PM886_REG_BUCK5_VOUT, + .vsel_mask = PM886_BUCK_VSEL_MASK, + .enable_reg = PM886_REG_BUCK_EN, + .enable_mask = BIT(4), + }, +}; + +static int pm886_regulator_probe(struct platform_device *pdev) +{ + struct pm886_chip *chip = dev_get_drvdata(pdev->dev.parent); + struct regulator_config rcfg = { }; + struct device *dev = &pdev->dev; + struct regulator_desc *rdesc; + struct regulator_dev *rdev; + struct i2c_client *page; + struct regmap *regmap; + + page = devm_i2c_new_dummy_device(dev, chip->client->adapter, + chip->client->addr + PM886_PAGE_OFFSET_REGULATORS); + if (IS_ERR(page)) + return dev_err_probe(dev, PTR_ERR(page), + "Failed to initialize regulators client\n"); + + regmap = devm_regmap_init_i2c(page, &pm886_regulator_regmap_config); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), + "Failed to initialize regulators regmap\n"); + rcfg.regmap = regmap; + + rcfg.dev = dev->parent; + + for (int i = 0; i < ARRAY_SIZE(pm886_regulators); i++) { + rdesc = &pm886_regulators[i]; + rdev = devm_regulator_register(dev, rdesc, &rcfg); + if (IS_ERR(rdev)) + return dev_err_probe(dev, PTR_ERR(rdev), + "Failed to register %s\n", rdesc->name); + } + + return 0; +} + +static const struct platform_device_id pm886_regulator_id_table[] = { + { "88pm886-regulator", }, + { } +}; +MODULE_DEVICE_TABLE(platform, pm886_regulator_id_table); + +static struct platform_driver pm886_regulator_driver = { + .driver = { + .name = "88pm886-regulator", + }, + .probe = pm886_regulator_probe, + .id_table = pm886_regulator_id_table, +}; +module_platform_driver(pm886_regulator_driver); + +MODULE_DESCRIPTION("Marvell 88PM886 PMIC regulator driver"); +MODULE_AUTHOR("Karel Balej "); +MODULE_LICENSE("GPL"); diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index d333be2bea3b..ea6f17d451eb 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -91,6 +91,12 @@ config REGULATOR_88PM8607 help This driver supports 88PM8607 voltage regulator chips. +config REGULATOR_88PM886 + tristate "Marvell 88PM886 voltage regulators" + depends on MFD_88PM886_PMIC + help + This driver implements support for Marvell 88PM886 voltage regulators. + config REGULATOR_ACT8865 tristate "Active-semi act8865 voltage regulator" depends on I2C diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index ba15fa5f30ad..0cce5517c85d 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -14,6 +14,7 @@ obj-$(CONFIG_REGULATOR_USERSPACE_CONSUMER) += userspace-consumer.o obj-$(CONFIG_REGULATOR_88PG86X) += 88pg86x.o obj-$(CONFIG_REGULATOR_88PM800) += 88pm800-regulator.o obj-$(CONFIG_REGULATOR_88PM8607) += 88pm8607.o +obj-$(CONFIG_REGULATOR_88PM886) += 88pm886-regulator.o obj-$(CONFIG_REGULATOR_CROS_EC) += cros-ec-regulator.o obj-$(CONFIG_REGULATOR_CPCAP) += cpcap-regulator.o obj-$(CONFIG_REGULATOR_AAT2870) += aat2870-regulator.o From 914089db309ccc590314b6c21df5a1f812e9ab0b Mon Sep 17 00:00:00 2001 From: Karel Balej Date: Fri, 31 May 2024 19:34:59 +0200 Subject: [PATCH 42/87] input: Add onkey driver for Marvell 88PM886 PMIC Marvell 88PM886 PMIC provides onkey among other things. Add client driver to handle it. The driver currently only provides a basic support omitting additional functions found in the vendor version, such as long onkey and GPIO integration. Signed-off-by: Karel Balej Acked-by: Dmitry Torokhov Link: https://lore.kernel.org/r/20240531175109.15599-5-balejk@matfyz.cz Signed-off-by: Lee Jones --- drivers/input/misc/88pm886-onkey.c | 98 ++++++++++++++++++++++++++++++ drivers/input/misc/Kconfig | 7 +++ drivers/input/misc/Makefile | 1 + 3 files changed, 106 insertions(+) create mode 100644 drivers/input/misc/88pm886-onkey.c diff --git a/drivers/input/misc/88pm886-onkey.c b/drivers/input/misc/88pm886-onkey.c new file mode 100644 index 000000000000..284ff5190b6e --- /dev/null +++ b/drivers/input/misc/88pm886-onkey.c @@ -0,0 +1,98 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include +#include +#include +#include +#include + +#include + +struct pm886_onkey { + struct input_dev *idev; + struct pm886_chip *chip; +}; + +static irqreturn_t pm886_onkey_irq_handler(int irq, void *data) +{ + struct pm886_onkey *onkey = data; + struct regmap *regmap = onkey->chip->regmap; + struct input_dev *idev = onkey->idev; + struct device *parent = idev->dev.parent; + unsigned int val; + int err; + + err = regmap_read(regmap, PM886_REG_STATUS1, &val); + if (err) { + dev_err(parent, "Failed to read status: %d\n", err); + return IRQ_NONE; + } + val &= PM886_ONKEY_STS1; + + input_report_key(idev, KEY_POWER, val); + input_sync(idev); + + return IRQ_HANDLED; +} + +static int pm886_onkey_probe(struct platform_device *pdev) +{ + struct pm886_chip *chip = dev_get_drvdata(pdev->dev.parent); + struct device *dev = &pdev->dev; + struct pm886_onkey *onkey; + struct input_dev *idev; + int irq, err; + + onkey = devm_kzalloc(dev, sizeof(*onkey), GFP_KERNEL); + if (!onkey) + return -ENOMEM; + + onkey->chip = chip; + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return dev_err_probe(dev, irq, "Failed to get IRQ\n"); + + idev = devm_input_allocate_device(dev); + if (!idev) { + dev_err(dev, "Failed to allocate input device\n"); + return -ENOMEM; + } + onkey->idev = idev; + + idev->name = "88pm886-onkey"; + idev->phys = "88pm886-onkey/input0"; + idev->id.bustype = BUS_I2C; + + input_set_capability(idev, EV_KEY, KEY_POWER); + + err = devm_request_threaded_irq(dev, irq, NULL, pm886_onkey_irq_handler, + IRQF_ONESHOT | IRQF_NO_SUSPEND, "onkey", + onkey); + if (err) + return dev_err_probe(dev, err, "Failed to request IRQ\n"); + + err = input_register_device(idev); + if (err) + return dev_err_probe(dev, err, "Failed to register input device\n"); + + return 0; +} + +static const struct platform_device_id pm886_onkey_id_table[] = { + { "88pm886-onkey", }, + { } +}; +MODULE_DEVICE_TABLE(platform, pm886_onkey_id_table); + +static struct platform_driver pm886_onkey_driver = { + .driver = { + .name = "88pm886-onkey", + }, + .probe = pm886_onkey_probe, + .id_table = pm886_onkey_id_table, +}; +module_platform_driver(pm886_onkey_driver); + +MODULE_DESCRIPTION("Marvell 88PM886 onkey driver"); +MODULE_AUTHOR("Karel Balej "); +MODULE_LICENSE("GPL"); diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig index 6ba984d7f0b1..16a079d9f0f2 100644 --- a/drivers/input/misc/Kconfig +++ b/drivers/input/misc/Kconfig @@ -33,6 +33,13 @@ config INPUT_88PM80X_ONKEY To compile this driver as a module, choose M here: the module will be called 88pm80x_onkey. +config INPUT_88PM886_ONKEY + tristate "Marvell 88PM886 onkey support" + depends on MFD_88PM886_PMIC + help + Support the onkey of Marvell 88PM886 PMIC as an input device + reporting power button status. + config INPUT_AB8500_PONKEY tristate "AB8500 Pon (PowerOn) Key" depends on AB8500_CORE diff --git a/drivers/input/misc/Makefile b/drivers/input/misc/Makefile index 04296a4abe8e..054a6dc1ac27 100644 --- a/drivers/input/misc/Makefile +++ b/drivers/input/misc/Makefile @@ -7,6 +7,7 @@ obj-$(CONFIG_INPUT_88PM860X_ONKEY) += 88pm860x_onkey.o obj-$(CONFIG_INPUT_88PM80X_ONKEY) += 88pm80x_onkey.o +obj-$(CONFIG_INPUT_88PM886_ONKEY) += 88pm886-onkey.o obj-$(CONFIG_INPUT_AB8500_PONKEY) += ab8500-ponkey.o obj-$(CONFIG_INPUT_AD714X) += ad714x.o obj-$(CONFIG_INPUT_AD714X_I2C) += ad714x-i2c.o From f53d3efa366b1754f0389944401bb53397d22468 Mon Sep 17 00:00:00 2001 From: Karel Balej Date: Fri, 31 May 2024 19:35:00 +0200 Subject: [PATCH 43/87] MAINTAINERS: Add myself for Marvell 88PM886 PMIC Add an entry to MAINTAINERS for the Marvell 88PM886 PMIC MFD, onkey and regulator drivers. Signed-off-by: Karel Balej Link: https://lore.kernel.org/r/20240531175109.15599-6-balejk@matfyz.cz Signed-off-by: Lee Jones --- MAINTAINERS | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index d6c90161c7bf..9d6c940029b8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -13295,6 +13295,15 @@ F: drivers/net/dsa/mv88e6xxx/ F: include/linux/dsa/mv88e6xxx.h F: include/linux/platform_data/mv88e6xxx.h +MARVELL 88PM886 PMIC DRIVER +M: Karel Balej +S: Maintained +F: Documentation/devicetree/bindings/mfd/marvell,88pm886-a1.yaml +F: drivers/input/misc/88pm886-onkey.c +F: drivers/mfd/88pm886.c +F: drivers/regulators/88pm886-regulator.c +F: include/linux/mfd/88pm886.h + MARVELL ARMADA 3700 PHY DRIVERS M: Miquel Raynal S: Maintained From 326ae03d772de6e082d346466671c3b66de2962d Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 7 May 2024 17:53:56 +0100 Subject: [PATCH 44/87] mfd: idt8a340_reg: Start comments with '/*' Several comments in idt8a340_reg.h start with '/**', which denotes the start of a Kernel doc, but are otherwise not Kernel docs. Resolve this conflict by starting these comments with '/*' instead. Flagged by ./scripts/kernel-doc -none Signed-off-by: Simon Horman Link: https://lore.kernel.org/r/20240507-clockmatrix-kernel-doc-v2-1-3138d74192dd@kernel.org Signed-off-by: Lee Jones --- include/linux/mfd/idt8a340_reg.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/include/linux/mfd/idt8a340_reg.h b/include/linux/mfd/idt8a340_reg.h index 0c706085c205..53a222605526 100644 --- a/include/linux/mfd/idt8a340_reg.h +++ b/include/linux/mfd/idt8a340_reg.h @@ -61,7 +61,7 @@ #define HW_Q8_CTRL_SPARE (0xa7d4) #define HW_Q11_CTRL_SPARE (0xa7ec) -/** +/* * Select FOD5 as sync_trigger for Q8 divider. * Transition from logic zero to one * sets trigger to sync Q8 divider. @@ -70,7 +70,7 @@ */ #define Q9_TO_Q8_SYNC_TRIG BIT(1) -/** +/* * Enable FOD5 as driver for clock and sync for Q8 divider. * Enable fanout buffer for FOD5. * @@ -78,7 +78,7 @@ */ #define Q9_TO_Q8_FANOUT_AND_CLOCK_SYNC_ENABLE_MASK (BIT(0) | BIT(2)) -/** +/* * Select FOD6 as sync_trigger for Q11 divider. * Transition from logic zero to one * sets trigger to sync Q11 divider. @@ -87,7 +87,7 @@ */ #define Q10_TO_Q11_SYNC_TRIG BIT(1) -/** +/* * Enable FOD6 as driver for clock and sync for Q11 divider. * Enable fanout buffer for FOD6. * From 22ff67ad8c3b792591b45fa14dc72d400114509b Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 8 May 2024 14:43:21 +0300 Subject: [PATCH 45/87] mfd: omap-usb-host: Remove unused linux/gpio.h linux/gpio.h is deprecated and subject to remove. The driver doesn't use it, simply remove the unused header. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20240508114321.964374-1-andriy.shevchenko@linux.intel.com Signed-off-by: Lee Jones --- drivers/mfd/omap-usb-host.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c index 949feb03d4f8..6de7ba752345 100644 --- a/drivers/mfd/omap-usb-host.c +++ b/drivers/mfd/omap-usb-host.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include #include From 93411db51826197b3e2d1827feded19ba47ebfc9 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 8 May 2024 14:40:33 +0300 Subject: [PATCH 46/87] mfd: menelaus: Remove unused linux/gpio.h linux/gpio.h is deprecated and subject to remove. The driver doesn't use it, simply remove the unused header. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20240508114033.952578-1-andriy.shevchenko@linux.intel.com Signed-off-by: Lee Jones --- drivers/mfd/menelaus.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/mfd/menelaus.c b/drivers/mfd/menelaus.c index 662604ea97f2..787b9c2f3804 100644 --- a/drivers/mfd/menelaus.c +++ b/drivers/mfd/menelaus.c @@ -29,7 +29,6 @@ #include #include #include -#include #include From 5e9ea43c63ffadec2cd906fab169be94ebc9e0a8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 10 May 2024 23:10:11 +0200 Subject: [PATCH 47/87] mfd: Drop explicit initialization of struct i2c_device_id::driver_data to 0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit These drivers don't use the driver_data member of struct i2c_device_id, so don't explicitly initialize this member. This prepares putting driver_data in an anonymous union which requires either no initialization or named designators. But it's also a nice cleanup on its own. While add it, also remove commas after the sentinel entries. Signed-off-by: Uwe Kleine-König Link: https://lore.kernel.org/r/20240510211011.2273978-2-u.kleine-koenig@pengutronix.de Signed-off-by: Lee Jones --- drivers/mfd/88pm800.c | 2 +- drivers/mfd/88pm805.c | 2 +- drivers/mfd/88pm860x-core.c | 2 +- drivers/mfd/aat2870-core.c | 2 +- drivers/mfd/act8945a.c | 2 +- drivers/mfd/as3722.c | 4 ++-- drivers/mfd/axp20x-i2c.c | 24 ++++++++++++------------ drivers/mfd/bd9571mwv.c | 2 +- drivers/mfd/da9055-i2c.c | 2 +- drivers/mfd/lm3533-core.c | 4 ++-- drivers/mfd/lp3943.c | 2 +- drivers/mfd/lp873x.c | 4 ++-- drivers/mfd/lp87565.c | 4 ++-- drivers/mfd/lp8788.c | 2 +- drivers/mfd/max8907.c | 2 +- drivers/mfd/max8925-i2c.c | 4 ++-- drivers/mfd/menelaus.c | 2 +- drivers/mfd/retu-mfd.c | 4 ++-- drivers/mfd/stw481x.c | 4 ++-- drivers/mfd/tps6105x.c | 4 ++-- drivers/mfd/tps6507x.c | 2 +- drivers/mfd/tps65086.c | 2 +- drivers/mfd/tps65090.c | 4 ++-- drivers/mfd/tps6586x.c | 4 ++-- drivers/mfd/tps65912-i2c.c | 2 +- drivers/mfd/twl6040.c | 6 +++--- drivers/mfd/wl1273-core.c | 2 +- drivers/mfd/wm8350-i2c.c | 6 +++--- drivers/mfd/wm8400-core.c | 2 +- 29 files changed, 54 insertions(+), 54 deletions(-) diff --git a/drivers/mfd/88pm800.c b/drivers/mfd/88pm800.c index 300caa067335..384ecf5301d2 100644 --- a/drivers/mfd/88pm800.c +++ b/drivers/mfd/88pm800.c @@ -116,7 +116,7 @@ enum { #define PM800_CHIP_GEN_ID_NUM 0x3 static const struct i2c_device_id pm80x_id_table[] = { - {"88PM800", 0}, + { "88PM800" }, {} /* NULL terminated */ }; MODULE_DEVICE_TABLE(i2c, pm80x_id_table); diff --git a/drivers/mfd/88pm805.c b/drivers/mfd/88pm805.c index 68417c3c4f5a..205f0762a928 100644 --- a/drivers/mfd/88pm805.c +++ b/drivers/mfd/88pm805.c @@ -30,7 +30,7 @@ #include static const struct i2c_device_id pm80x_id_table[] = { - {"88PM805", 0}, + { "88PM805" }, {} /* NULL terminated */ }; MODULE_DEVICE_TABLE(i2c, pm80x_id_table); diff --git a/drivers/mfd/88pm860x-core.c b/drivers/mfd/88pm860x-core.c index 151bf03e772d..7f003f71e1af 100644 --- a/drivers/mfd/88pm860x-core.c +++ b/drivers/mfd/88pm860x-core.c @@ -1233,7 +1233,7 @@ static int pm860x_resume(struct device *dev) static DEFINE_SIMPLE_DEV_PM_OPS(pm860x_pm_ops, pm860x_suspend, pm860x_resume); static const struct i2c_device_id pm860x_id_table[] = { - { "88PM860x", 0 }, + { "88PM860x" }, {} }; MODULE_DEVICE_TABLE(i2c, pm860x_id_table); diff --git a/drivers/mfd/aat2870-core.c b/drivers/mfd/aat2870-core.c index 2fee62f1016c..8ef510e84688 100644 --- a/drivers/mfd/aat2870-core.c +++ b/drivers/mfd/aat2870-core.c @@ -439,7 +439,7 @@ static DEFINE_SIMPLE_DEV_PM_OPS(aat2870_pm_ops, aat2870_i2c_suspend, aat2870_i2c_resume); static const struct i2c_device_id aat2870_i2c_id_table[] = { - { "aat2870", 0 }, + { "aat2870" }, { } }; diff --git a/drivers/mfd/act8945a.c b/drivers/mfd/act8945a.c index 4e32ac3d573e..cafefb4451cb 100644 --- a/drivers/mfd/act8945a.c +++ b/drivers/mfd/act8945a.c @@ -54,7 +54,7 @@ static int act8945a_i2c_probe(struct i2c_client *i2c) } static const struct i2c_device_id act8945a_i2c_id[] = { - { "act8945a", 0 }, + { "act8945a" }, {} }; MODULE_DEVICE_TABLE(i2c, act8945a_i2c_id); diff --git a/drivers/mfd/as3722.c b/drivers/mfd/as3722.c index bec047bdd088..6c0d89b0c7e3 100644 --- a/drivers/mfd/as3722.c +++ b/drivers/mfd/as3722.c @@ -430,8 +430,8 @@ static const struct of_device_id as3722_of_match[] = { MODULE_DEVICE_TABLE(of, as3722_of_match); static const struct i2c_device_id as3722_i2c_id[] = { - { "as3722", 0 }, - {}, + { "as3722" }, + {} }; MODULE_DEVICE_TABLE(i2c, as3722_i2c_id); diff --git a/drivers/mfd/axp20x-i2c.c b/drivers/mfd/axp20x-i2c.c index b8e7ac89f697..791a0b4cb64b 100644 --- a/drivers/mfd/axp20x-i2c.c +++ b/drivers/mfd/axp20x-i2c.c @@ -75,18 +75,18 @@ MODULE_DEVICE_TABLE(of, axp20x_i2c_of_match); #endif static const struct i2c_device_id axp20x_i2c_id[] = { - { "axp152", 0 }, - { "axp192", 0 }, - { "axp202", 0 }, - { "axp209", 0 }, - { "axp221", 0 }, - { "axp223", 0 }, - { "axp313a", 0 }, - { "axp717", 0 }, - { "axp803", 0 }, - { "axp806", 0 }, - { "axp15060", 0 }, - { }, + { "axp152" }, + { "axp192" }, + { "axp202" }, + { "axp209" }, + { "axp221" }, + { "axp223" }, + { "axp313a" }, + { "axp717" }, + { "axp803" }, + { "axp806" }, + { "axp15060" }, + { } }; MODULE_DEVICE_TABLE(i2c, axp20x_i2c_id); diff --git a/drivers/mfd/bd9571mwv.c b/drivers/mfd/bd9571mwv.c index 0a955178d469..e7c2ac74d998 100644 --- a/drivers/mfd/bd9571mwv.c +++ b/drivers/mfd/bd9571mwv.c @@ -268,7 +268,7 @@ static const struct of_device_id bd9571mwv_of_match_table[] = { MODULE_DEVICE_TABLE(of, bd9571mwv_of_match_table); static const struct i2c_device_id bd9571mwv_id_table[] = { - { "bd9571mwv", 0 }, + { "bd9571mwv" }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(i2c, bd9571mwv_id_table); diff --git a/drivers/mfd/da9055-i2c.c b/drivers/mfd/da9055-i2c.c index 9a5f51b60bad..6c1981832aaf 100644 --- a/drivers/mfd/da9055-i2c.c +++ b/drivers/mfd/da9055-i2c.c @@ -54,7 +54,7 @@ static void da9055_i2c_remove(struct i2c_client *i2c) * and CODEC, which must be different to operate together. */ static const struct i2c_device_id da9055_i2c_id[] = { - {"da9055-pmic", 0}, + { "da9055-pmic" }, { } }; MODULE_DEVICE_TABLE(i2c, da9055_i2c_id); diff --git a/drivers/mfd/lm3533-core.c b/drivers/mfd/lm3533-core.c index c211183cecb2..c1219e608c5f 100644 --- a/drivers/mfd/lm3533-core.c +++ b/drivers/mfd/lm3533-core.c @@ -614,8 +614,8 @@ static void lm3533_i2c_remove(struct i2c_client *i2c) } static const struct i2c_device_id lm3533_i2c_ids[] = { - { "lm3533", 0 }, - { }, + { "lm3533" }, + { } }; MODULE_DEVICE_TABLE(i2c, lm3533_i2c_ids); diff --git a/drivers/mfd/lp3943.c b/drivers/mfd/lp3943.c index 7f749a23dca8..6764553147e4 100644 --- a/drivers/mfd/lp3943.c +++ b/drivers/mfd/lp3943.c @@ -126,7 +126,7 @@ static int lp3943_probe(struct i2c_client *cl) } static const struct i2c_device_id lp3943_ids[] = { - { "lp3943", 0 }, + { "lp3943" }, { } }; MODULE_DEVICE_TABLE(i2c, lp3943_ids); diff --git a/drivers/mfd/lp873x.c b/drivers/mfd/lp873x.c index de7ab7aed3c6..e8c5c89c2a76 100644 --- a/drivers/mfd/lp873x.c +++ b/drivers/mfd/lp873x.c @@ -68,8 +68,8 @@ static const struct of_device_id of_lp873x_match_table[] = { MODULE_DEVICE_TABLE(of, of_lp873x_match_table); static const struct i2c_device_id lp873x_id_table[] = { - { "lp873x", 0 }, - { }, + { "lp873x" }, + { } }; MODULE_DEVICE_TABLE(i2c, lp873x_id_table); diff --git a/drivers/mfd/lp87565.c b/drivers/mfd/lp87565.c index 08c62ddfb4f5..9488d3793c10 100644 --- a/drivers/mfd/lp87565.c +++ b/drivers/mfd/lp87565.c @@ -106,8 +106,8 @@ static void lp87565_shutdown(struct i2c_client *client) } static const struct i2c_device_id lp87565_id_table[] = { - { "lp87565-q1", 0 }, - { }, + { "lp87565-q1" }, + { } }; MODULE_DEVICE_TABLE(i2c, lp87565_id_table); diff --git a/drivers/mfd/lp8788.c b/drivers/mfd/lp8788.c index f371eeb042e0..32f255378f5a 100644 --- a/drivers/mfd/lp8788.c +++ b/drivers/mfd/lp8788.c @@ -216,7 +216,7 @@ static void lp8788_remove(struct i2c_client *cl) } static const struct i2c_device_id lp8788_ids[] = { - {"lp8788", 0}, + { "lp8788" }, { } }; MODULE_DEVICE_TABLE(i2c, lp8788_ids); diff --git a/drivers/mfd/max8907.c b/drivers/mfd/max8907.c index accf426234b6..7bac1d651771 100644 --- a/drivers/mfd/max8907.c +++ b/drivers/mfd/max8907.c @@ -300,7 +300,7 @@ MODULE_DEVICE_TABLE(of, max8907_of_match); #endif static const struct i2c_device_id max8907_i2c_id[] = { - {"max8907", 0}, + { "max8907" }, {} }; MODULE_DEVICE_TABLE(i2c, max8907_i2c_id); diff --git a/drivers/mfd/max8925-i2c.c b/drivers/mfd/max8925-i2c.c index 7608000488f9..556aea7ec0a0 100644 --- a/drivers/mfd/max8925-i2c.c +++ b/drivers/mfd/max8925-i2c.c @@ -127,8 +127,8 @@ EXPORT_SYMBOL(max8925_set_bits); static const struct i2c_device_id max8925_id_table[] = { - { "max8925", 0 }, - { }, + { "max8925" }, + { } }; static int max8925_dt_init(struct device_node *np, struct device *dev, diff --git a/drivers/mfd/menelaus.c b/drivers/mfd/menelaus.c index 787b9c2f3804..a125d40fa121 100644 --- a/drivers/mfd/menelaus.c +++ b/drivers/mfd/menelaus.c @@ -1230,7 +1230,7 @@ static void menelaus_remove(struct i2c_client *client) } static const struct i2c_device_id menelaus_id[] = { - { "menelaus", 0 }, + { "menelaus" }, { } }; MODULE_DEVICE_TABLE(i2c, menelaus_id); diff --git a/drivers/mfd/retu-mfd.c b/drivers/mfd/retu-mfd.c index b50cfa7f4b8f..9184e553fafd 100644 --- a/drivers/mfd/retu-mfd.c +++ b/drivers/mfd/retu-mfd.c @@ -300,8 +300,8 @@ static void retu_remove(struct i2c_client *i2c) } static const struct i2c_device_id retu_id[] = { - { "retu", 0 }, - { "tahvo", 0 }, + { "retu" }, + { "tahvo" }, { } }; MODULE_DEVICE_TABLE(i2c, retu_id); diff --git a/drivers/mfd/stw481x.c b/drivers/mfd/stw481x.c index f35c3af680dd..5ed64d53c23d 100644 --- a/drivers/mfd/stw481x.c +++ b/drivers/mfd/stw481x.c @@ -222,8 +222,8 @@ static int stw481x_probe(struct i2c_client *client) * the structure of the I2C core. */ static const struct i2c_device_id stw481x_id[] = { - { "stw481x", 0 }, - { }, + { "stw481x" }, + { } }; MODULE_DEVICE_TABLE(i2c, stw481x_id); diff --git a/drivers/mfd/tps6105x.c b/drivers/mfd/tps6105x.c index 5601f6d0d874..0da1cecb5af6 100644 --- a/drivers/mfd/tps6105x.c +++ b/drivers/mfd/tps6105x.c @@ -191,8 +191,8 @@ static void tps6105x_remove(struct i2c_client *client) } static const struct i2c_device_id tps6105x_id[] = { - { "tps61050", 0 }, - { "tps61052", 0 }, + { "tps61050" }, + { "tps61052" }, { } }; MODULE_DEVICE_TABLE(i2c, tps6105x_id); diff --git a/drivers/mfd/tps6507x.c b/drivers/mfd/tps6507x.c index 95dafb0e9f00..9865512dc7cc 100644 --- a/drivers/mfd/tps6507x.c +++ b/drivers/mfd/tps6507x.c @@ -103,7 +103,7 @@ static int tps6507x_i2c_probe(struct i2c_client *i2c) } static const struct i2c_device_id tps6507x_i2c_id[] = { - { "tps6507x", 0 }, + { "tps6507x" }, { } }; MODULE_DEVICE_TABLE(i2c, tps6507x_i2c_id); diff --git a/drivers/mfd/tps65086.c b/drivers/mfd/tps65086.c index fdce81b33f60..5ef0a7e0d61d 100644 --- a/drivers/mfd/tps65086.c +++ b/drivers/mfd/tps65086.c @@ -127,7 +127,7 @@ static void tps65086_remove(struct i2c_client *client) } static const struct i2c_device_id tps65086_id_table[] = { - { "tps65086", 0 }, + { "tps65086" }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(i2c, tps65086_id_table); diff --git a/drivers/mfd/tps65090.c b/drivers/mfd/tps65090.c index b764badaa62a..b82cd484ac85 100644 --- a/drivers/mfd/tps65090.c +++ b/drivers/mfd/tps65090.c @@ -225,8 +225,8 @@ err_irq_exit: static const struct i2c_device_id tps65090_id_table[] = { - { "tps65090", 0 }, - { }, + { "tps65090" }, + { } }; static struct i2c_driver tps65090_driver = { diff --git a/drivers/mfd/tps6586x.c b/drivers/mfd/tps6586x.c index 03c65bbf2143..82714899efb2 100644 --- a/drivers/mfd/tps6586x.c +++ b/drivers/mfd/tps6586x.c @@ -642,8 +642,8 @@ static SIMPLE_DEV_PM_OPS(tps6586x_pm_ops, tps6586x_i2c_suspend, tps6586x_i2c_resume); static const struct i2c_device_id tps6586x_id_table[] = { - { "tps6586x", 0 }, - { }, + { "tps6586x" }, + { } }; MODULE_DEVICE_TABLE(i2c, tps6586x_id_table); diff --git a/drivers/mfd/tps65912-i2c.c b/drivers/mfd/tps65912-i2c.c index 3c5ac781b6c1..3cc1bc68be7c 100644 --- a/drivers/mfd/tps65912-i2c.c +++ b/drivers/mfd/tps65912-i2c.c @@ -50,7 +50,7 @@ static void tps65912_i2c_remove(struct i2c_client *client) } static const struct i2c_device_id tps65912_i2c_id_table[] = { - { "tps65912", 0 }, + { "tps65912" }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(i2c, tps65912_i2c_id_table); diff --git a/drivers/mfd/twl6040.c b/drivers/mfd/twl6040.c index 9ce34dfd99b3..c184e8bfab7c 100644 --- a/drivers/mfd/twl6040.c +++ b/drivers/mfd/twl6040.c @@ -817,9 +817,9 @@ static void twl6040_remove(struct i2c_client *client) } static const struct i2c_device_id twl6040_i2c_id[] = { - { "twl6040", 0, }, - { "twl6041", 0, }, - { }, + { "twl6040" }, + { "twl6041" }, + { } }; MODULE_DEVICE_TABLE(i2c, twl6040_i2c_id); diff --git a/drivers/mfd/wl1273-core.c b/drivers/mfd/wl1273-core.c index e2a7fccaed01..2f185e93318e 100644 --- a/drivers/mfd/wl1273-core.c +++ b/drivers/mfd/wl1273-core.c @@ -13,7 +13,7 @@ #define DRIVER_DESC "WL1273 FM Radio Core" static const struct i2c_device_id wl1273_driver_id_table[] = { - { WL1273_FM_DRIVER_NAME, 0 }, + { WL1273_FM_DRIVER_NAME }, { } }; MODULE_DEVICE_TABLE(i2c, wl1273_driver_id_table); diff --git a/drivers/mfd/wm8350-i2c.c b/drivers/mfd/wm8350-i2c.c index c2a7d7069975..767c176b12a7 100644 --- a/drivers/mfd/wm8350-i2c.c +++ b/drivers/mfd/wm8350-i2c.c @@ -41,9 +41,9 @@ static int wm8350_i2c_probe(struct i2c_client *i2c) } static const struct i2c_device_id wm8350_i2c_id[] = { - { "wm8350", 0 }, - { "wm8351", 0 }, - { "wm8352", 0 }, + { "wm8350" }, + { "wm8351" }, + { "wm8352" }, { } }; diff --git a/drivers/mfd/wm8400-core.c b/drivers/mfd/wm8400-core.c index ddfb234849dd..8ecfe878a5ba 100644 --- a/drivers/mfd/wm8400-core.c +++ b/drivers/mfd/wm8400-core.c @@ -135,7 +135,7 @@ static int wm8400_i2c_probe(struct i2c_client *i2c) } static const struct i2c_device_id wm8400_i2c_id[] = { - { "wm8400", 0 }, + { "wm8400" }, { } }; From 8aa950491d97d626dff95ef838ed750490d54a30 Mon Sep 17 00:00:00 2001 From: Aradhya Bhatia Date: Sun, 12 May 2024 20:08:24 +0530 Subject: [PATCH 48/87] dt-bindings: mfd: syscon: Add ti,am625-dss-oldi-io-ctrl compatible Add TI DSS OLDI-IO control registers compatible for AM625 DSS. This is a region of 10 32bit registers found in the TI AM625 CTRL_MMR0 register space[0]. They are used to control the characteristics of the OLDI DATA/CLK IO as needed by the OLDI TXes controller node. [0]: https://www.ti.com/lit/pdf/spruiv7 Signed-off-by: Aradhya Bhatia Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240512143824.1862290-1-a-bhatia1@ti.com Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/syscon.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index d331bb260a63..32195e0d6533 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -86,6 +86,7 @@ properties: - rockchip,rv1126-qos - starfive,jh7100-sysmain - ti,am62-usb-phy-ctrl + - ti,am625-dss-oldi-io-ctrl - ti,am62p-cpsw-mac-efuse - ti,am654-dss-oldi-io-ctrl - ti,j784s4-pcie-ctrl From 0577ca9750d4a5038dceb9a470c709cc37f2a51f Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Mon, 27 May 2024 11:39:04 +0200 Subject: [PATCH 49/87] dt-bindings: mfd: mediatek,mt8195-scpsys: Add support for MT8188 Add a compatible string for the scpsys block found in the MediaTek MT8188 SoC. Signed-off-by: AngeloGioacchino Del Regno Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240527093908.97574-2-angelogioacchino.delregno@collabora.com Signed-off-by: Lee Jones --- .../devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml b/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml index c8c4812fffe2..a0d646dfec42 100644 --- a/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml +++ b/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml @@ -22,6 +22,7 @@ properties: - mediatek,mt8173-scpsys - mediatek,mt8183-scpsys - mediatek,mt8186-scpsys + - mediatek,mt8188-scpsys - mediatek,mt8192-scpsys - mediatek,mt8195-scpsys - const: syscon From bd1ae9bbc49de21dd7ad017de7925bf51862f06d Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 18 May 2024 23:11:56 +0200 Subject: [PATCH 50/87] dt-bindings: mfd: mediatek,mt8195-scpsys: Add mediatek,mt8365-scpsys Add a new mediatek,mt8365-scpsys compatible, for the SCPSYS syscon block having power controller. Previously the DTS was re-using SYSCFG compatible, but that does not seem right, because SYSCFG does not have children. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Alexandre Mergnat Reviewed-by: AngeloGioacchino Del Regno Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20240518211159.142920-1-krzysztof.kozlowski@linaro.org Signed-off-by: Lee Jones --- .../devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml b/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml index a0d646dfec42..768390b92682 100644 --- a/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml +++ b/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml @@ -25,6 +25,7 @@ properties: - mediatek,mt8188-scpsys - mediatek,mt8192-scpsys - mediatek,mt8195-scpsys + - mediatek,mt8365-scpsys - const: syscon - const: simple-mfd From ddeeca130059e2cb246e5f996c38fd9c4074f769 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Mon, 27 May 2024 13:49:50 +0200 Subject: [PATCH 51/87] mfd: intel_soc_pmic_crc: Use PWM_LOOKUP_WITH_MODULE() for the PWM lookup The primary use of the CRC PMIC's PWM is for LCD panel backlight control by the i915 driver. Due to its complexity the probe() function of the i915 driver does not support -EPROBE_DEFER handling. So far the pwm-crc driver must be built into the kernel to ensure that the pwm_get() done by the i915 driver succeeds at once (rather then returning -EPROBE_DEFER). But the PWM core can load the module from pwm_get() if a module-name is provided in the pwm_lookup associated with the consumer device. Switch to using PWM_LOOKUP_WITH_MODULE() for the lookup added for the Intel integrated GPU, so that the PWM core can load the module from pwm_get() as needed allowing the pwm-crc driver to be safely built as module. This has been successfully tested on an Asus T100TAM with pwm-crc build as a module. Link: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11081 Signed-off-by: Hans de Goede Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20240527114950.326659-1-hdegoede@redhat.com Signed-off-by: Lee Jones --- drivers/mfd/intel_soc_pmic_crc.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/intel_soc_pmic_crc.c b/drivers/mfd/intel_soc_pmic_crc.c index 581f81cbaa24..876d017f74fe 100644 --- a/drivers/mfd/intel_soc_pmic_crc.c +++ b/drivers/mfd/intel_soc_pmic_crc.c @@ -137,7 +137,9 @@ static const struct regmap_irq_chip crystal_cove_irq_chip = { /* PWM consumed by the Intel GFX */ static struct pwm_lookup crc_pwm_lookup[] = { - PWM_LOOKUP("crystal_cove_pwm", 0, "0000:00:02.0", "pwm_pmic_backlight", 0, PWM_POLARITY_NORMAL), + PWM_LOOKUP_WITH_MODULE("crystal_cove_pwm", 0, "0000:00:02.0", + "pwm_pmic_backlight", 0, PWM_POLARITY_NORMAL, + "pwm-crc"), }; struct crystal_cove_config { From b5f743b122141b14c1b170f3fe749382efa7c867 Mon Sep 17 00:00:00 2001 From: Abel Vesa Date: Mon, 27 May 2024 10:02:03 +0300 Subject: [PATCH 52/87] dt-bindings: mfd: qcom-spmi-pmic: Document SMB2360 PMIC Add bindings for SMB2360 PMIC. This PMIC is found in boards like X1 Elite CRD and QCP. Signed-off-by: Abel Vesa Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240527-smb2360-bindings-mfd-qcom-spmi-pmic-v1-1-31a2c051529c@linaro.org Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml index b7f01cbb8fff..72e4462473ea 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml @@ -95,6 +95,7 @@ properties: - qcom,pmx65 - qcom,pmx75 - qcom,smb2351 + - qcom,smb2360 - const: qcom,spmi-pmic reg: From 555b5fcdb8443dd1fe9e82545f2ec27eedf89f8d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20Wei=C3=9Fschuh?= Date: Tue, 28 May 2024 22:04:12 +0200 Subject: [PATCH 53/87] mfd: cros_ec: Register charge control subdevice MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add ChromeOS EC-based charge control as EC subdevice. Signed-off-by: Thomas Weißschuh Link: https://lore.kernel.org/r/20240528-cros_ec-charge-control-v2-3-81fb27e1cff4@weissschuh.net Signed-off-by: Lee Jones --- drivers/mfd/cros_ec_dev.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/cros_ec_dev.c b/drivers/mfd/cros_ec_dev.c index af698e246657..8929adf33e14 100644 --- a/drivers/mfd/cros_ec_dev.c +++ b/drivers/mfd/cros_ec_dev.c @@ -87,6 +87,7 @@ static const struct mfd_cell cros_ec_sensorhub_cells[] = { }; static const struct mfd_cell cros_usbpd_charger_cells[] = { + { .name = "cros-charge-control", }, { .name = "cros-usbpd-charger", }, { .name = "cros-usbpd-logger", }, }; From 6ca6a63e9639c82d4e3863e0e26bf431a55ee5cb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20Wei=C3=9Fschuh?= Date: Wed, 29 May 2024 08:27:13 +0200 Subject: [PATCH 54/87] mfd: cros_ec: Register hardware monitoring subdevice MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add ChromeOS EC-based hardware monitoring as EC subdevice. Signed-off-by: Thomas Weißschuh Link: https://lore.kernel.org/r/20240529-cros_ec-hwmon-v4-3-5cdf0c5db50a@weissschuh.net Signed-off-by: Lee Jones --- drivers/mfd/cros_ec_dev.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/cros_ec_dev.c b/drivers/mfd/cros_ec_dev.c index 8929adf33e14..e2aae8918679 100644 --- a/drivers/mfd/cros_ec_dev.c +++ b/drivers/mfd/cros_ec_dev.c @@ -149,6 +149,7 @@ static const struct cros_feature_to_cells cros_subdevices[] = { static const struct mfd_cell cros_ec_platform_cells[] = { { .name = "cros-ec-chardev", }, { .name = "cros-ec-debugfs", }, + { .name = "cros-ec-hwmon", }, { .name = "cros-ec-sysfs", }, }; From c879a8c39dd55e7fabdd8d13341f7bc5200db377 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Wed, 29 May 2024 11:48:47 +0200 Subject: [PATCH 55/87] mfd: rsmu: Split core code into separate module Linking a file into two modules can have unintended side-effects and produces a W=1 warning: scripts/Makefile.build:236: drivers/mfd/Makefile: rsmu_core.o is added to multiple modules: rsmu-i2c rsmu-spi Make this one a separate module instead. Fixes: a1867f85e06e ("mfd: Add Renesas Synchronization Management Unit (SMU) support") Signed-off-by: Arnd Bergmann Link: https://lore.kernel.org/r/20240529094856.1869543-1-arnd@kernel.org Signed-off-by: Lee Jones --- drivers/mfd/Makefile | 6 ++---- drivers/mfd/rsmu_core.c | 2 ++ 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index ce38d643009f..02b651cd7535 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -286,7 +286,5 @@ obj-$(CONFIG_MFD_INTEL_M10_BMC_PMCI) += intel-m10-bmc-pmci.o obj-$(CONFIG_MFD_ATC260X) += atc260x-core.o obj-$(CONFIG_MFD_ATC260X_I2C) += atc260x-i2c.o -rsmu-i2c-objs := rsmu_core.o rsmu_i2c.o -rsmu-spi-objs := rsmu_core.o rsmu_spi.o -obj-$(CONFIG_MFD_RSMU_I2C) += rsmu-i2c.o -obj-$(CONFIG_MFD_RSMU_SPI) += rsmu-spi.o +obj-$(CONFIG_MFD_RSMU_I2C) += rsmu_i2c.o rsmu_core.o +obj-$(CONFIG_MFD_RSMU_SPI) += rsmu_spi.o rsmu_core.o diff --git a/drivers/mfd/rsmu_core.c b/drivers/mfd/rsmu_core.c index 29437fd0bd5b..fd04a6e5dfa3 100644 --- a/drivers/mfd/rsmu_core.c +++ b/drivers/mfd/rsmu_core.c @@ -78,11 +78,13 @@ int rsmu_core_init(struct rsmu_ddata *rsmu) return ret; } +EXPORT_SYMBOL_GPL(rsmu_core_init); void rsmu_core_exit(struct rsmu_ddata *rsmu) { mutex_destroy(&rsmu->lock); } +EXPORT_SYMBOL_GPL(rsmu_core_exit); MODULE_DESCRIPTION("Renesas SMU core driver"); MODULE_LICENSE("GPL"); From 5bbd03db27826b562caad1c9b53576a5a78a2bad Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Wed, 29 May 2024 13:17:17 +0200 Subject: [PATCH 56/87] dt-bindings: mfd: qcom,spmi-pmic: Document PMC8380 These are just some more PMICs adjacent to X1 SoCs. Document them. Signed-off-by: Konrad Dybcio Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240529-topic-x1e_pmic-v1-1-9de0506179eb@linaro.org Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml index 72e4462473ea..a2b2fbf77d5c 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml @@ -75,6 +75,7 @@ properties: - qcom,pma8084 - qcom,pmc8180 - qcom,pmc8180c + - qcom,pmc8380 - qcom,pmd9635 - qcom,pmi632 - qcom,pmi8950 From 316b8ab386d1fdcc0f515ece6c4bd5a5f3d9449e Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 30 May 2024 11:34:09 +0200 Subject: [PATCH 57/87] mfd: mt6397-core: Add support for AUXADCs on MT6357/58/59 PMICs Add the relevant AUXADC driver entries to the MFD cells of the MT6357, MT6358, MT6359 PMICs to support their Auxiliary ADCs. Signed-off-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20240530093410.112716-4-angelogioacchino.delregno@collabora.com Signed-off-by: Lee Jones --- drivers/mfd/mt6397-core.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/mfd/mt6397-core.c b/drivers/mfd/mt6397-core.c index 4fd4a2da5ad7..c2939e785818 100644 --- a/drivers/mfd/mt6397-core.c +++ b/drivers/mfd/mt6397-core.c @@ -135,6 +135,9 @@ static const struct mfd_cell mt6323_devs[] = { static const struct mfd_cell mt6357_devs[] = { { + .name = "mt6359-auxadc", + .of_compatible = "mediatek,mt6357-auxadc" + }, { .name = "mt6357-regulator", }, { .name = "mt6357-rtc", @@ -175,6 +178,9 @@ static const struct mfd_cell mt6331_mt6332_devs[] = { static const struct mfd_cell mt6358_devs[] = { { + .name = "mt6359-auxadc", + .of_compatible = "mediatek,mt6358-auxadc" + }, { .name = "mt6358-regulator", .of_compatible = "mediatek,mt6358-regulator" }, { @@ -194,6 +200,10 @@ static const struct mfd_cell mt6358_devs[] = { }; static const struct mfd_cell mt6359_devs[] = { + { + .name = "mt6359-auxadc", + .of_compatible = "mediatek,mt6359-auxadc" + }, { .name = "mt6359-regulator", }, { .name = "mt6359-rtc", From 51e3b257099d10a87de58f1d40fe0b9641bd1f0e Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Thu, 30 May 2024 14:51:47 +0300 Subject: [PATCH 58/87] mfd: core: Make use of device_set_node() Use device_set_node() instead of assigning pdev->dev.of_node directly because it also sets the firmware node. Signed-off-by: Andy Shevchenko Reviewed-by: Herve Codina Link: https://lore.kernel.org/r/20240530115147.1112498-1-andriy.shevchenko@linux.intel.com Signed-off-by: Lee Jones --- drivers/mfd/mfd-core.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/mfd/mfd-core.c b/drivers/mfd/mfd-core.c index 6ad5c93027af..7ea9a875d8f3 100644 --- a/drivers/mfd/mfd-core.c +++ b/drivers/mfd/mfd-core.c @@ -87,7 +87,7 @@ static void mfd_acpi_add_device(const struct mfd_cell *cell, } } - ACPI_COMPANION_SET(&pdev->dev, adev ?: parent); + device_set_node(&pdev->dev, acpi_fwnode_handle(adev ?: parent)); } #else static inline void mfd_acpi_add_device(const struct mfd_cell *cell, @@ -131,8 +131,7 @@ allocate_of_node: of_entry->np = np; list_add_tail(&of_entry->list, &mfd_of_node_list); - pdev->dev.of_node = np; - pdev->dev.fwnode = &np->fwnode; + device_set_node(&pdev->dev, of_fwnode_handle(np)); #endif return 0; } From 9cc3b409beeeb8ffaed8adde43160645686eef41 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Date: Fri, 31 May 2024 17:25:05 +0300 Subject: [PATCH 59/87] mfd: intel-lpss: Rename SPI intel_lpss_platform_info structs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The driver has intel_lpss_platform_info structs for I2C, SPI, and UART. The I2C and UART structs are named with "i2c" and "uart" in the variable name, whereas SPI ones do not mention "spi". Rename the SPI related info structs to include "spi" in their names for consistency and to make it obvious in the device ID list what kind of device the line relates to. Signed-off-by: Ilpo Järvinen Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20240531142505.1888-1-ilpo.jarvinen@linux.intel.com Signed-off-by: Lee Jones --- drivers/mfd/intel-lpss-pci.c | 162 +++++++++++++++++------------------ 1 file changed, 81 insertions(+), 81 deletions(-) diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c index c36a101df7be..1362b3f64ade 100644 --- a/drivers/mfd/intel-lpss-pci.c +++ b/drivers/mfd/intel-lpss-pci.c @@ -103,7 +103,7 @@ static const struct software_node spt_spi_node = { .properties = spt_spi_properties, }; -static const struct intel_lpss_platform_info spt_info = { +static const struct intel_lpss_platform_info spt_spi_info = { .clk_rate = 120000000, .swnode = &spt_spi_node, }; @@ -148,7 +148,7 @@ static const struct software_node bxt_spi_node = { .properties = bxt_spi_properties, }; -static const struct intel_lpss_platform_info bxt_info = { +static const struct intel_lpss_platform_info bxt_spi_info = { .clk_rate = 100000000, .swnode = &bxt_spi_node, }; @@ -216,7 +216,7 @@ static const struct software_node cnl_spi_node = { .properties = cnl_spi_properties, }; -static const struct intel_lpss_platform_info cnl_info = { +static const struct intel_lpss_platform_info cnl_spi_info = { .clk_rate = 120000000, .swnode = &cnl_spi_node, }; @@ -240,7 +240,7 @@ static const struct software_node tgl_spi_node = { .properties = tgl_spi_properties, }; -static const struct intel_lpss_platform_info tgl_info = { +static const struct intel_lpss_platform_info tgl_spi_info = { .clk_rate = 100000000, .swnode = &tgl_spi_node, }; @@ -249,8 +249,8 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { /* CML-LP */ { PCI_VDEVICE(INTEL, 0x02a8), (kernel_ulong_t)&spt_uart_info }, { PCI_VDEVICE(INTEL, 0x02a9), (kernel_ulong_t)&spt_uart_info }, - { PCI_VDEVICE(INTEL, 0x02aa), (kernel_ulong_t)&cnl_info }, - { PCI_VDEVICE(INTEL, 0x02ab), (kernel_ulong_t)&cnl_info }, + { PCI_VDEVICE(INTEL, 0x02aa), (kernel_ulong_t)&cnl_spi_info }, + { PCI_VDEVICE(INTEL, 0x02ab), (kernel_ulong_t)&cnl_spi_info }, { PCI_VDEVICE(INTEL, 0x02c5), (kernel_ulong_t)&cnl_i2c_info }, { PCI_VDEVICE(INTEL, 0x02c6), (kernel_ulong_t)&cnl_i2c_info }, { PCI_VDEVICE(INTEL, 0x02c7), (kernel_ulong_t)&spt_uart_info }, @@ -258,18 +258,18 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { { PCI_VDEVICE(INTEL, 0x02e9), (kernel_ulong_t)&cnl_i2c_info }, { PCI_VDEVICE(INTEL, 0x02ea), (kernel_ulong_t)&cnl_i2c_info }, { PCI_VDEVICE(INTEL, 0x02eb), (kernel_ulong_t)&cnl_i2c_info }, - { PCI_VDEVICE(INTEL, 0x02fb), (kernel_ulong_t)&cnl_info }, + { PCI_VDEVICE(INTEL, 0x02fb), (kernel_ulong_t)&cnl_spi_info }, /* CML-H */ { PCI_VDEVICE(INTEL, 0x06a8), (kernel_ulong_t)&spt_uart_info }, { PCI_VDEVICE(INTEL, 0x06a9), (kernel_ulong_t)&spt_uart_info }, - { PCI_VDEVICE(INTEL, 0x06aa), (kernel_ulong_t)&cnl_info }, - { PCI_VDEVICE(INTEL, 0x06ab), (kernel_ulong_t)&cnl_info }, + { PCI_VDEVICE(INTEL, 0x06aa), (kernel_ulong_t)&cnl_spi_info }, + { PCI_VDEVICE(INTEL, 0x06ab), (kernel_ulong_t)&cnl_spi_info }, { PCI_VDEVICE(INTEL, 0x06c7), (kernel_ulong_t)&spt_uart_info }, { PCI_VDEVICE(INTEL, 0x06e8), (kernel_ulong_t)&cnl_i2c_info }, { PCI_VDEVICE(INTEL, 0x06e9), (kernel_ulong_t)&cnl_i2c_info }, { PCI_VDEVICE(INTEL, 0x06ea), (kernel_ulong_t)&cnl_i2c_info }, { PCI_VDEVICE(INTEL, 0x06eb), (kernel_ulong_t)&cnl_i2c_info }, - { PCI_VDEVICE(INTEL, 0x06fb), (kernel_ulong_t)&cnl_info }, + { PCI_VDEVICE(INTEL, 0x06fb), (kernel_ulong_t)&cnl_spi_info }, /* BXT A-Step */ { PCI_VDEVICE(INTEL, 0x0aac), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x0aae), (kernel_ulong_t)&bxt_i2c_info }, @@ -282,9 +282,9 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { { PCI_VDEVICE(INTEL, 0x0abc), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0x0abe), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0x0ac0), (kernel_ulong_t)&bxt_uart_info }, - { PCI_VDEVICE(INTEL, 0x0ac2), (kernel_ulong_t)&bxt_info }, - { PCI_VDEVICE(INTEL, 0x0ac4), (kernel_ulong_t)&bxt_info }, - { PCI_VDEVICE(INTEL, 0x0ac6), (kernel_ulong_t)&bxt_info }, + { PCI_VDEVICE(INTEL, 0x0ac2), (kernel_ulong_t)&bxt_spi_info }, + { PCI_VDEVICE(INTEL, 0x0ac4), (kernel_ulong_t)&bxt_spi_info }, + { PCI_VDEVICE(INTEL, 0x0ac6), (kernel_ulong_t)&bxt_spi_info }, { PCI_VDEVICE(INTEL, 0x0aee), (kernel_ulong_t)&bxt_uart_info }, /* BXT B-Step */ { PCI_VDEVICE(INTEL, 0x1aac), (kernel_ulong_t)&bxt_i2c_info }, @@ -298,9 +298,9 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { { PCI_VDEVICE(INTEL, 0x1abc), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0x1abe), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0x1ac0), (kernel_ulong_t)&bxt_uart_info }, - { PCI_VDEVICE(INTEL, 0x1ac2), (kernel_ulong_t)&bxt_info }, - { PCI_VDEVICE(INTEL, 0x1ac4), (kernel_ulong_t)&bxt_info }, - { PCI_VDEVICE(INTEL, 0x1ac6), (kernel_ulong_t)&bxt_info }, + { PCI_VDEVICE(INTEL, 0x1ac2), (kernel_ulong_t)&bxt_spi_info }, + { PCI_VDEVICE(INTEL, 0x1ac4), (kernel_ulong_t)&bxt_spi_info }, + { PCI_VDEVICE(INTEL, 0x1ac6), (kernel_ulong_t)&bxt_spi_info }, { PCI_VDEVICE(INTEL, 0x1aee), (kernel_ulong_t)&bxt_uart_info }, /* EBG */ { PCI_VDEVICE(INTEL, 0x1bad), (kernel_ulong_t)&bxt_uart_info }, @@ -317,15 +317,15 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { { PCI_VDEVICE(INTEL, 0x31bc), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0x31be), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0x31c0), (kernel_ulong_t)&bxt_uart_info }, - { PCI_VDEVICE(INTEL, 0x31c2), (kernel_ulong_t)&bxt_info }, - { PCI_VDEVICE(INTEL, 0x31c4), (kernel_ulong_t)&bxt_info }, - { PCI_VDEVICE(INTEL, 0x31c6), (kernel_ulong_t)&bxt_info }, + { PCI_VDEVICE(INTEL, 0x31c2), (kernel_ulong_t)&bxt_spi_info }, + { PCI_VDEVICE(INTEL, 0x31c4), (kernel_ulong_t)&bxt_spi_info }, + { PCI_VDEVICE(INTEL, 0x31c6), (kernel_ulong_t)&bxt_spi_info }, { PCI_VDEVICE(INTEL, 0x31ee), (kernel_ulong_t)&bxt_uart_info }, /* ICL-LP */ { PCI_VDEVICE(INTEL, 0x34a8), (kernel_ulong_t)&spt_uart_info }, { PCI_VDEVICE(INTEL, 0x34a9), (kernel_ulong_t)&spt_uart_info }, - { PCI_VDEVICE(INTEL, 0x34aa), (kernel_ulong_t)&cnl_info }, - { PCI_VDEVICE(INTEL, 0x34ab), (kernel_ulong_t)&cnl_info }, + { PCI_VDEVICE(INTEL, 0x34aa), (kernel_ulong_t)&cnl_spi_info }, + { PCI_VDEVICE(INTEL, 0x34ab), (kernel_ulong_t)&cnl_spi_info }, { PCI_VDEVICE(INTEL, 0x34c5), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x34c6), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x34c7), (kernel_ulong_t)&spt_uart_info }, @@ -333,15 +333,15 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { { PCI_VDEVICE(INTEL, 0x34e9), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x34ea), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x34eb), (kernel_ulong_t)&bxt_i2c_info }, - { PCI_VDEVICE(INTEL, 0x34fb), (kernel_ulong_t)&cnl_info }, + { PCI_VDEVICE(INTEL, 0x34fb), (kernel_ulong_t)&cnl_spi_info }, /* ICL-N */ { PCI_VDEVICE(INTEL, 0x38a8), (kernel_ulong_t)&spt_uart_info }, /* TGL-H */ { PCI_VDEVICE(INTEL, 0x43a7), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0x43a8), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0x43a9), (kernel_ulong_t)&bxt_uart_info }, - { PCI_VDEVICE(INTEL, 0x43aa), (kernel_ulong_t)&tgl_info }, - { PCI_VDEVICE(INTEL, 0x43ab), (kernel_ulong_t)&tgl_info }, + { PCI_VDEVICE(INTEL, 0x43aa), (kernel_ulong_t)&tgl_spi_info }, + { PCI_VDEVICE(INTEL, 0x43ab), (kernel_ulong_t)&tgl_spi_info }, { PCI_VDEVICE(INTEL, 0x43ad), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x43ae), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x43d8), (kernel_ulong_t)&bxt_i2c_info }, @@ -350,14 +350,14 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { { PCI_VDEVICE(INTEL, 0x43e9), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x43ea), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x43eb), (kernel_ulong_t)&bxt_i2c_info }, - { PCI_VDEVICE(INTEL, 0x43fb), (kernel_ulong_t)&tgl_info }, - { PCI_VDEVICE(INTEL, 0x43fd), (kernel_ulong_t)&tgl_info }, + { PCI_VDEVICE(INTEL, 0x43fb), (kernel_ulong_t)&tgl_spi_info }, + { PCI_VDEVICE(INTEL, 0x43fd), (kernel_ulong_t)&tgl_spi_info }, /* EHL */ { PCI_VDEVICE(INTEL, 0x4b28), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0x4b29), (kernel_ulong_t)&bxt_uart_info }, - { PCI_VDEVICE(INTEL, 0x4b2a), (kernel_ulong_t)&bxt_info }, - { PCI_VDEVICE(INTEL, 0x4b2b), (kernel_ulong_t)&bxt_info }, - { PCI_VDEVICE(INTEL, 0x4b37), (kernel_ulong_t)&bxt_info }, + { PCI_VDEVICE(INTEL, 0x4b2a), (kernel_ulong_t)&bxt_spi_info }, + { PCI_VDEVICE(INTEL, 0x4b2b), (kernel_ulong_t)&bxt_spi_info }, + { PCI_VDEVICE(INTEL, 0x4b37), (kernel_ulong_t)&bxt_spi_info }, { PCI_VDEVICE(INTEL, 0x4b44), (kernel_ulong_t)&ehl_i2c_info }, { PCI_VDEVICE(INTEL, 0x4b45), (kernel_ulong_t)&ehl_i2c_info }, { PCI_VDEVICE(INTEL, 0x4b4b), (kernel_ulong_t)&ehl_i2c_info }, @@ -370,8 +370,8 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { /* JSL */ { PCI_VDEVICE(INTEL, 0x4da8), (kernel_ulong_t)&spt_uart_info }, { PCI_VDEVICE(INTEL, 0x4da9), (kernel_ulong_t)&spt_uart_info }, - { PCI_VDEVICE(INTEL, 0x4daa), (kernel_ulong_t)&cnl_info }, - { PCI_VDEVICE(INTEL, 0x4dab), (kernel_ulong_t)&cnl_info }, + { PCI_VDEVICE(INTEL, 0x4daa), (kernel_ulong_t)&cnl_spi_info }, + { PCI_VDEVICE(INTEL, 0x4dab), (kernel_ulong_t)&cnl_spi_info }, { PCI_VDEVICE(INTEL, 0x4dc5), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x4dc6), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x4dc7), (kernel_ulong_t)&spt_uart_info }, @@ -379,12 +379,12 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { { PCI_VDEVICE(INTEL, 0x4de9), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x4dea), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x4deb), (kernel_ulong_t)&bxt_i2c_info }, - { PCI_VDEVICE(INTEL, 0x4dfb), (kernel_ulong_t)&cnl_info }, + { PCI_VDEVICE(INTEL, 0x4dfb), (kernel_ulong_t)&cnl_spi_info }, /* ADL-P */ { PCI_VDEVICE(INTEL, 0x51a8), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0x51a9), (kernel_ulong_t)&bxt_uart_info }, - { PCI_VDEVICE(INTEL, 0x51aa), (kernel_ulong_t)&tgl_info }, - { PCI_VDEVICE(INTEL, 0x51ab), (kernel_ulong_t)&tgl_info }, + { PCI_VDEVICE(INTEL, 0x51aa), (kernel_ulong_t)&tgl_spi_info }, + { PCI_VDEVICE(INTEL, 0x51ab), (kernel_ulong_t)&tgl_spi_info }, { PCI_VDEVICE(INTEL, 0x51c5), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x51c6), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x51c7), (kernel_ulong_t)&bxt_uart_info }, @@ -394,12 +394,12 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { { PCI_VDEVICE(INTEL, 0x51e9), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x51ea), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x51eb), (kernel_ulong_t)&bxt_i2c_info }, - { PCI_VDEVICE(INTEL, 0x51fb), (kernel_ulong_t)&tgl_info }, + { PCI_VDEVICE(INTEL, 0x51fb), (kernel_ulong_t)&tgl_spi_info }, /* ADL-M */ { PCI_VDEVICE(INTEL, 0x54a8), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0x54a9), (kernel_ulong_t)&bxt_uart_info }, - { PCI_VDEVICE(INTEL, 0x54aa), (kernel_ulong_t)&tgl_info }, - { PCI_VDEVICE(INTEL, 0x54ab), (kernel_ulong_t)&tgl_info }, + { PCI_VDEVICE(INTEL, 0x54aa), (kernel_ulong_t)&tgl_spi_info }, + { PCI_VDEVICE(INTEL, 0x54ab), (kernel_ulong_t)&tgl_spi_info }, { PCI_VDEVICE(INTEL, 0x54c5), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x54c6), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x54c7), (kernel_ulong_t)&bxt_uart_info }, @@ -407,7 +407,7 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { { PCI_VDEVICE(INTEL, 0x54e9), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x54ea), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x54eb), (kernel_ulong_t)&bxt_i2c_info }, - { PCI_VDEVICE(INTEL, 0x54fb), (kernel_ulong_t)&tgl_info }, + { PCI_VDEVICE(INTEL, 0x54fb), (kernel_ulong_t)&tgl_spi_info }, /* APL */ { PCI_VDEVICE(INTEL, 0x5aac), (kernel_ulong_t)&apl_i2c_info }, { PCI_VDEVICE(INTEL, 0x5aae), (kernel_ulong_t)&apl_i2c_info }, @@ -420,46 +420,46 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { { PCI_VDEVICE(INTEL, 0x5abc), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0x5abe), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0x5ac0), (kernel_ulong_t)&bxt_uart_info }, - { PCI_VDEVICE(INTEL, 0x5ac2), (kernel_ulong_t)&bxt_info }, - { PCI_VDEVICE(INTEL, 0x5ac4), (kernel_ulong_t)&bxt_info }, - { PCI_VDEVICE(INTEL, 0x5ac6), (kernel_ulong_t)&bxt_info }, + { PCI_VDEVICE(INTEL, 0x5ac2), (kernel_ulong_t)&bxt_spi_info }, + { PCI_VDEVICE(INTEL, 0x5ac4), (kernel_ulong_t)&bxt_spi_info }, + { PCI_VDEVICE(INTEL, 0x5ac6), (kernel_ulong_t)&bxt_spi_info }, { PCI_VDEVICE(INTEL, 0x5aee), (kernel_ulong_t)&bxt_uart_info }, /* RPL-S */ { PCI_VDEVICE(INTEL, 0x7a28), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0x7a29), (kernel_ulong_t)&bxt_uart_info }, - { PCI_VDEVICE(INTEL, 0x7a2a), (kernel_ulong_t)&tgl_info }, - { PCI_VDEVICE(INTEL, 0x7a2b), (kernel_ulong_t)&tgl_info }, + { PCI_VDEVICE(INTEL, 0x7a2a), (kernel_ulong_t)&tgl_spi_info }, + { PCI_VDEVICE(INTEL, 0x7a2b), (kernel_ulong_t)&tgl_spi_info }, { PCI_VDEVICE(INTEL, 0x7a4c), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x7a4d), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x7a4e), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x7a4f), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x7a5c), (kernel_ulong_t)&bxt_uart_info }, - { PCI_VDEVICE(INTEL, 0x7a79), (kernel_ulong_t)&tgl_info }, - { PCI_VDEVICE(INTEL, 0x7a7b), (kernel_ulong_t)&tgl_info }, + { PCI_VDEVICE(INTEL, 0x7a79), (kernel_ulong_t)&tgl_spi_info }, + { PCI_VDEVICE(INTEL, 0x7a7b), (kernel_ulong_t)&tgl_spi_info }, { PCI_VDEVICE(INTEL, 0x7a7c), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x7a7d), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x7a7e), (kernel_ulong_t)&bxt_uart_info }, /* ADL-S */ { PCI_VDEVICE(INTEL, 0x7aa8), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0x7aa9), (kernel_ulong_t)&bxt_uart_info }, - { PCI_VDEVICE(INTEL, 0x7aaa), (kernel_ulong_t)&tgl_info }, - { PCI_VDEVICE(INTEL, 0x7aab), (kernel_ulong_t)&tgl_info }, + { PCI_VDEVICE(INTEL, 0x7aaa), (kernel_ulong_t)&tgl_spi_info }, + { PCI_VDEVICE(INTEL, 0x7aab), (kernel_ulong_t)&tgl_spi_info }, { PCI_VDEVICE(INTEL, 0x7acc), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x7acd), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x7ace), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x7acf), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x7adc), (kernel_ulong_t)&bxt_uart_info }, - { PCI_VDEVICE(INTEL, 0x7af9), (kernel_ulong_t)&tgl_info }, - { PCI_VDEVICE(INTEL, 0x7afb), (kernel_ulong_t)&tgl_info }, + { PCI_VDEVICE(INTEL, 0x7af9), (kernel_ulong_t)&tgl_spi_info }, + { PCI_VDEVICE(INTEL, 0x7afb), (kernel_ulong_t)&tgl_spi_info }, { PCI_VDEVICE(INTEL, 0x7afc), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x7afd), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x7afe), (kernel_ulong_t)&bxt_uart_info }, /* MTL-P */ { PCI_VDEVICE(INTEL, 0x7e25), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0x7e26), (kernel_ulong_t)&bxt_uart_info }, - { PCI_VDEVICE(INTEL, 0x7e27), (kernel_ulong_t)&tgl_info }, - { PCI_VDEVICE(INTEL, 0x7e30), (kernel_ulong_t)&tgl_info }, - { PCI_VDEVICE(INTEL, 0x7e46), (kernel_ulong_t)&tgl_info }, + { PCI_VDEVICE(INTEL, 0x7e27), (kernel_ulong_t)&tgl_spi_info }, + { PCI_VDEVICE(INTEL, 0x7e30), (kernel_ulong_t)&tgl_spi_info }, + { PCI_VDEVICE(INTEL, 0x7e46), (kernel_ulong_t)&tgl_spi_info }, { PCI_VDEVICE(INTEL, 0x7e50), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x7e51), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x7e52), (kernel_ulong_t)&bxt_uart_info }, @@ -470,22 +470,22 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { /* MTP-S */ { PCI_VDEVICE(INTEL, 0x7f28), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0x7f29), (kernel_ulong_t)&bxt_uart_info }, - { PCI_VDEVICE(INTEL, 0x7f2a), (kernel_ulong_t)&tgl_info }, - { PCI_VDEVICE(INTEL, 0x7f2b), (kernel_ulong_t)&tgl_info }, + { PCI_VDEVICE(INTEL, 0x7f2a), (kernel_ulong_t)&tgl_spi_info }, + { PCI_VDEVICE(INTEL, 0x7f2b), (kernel_ulong_t)&tgl_spi_info }, { PCI_VDEVICE(INTEL, 0x7f4c), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x7f4d), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x7f4e), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x7f4f), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x7f5c), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0x7f5d), (kernel_ulong_t)&bxt_uart_info }, - { PCI_VDEVICE(INTEL, 0x7f5e), (kernel_ulong_t)&tgl_info }, - { PCI_VDEVICE(INTEL, 0x7f5f), (kernel_ulong_t)&tgl_info }, + { PCI_VDEVICE(INTEL, 0x7f5e), (kernel_ulong_t)&tgl_spi_info }, + { PCI_VDEVICE(INTEL, 0x7f5f), (kernel_ulong_t)&tgl_spi_info }, { PCI_VDEVICE(INTEL, 0x7f7a), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x7f7b), (kernel_ulong_t)&bxt_i2c_info }, /* LKF */ { PCI_VDEVICE(INTEL, 0x98a8), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0x98a9), (kernel_ulong_t)&bxt_uart_info }, - { PCI_VDEVICE(INTEL, 0x98aa), (kernel_ulong_t)&bxt_info }, + { PCI_VDEVICE(INTEL, 0x98aa), (kernel_ulong_t)&bxt_spi_info }, { PCI_VDEVICE(INTEL, 0x98c5), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x98c6), (kernel_ulong_t)&bxt_i2c_info }, { PCI_VDEVICE(INTEL, 0x98c7), (kernel_ulong_t)&bxt_uart_info }, @@ -496,8 +496,8 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { /* SPT-LP */ { PCI_VDEVICE(INTEL, 0x9d27), (kernel_ulong_t)&spt_uart_info }, { PCI_VDEVICE(INTEL, 0x9d28), (kernel_ulong_t)&spt_uart_info }, - { PCI_VDEVICE(INTEL, 0x9d29), (kernel_ulong_t)&spt_info }, - { PCI_VDEVICE(INTEL, 0x9d2a), (kernel_ulong_t)&spt_info }, + { PCI_VDEVICE(INTEL, 0x9d29), (kernel_ulong_t)&spt_spi_info }, + { PCI_VDEVICE(INTEL, 0x9d2a), (kernel_ulong_t)&spt_spi_info }, { PCI_VDEVICE(INTEL, 0x9d60), (kernel_ulong_t)&spt_i2c_info }, { PCI_VDEVICE(INTEL, 0x9d61), (kernel_ulong_t)&spt_i2c_info }, { PCI_VDEVICE(INTEL, 0x9d62), (kernel_ulong_t)&spt_i2c_info }, @@ -508,8 +508,8 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { /* CNL-LP */ { PCI_VDEVICE(INTEL, 0x9da8), (kernel_ulong_t)&spt_uart_info }, { PCI_VDEVICE(INTEL, 0x9da9), (kernel_ulong_t)&spt_uart_info }, - { PCI_VDEVICE(INTEL, 0x9daa), (kernel_ulong_t)&cnl_info }, - { PCI_VDEVICE(INTEL, 0x9dab), (kernel_ulong_t)&cnl_info }, + { PCI_VDEVICE(INTEL, 0x9daa), (kernel_ulong_t)&cnl_spi_info }, + { PCI_VDEVICE(INTEL, 0x9dab), (kernel_ulong_t)&cnl_spi_info }, { PCI_VDEVICE(INTEL, 0x9dc5), (kernel_ulong_t)&cnl_i2c_info }, { PCI_VDEVICE(INTEL, 0x9dc6), (kernel_ulong_t)&cnl_i2c_info }, { PCI_VDEVICE(INTEL, 0x9dc7), (kernel_ulong_t)&spt_uart_info }, @@ -517,12 +517,12 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { { PCI_VDEVICE(INTEL, 0x9de9), (kernel_ulong_t)&cnl_i2c_info }, { PCI_VDEVICE(INTEL, 0x9dea), (kernel_ulong_t)&cnl_i2c_info }, { PCI_VDEVICE(INTEL, 0x9deb), (kernel_ulong_t)&cnl_i2c_info }, - { PCI_VDEVICE(INTEL, 0x9dfb), (kernel_ulong_t)&cnl_info }, + { PCI_VDEVICE(INTEL, 0x9dfb), (kernel_ulong_t)&cnl_spi_info }, /* TGL-LP */ { PCI_VDEVICE(INTEL, 0xa0a8), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0xa0a9), (kernel_ulong_t)&bxt_uart_info }, - { PCI_VDEVICE(INTEL, 0xa0aa), (kernel_ulong_t)&cnl_info }, - { PCI_VDEVICE(INTEL, 0xa0ab), (kernel_ulong_t)&cnl_info }, + { PCI_VDEVICE(INTEL, 0xa0aa), (kernel_ulong_t)&cnl_spi_info }, + { PCI_VDEVICE(INTEL, 0xa0ab), (kernel_ulong_t)&cnl_spi_info }, { PCI_VDEVICE(INTEL, 0xa0c5), (kernel_ulong_t)&spt_i2c_info }, { PCI_VDEVICE(INTEL, 0xa0c6), (kernel_ulong_t)&spt_i2c_info }, { PCI_VDEVICE(INTEL, 0xa0c7), (kernel_ulong_t)&bxt_uart_info }, @@ -532,20 +532,20 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { { PCI_VDEVICE(INTEL, 0xa0db), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0xa0dc), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0xa0dd), (kernel_ulong_t)&bxt_uart_info }, - { PCI_VDEVICE(INTEL, 0xa0de), (kernel_ulong_t)&cnl_info }, - { PCI_VDEVICE(INTEL, 0xa0df), (kernel_ulong_t)&cnl_info }, + { PCI_VDEVICE(INTEL, 0xa0de), (kernel_ulong_t)&cnl_spi_info }, + { PCI_VDEVICE(INTEL, 0xa0df), (kernel_ulong_t)&cnl_spi_info }, { PCI_VDEVICE(INTEL, 0xa0e8), (kernel_ulong_t)&spt_i2c_info }, { PCI_VDEVICE(INTEL, 0xa0e9), (kernel_ulong_t)&spt_i2c_info }, { PCI_VDEVICE(INTEL, 0xa0ea), (kernel_ulong_t)&spt_i2c_info }, { PCI_VDEVICE(INTEL, 0xa0eb), (kernel_ulong_t)&spt_i2c_info }, - { PCI_VDEVICE(INTEL, 0xa0fb), (kernel_ulong_t)&cnl_info }, - { PCI_VDEVICE(INTEL, 0xa0fd), (kernel_ulong_t)&cnl_info }, - { PCI_VDEVICE(INTEL, 0xa0fe), (kernel_ulong_t)&cnl_info }, + { PCI_VDEVICE(INTEL, 0xa0fb), (kernel_ulong_t)&cnl_spi_info }, + { PCI_VDEVICE(INTEL, 0xa0fd), (kernel_ulong_t)&cnl_spi_info }, + { PCI_VDEVICE(INTEL, 0xa0fe), (kernel_ulong_t)&cnl_spi_info }, /* SPT-H */ { PCI_VDEVICE(INTEL, 0xa127), (kernel_ulong_t)&spt_uart_info }, { PCI_VDEVICE(INTEL, 0xa128), (kernel_ulong_t)&spt_uart_info }, - { PCI_VDEVICE(INTEL, 0xa129), (kernel_ulong_t)&spt_info }, - { PCI_VDEVICE(INTEL, 0xa12a), (kernel_ulong_t)&spt_info }, + { PCI_VDEVICE(INTEL, 0xa129), (kernel_ulong_t)&spt_spi_info }, + { PCI_VDEVICE(INTEL, 0xa12a), (kernel_ulong_t)&spt_spi_info }, { PCI_VDEVICE(INTEL, 0xa160), (kernel_ulong_t)&spt_i2c_info }, { PCI_VDEVICE(INTEL, 0xa161), (kernel_ulong_t)&spt_i2c_info }, { PCI_VDEVICE(INTEL, 0xa162), (kernel_ulong_t)&spt_i2c_info }, @@ -553,8 +553,8 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { /* KBL-H */ { PCI_VDEVICE(INTEL, 0xa2a7), (kernel_ulong_t)&spt_uart_info }, { PCI_VDEVICE(INTEL, 0xa2a8), (kernel_ulong_t)&spt_uart_info }, - { PCI_VDEVICE(INTEL, 0xa2a9), (kernel_ulong_t)&spt_info }, - { PCI_VDEVICE(INTEL, 0xa2aa), (kernel_ulong_t)&spt_info }, + { PCI_VDEVICE(INTEL, 0xa2a9), (kernel_ulong_t)&spt_spi_info }, + { PCI_VDEVICE(INTEL, 0xa2aa), (kernel_ulong_t)&spt_spi_info }, { PCI_VDEVICE(INTEL, 0xa2e0), (kernel_ulong_t)&spt_i2c_info }, { PCI_VDEVICE(INTEL, 0xa2e1), (kernel_ulong_t)&spt_i2c_info }, { PCI_VDEVICE(INTEL, 0xa2e2), (kernel_ulong_t)&spt_i2c_info }, @@ -563,19 +563,19 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { /* CNL-H */ { PCI_VDEVICE(INTEL, 0xa328), (kernel_ulong_t)&spt_uart_info }, { PCI_VDEVICE(INTEL, 0xa329), (kernel_ulong_t)&spt_uart_info }, - { PCI_VDEVICE(INTEL, 0xa32a), (kernel_ulong_t)&cnl_info }, - { PCI_VDEVICE(INTEL, 0xa32b), (kernel_ulong_t)&cnl_info }, + { PCI_VDEVICE(INTEL, 0xa32a), (kernel_ulong_t)&cnl_spi_info }, + { PCI_VDEVICE(INTEL, 0xa32b), (kernel_ulong_t)&cnl_spi_info }, { PCI_VDEVICE(INTEL, 0xa347), (kernel_ulong_t)&spt_uart_info }, { PCI_VDEVICE(INTEL, 0xa368), (kernel_ulong_t)&cnl_i2c_info }, { PCI_VDEVICE(INTEL, 0xa369), (kernel_ulong_t)&cnl_i2c_info }, { PCI_VDEVICE(INTEL, 0xa36a), (kernel_ulong_t)&cnl_i2c_info }, { PCI_VDEVICE(INTEL, 0xa36b), (kernel_ulong_t)&cnl_i2c_info }, - { PCI_VDEVICE(INTEL, 0xa37b), (kernel_ulong_t)&cnl_info }, + { PCI_VDEVICE(INTEL, 0xa37b), (kernel_ulong_t)&cnl_spi_info }, /* CML-V */ { PCI_VDEVICE(INTEL, 0xa3a7), (kernel_ulong_t)&spt_uart_info }, { PCI_VDEVICE(INTEL, 0xa3a8), (kernel_ulong_t)&spt_uart_info }, - { PCI_VDEVICE(INTEL, 0xa3a9), (kernel_ulong_t)&spt_info }, - { PCI_VDEVICE(INTEL, 0xa3aa), (kernel_ulong_t)&spt_info }, + { PCI_VDEVICE(INTEL, 0xa3a9), (kernel_ulong_t)&spt_spi_info }, + { PCI_VDEVICE(INTEL, 0xa3aa), (kernel_ulong_t)&spt_spi_info }, { PCI_VDEVICE(INTEL, 0xa3e0), (kernel_ulong_t)&spt_i2c_info }, { PCI_VDEVICE(INTEL, 0xa3e1), (kernel_ulong_t)&spt_i2c_info }, { PCI_VDEVICE(INTEL, 0xa3e2), (kernel_ulong_t)&spt_i2c_info }, @@ -584,9 +584,9 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { /* LNL-M */ { PCI_VDEVICE(INTEL, 0xa825), (kernel_ulong_t)&bxt_uart_info }, { PCI_VDEVICE(INTEL, 0xa826), (kernel_ulong_t)&bxt_uart_info }, - { PCI_VDEVICE(INTEL, 0xa827), (kernel_ulong_t)&tgl_info }, - { PCI_VDEVICE(INTEL, 0xa830), (kernel_ulong_t)&tgl_info }, - { PCI_VDEVICE(INTEL, 0xa846), (kernel_ulong_t)&tgl_info }, + { PCI_VDEVICE(INTEL, 0xa827), (kernel_ulong_t)&tgl_spi_info }, + { PCI_VDEVICE(INTEL, 0xa830), (kernel_ulong_t)&tgl_spi_info }, + { PCI_VDEVICE(INTEL, 0xa846), (kernel_ulong_t)&tgl_spi_info }, { PCI_VDEVICE(INTEL, 0xa850), (kernel_ulong_t)&ehl_i2c_info }, { PCI_VDEVICE(INTEL, 0xa851), (kernel_ulong_t)&ehl_i2c_info }, { PCI_VDEVICE(INTEL, 0xa852), (kernel_ulong_t)&bxt_uart_info }, From 4c4ade1aba55ca90b49c59dd229a952b1610775b Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 3 Jun 2024 08:12:27 -0500 Subject: [PATCH 60/87] dt-bindings: mfd: syscon: Add more simple compatibles Add another batch of various "simple" syscon compatibles which were undocumented or still documented with old text bindings. Remove the old text binding docs for the ones which were documented. Acked-by: Conor Dooley Reviewed-by: AngeloGioacchino Del Regno Acked-by: Stephen Boyd Acked-by: Krzysztof Kozlowski Reviewed-by: Miquel Raynal # mtd Signed-off-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20240603131230.136196-2-robh@kernel.org Signed-off-by: Lee Jones --- .../bindings/arm/amlogic/analog-top.txt | 20 ------------- .../bindings/arm/amlogic/assist.txt | 17 ----------- .../bindings/arm/amlogic/bootrom.txt | 17 ----------- .../devicetree/bindings/arm/amlogic/pmu.txt | 18 ------------ .../devicetree/bindings/arm/atmel-sysregs.txt | 29 ------------------- .../devicetree/bindings/arm/axis.txt | 16 ---------- .../arm/cpu-enable-method/al,alpine-smp | 10 ------- .../arm/freescale/fsl,vf610-mscm-cpucfg.txt | 14 --------- .../bindings/arm/marvell/marvell,dove.txt | 15 ---------- .../devicetree/bindings/arm/spear-misc.txt | 9 ------ .../bindings/clock/ti-keystone-pllctrl.txt | 20 ------------- .../devicetree/bindings/mfd/syscon.yaml | 29 +++++++++++++++++++ .../devicetree/bindings/mips/mscc.txt | 17 ----------- .../devicetree/bindings/mtd/atmel-nand.txt | 9 ------ .../bindings/net/hisilicon-hip04-net.txt | 10 ------- 15 files changed, 29 insertions(+), 221 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/amlogic/analog-top.txt delete mode 100644 Documentation/devicetree/bindings/arm/amlogic/assist.txt delete mode 100644 Documentation/devicetree/bindings/arm/amlogic/bootrom.txt delete mode 100644 Documentation/devicetree/bindings/arm/amlogic/pmu.txt delete mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,vf610-mscm-cpucfg.txt delete mode 100644 Documentation/devicetree/bindings/arm/spear-misc.txt delete mode 100644 Documentation/devicetree/bindings/clock/ti-keystone-pllctrl.txt diff --git a/Documentation/devicetree/bindings/arm/amlogic/analog-top.txt b/Documentation/devicetree/bindings/arm/amlogic/analog-top.txt deleted file mode 100644 index 101dc21014ec..000000000000 --- a/Documentation/devicetree/bindings/arm/amlogic/analog-top.txt +++ /dev/null @@ -1,20 +0,0 @@ -Amlogic Meson8 and Meson8b "analog top" registers: --------------------------------------------------- - -The analog top registers contain information about the so-called -"metal revision" (which encodes the "minor version") of the SoC. - -Required properties: -- reg: the register range of the analog top registers -- compatible: depending on the SoC this should be one of: - - "amlogic,meson8-analog-top" - - "amlogic,meson8b-analog-top" - along with "syscon" - - -Example: - - analog_top: analog-top@81a8 { - compatible = "amlogic,meson8-analog-top", "syscon"; - reg = <0x81a8 0x14>; - }; diff --git a/Documentation/devicetree/bindings/arm/amlogic/assist.txt b/Documentation/devicetree/bindings/arm/amlogic/assist.txt deleted file mode 100644 index 7656812b67b9..000000000000 --- a/Documentation/devicetree/bindings/arm/amlogic/assist.txt +++ /dev/null @@ -1,17 +0,0 @@ -Amlogic Meson6/Meson8/Meson8b assist registers: ------------------------------------------------ - -The assist registers contain basic information about the SoC, -for example the encoded SoC part number. - -Required properties: -- reg: the register range of the assist registers -- compatible: should be "amlogic,meson-mx-assist" along with "syscon" - - -Example: - - assist: assist@7c00 { - compatible = "amlogic,meson-mx-assist", "syscon"; - reg = <0x7c00 0x200>; - }; diff --git a/Documentation/devicetree/bindings/arm/amlogic/bootrom.txt b/Documentation/devicetree/bindings/arm/amlogic/bootrom.txt deleted file mode 100644 index 407e27f230ab..000000000000 --- a/Documentation/devicetree/bindings/arm/amlogic/bootrom.txt +++ /dev/null @@ -1,17 +0,0 @@ -Amlogic Meson6/Meson8/Meson8b bootrom: --------------------------------------- - -The bootrom register area can be used to access SoC specific -information, such as the "misc version". - -Required properties: -- reg: the register range of the bootrom registers -- compatible: should be "amlogic,meson-mx-bootrom" along with "syscon" - - -Example: - - bootrom: bootrom@d9040000 { - compatible = "amlogic,meson-mx-bootrom", "syscon"; - reg = <0xd9040000 0x10000>; - }; diff --git a/Documentation/devicetree/bindings/arm/amlogic/pmu.txt b/Documentation/devicetree/bindings/arm/amlogic/pmu.txt deleted file mode 100644 index 72f8d08198b6..000000000000 --- a/Documentation/devicetree/bindings/arm/amlogic/pmu.txt +++ /dev/null @@ -1,18 +0,0 @@ -Amlogic Meson8 and Meson8b power-management-unit: -------------------------------------------------- - -The pmu is used to turn off and on different power domains of the SoCs -This includes the power to the CPU cores. - -Required node properties: -- compatible value : depending on the SoC this should be one of: - "amlogic,meson8-pmu" - "amlogic,meson8b-pmu" -- reg : physical base address and the size of the registers window - -Example: - - pmu@c81000e4 { - compatible = "amlogic,meson8b-pmu", "syscon"; - reg = <0xc81000e0 0x18>; - }; diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt index 67a66bf74895..7374beb5a613 100644 --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt @@ -41,35 +41,6 @@ Examples: reg = <0xffffe800 0x200>; }; -RAMC PHY Controller required properties: -- compatible: Should be "microchip,sama7g5-ddr3phy", "syscon" -- reg: Should contain registers location and length - -Example: - - ddr3phy: ddr3phy@e3804000 { - compatible = "microchip,sama7g5-ddr3phy", "syscon"; - reg = <0xe3804000 0x1000>; -}; - -Special Function Registers (SFR) - -Special Function Registers (SFR) manage specific aspects of the integrated -memory, bridge implementations, processor and other functionality not controlled -elsewhere. - -required properties: -- compatible: Should be "atmel,-sfr", "syscon" or - "atmel,-sfrbu", "syscon" - can be "sama5d3", "sama5d4" or "sama5d2". - It also can be "microchip,sam9x60-sfr", "syscon". -- reg: Should contain registers location and length - - sfr@f0038000 { - compatible = "atmel,sama5d3-sfr", "syscon"; - reg = <0xf0038000 0x60>; - }; - Security Module (SECUMOD) The Security Module macrocell provides all necessary secure functions to avoid diff --git a/Documentation/devicetree/bindings/arm/axis.txt b/Documentation/devicetree/bindings/arm/axis.txt index ae345e1c8d2b..ebd33a88776f 100644 --- a/Documentation/devicetree/bindings/arm/axis.txt +++ b/Documentation/devicetree/bindings/arm/axis.txt @@ -7,22 +7,6 @@ ARTPEC-6 ARM SoC Required root node properties: - compatible = "axis,artpec6"; -ARTPEC-6 System Controller --------------------------- - -The ARTPEC-6 has a system controller with mixed functions controlling DMA, PCIe -and resets. - -Required properties: -- compatible: "axis,artpec6-syscon", "syscon" -- reg: Address and length of the register bank. - -Example: - syscon { - compatible = "axis,artpec6-syscon", "syscon"; - reg = <0xf8000000 0x48>; - }; - ARTPEC-6 Development board: --------------------------- Required root node properties: diff --git a/Documentation/devicetree/bindings/arm/cpu-enable-method/al,alpine-smp b/Documentation/devicetree/bindings/arm/cpu-enable-method/al,alpine-smp index 35e5afb6d9ad..cc7b1402a31f 100644 --- a/Documentation/devicetree/bindings/arm/cpu-enable-method/al,alpine-smp +++ b/Documentation/devicetree/bindings/arm/cpu-enable-method/al,alpine-smp @@ -27,16 +27,6 @@ Properties: - reg : Offset and length of the register set for the device -* Alpine System-Fabric Service Registers - -The System-Fabric Service Registers allow various operation on CPU and -system fabric, like powering CPUs off. - -Properties: -- compatible : Should contain "al,alpine-sysfabric-service" and "syscon". -- reg : Offset and length of the register set for the device - - Example: cpus { diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,vf610-mscm-cpucfg.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,vf610-mscm-cpucfg.txt deleted file mode 100644 index 44aa3c451ccf..000000000000 --- a/Documentation/devicetree/bindings/arm/freescale/fsl,vf610-mscm-cpucfg.txt +++ /dev/null @@ -1,14 +0,0 @@ -Freescale Vybrid Miscellaneous System Control - CPU Configuration - -The MSCM IP contains multiple sub modules, this binding describes the first -block of registers which contains CPU configuration information. - -Required properties: -- compatible: "fsl,vf610-mscm-cpucfg", "syscon" -- reg: the register range of the MSCM CPU configuration registers - -Example: - mscm_cpucfg: cpucfg@40001000 { - compatible = "fsl,vf610-mscm-cpucfg", "syscon"; - reg = <0x40001000 0x800>; - } diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,dove.txt b/Documentation/devicetree/bindings/arm/marvell/marvell,dove.txt index aaaf64c56e44..e10e8525eabd 100644 --- a/Documentation/devicetree/bindings/arm/marvell/marvell,dove.txt +++ b/Documentation/devicetree/bindings/arm/marvell/marvell,dove.txt @@ -5,18 +5,3 @@ Boards with a Marvell Dove SoC shall have the following properties: Required root node property: - compatible: must contain "marvell,dove"; - -* Global Configuration registers - -Global Configuration registers of Dove SoC are shared by a syscon node. - -Required properties: -- compatible: must contain "marvell,dove-global-config" and "syscon". -- reg: base address and size of the Global Configuration registers. - -Example: - -gconf: global-config@e802c { - compatible = "marvell,dove-global-config", "syscon"; - reg = <0xe802c 0x14>; -}; diff --git a/Documentation/devicetree/bindings/arm/spear-misc.txt b/Documentation/devicetree/bindings/arm/spear-misc.txt deleted file mode 100644 index e404e2556b4a..000000000000 --- a/Documentation/devicetree/bindings/arm/spear-misc.txt +++ /dev/null @@ -1,9 +0,0 @@ -SPEAr Misc configuration -=========================== -SPEAr SOCs have some miscellaneous registers which are used to configure -few properties of different peripheral controllers. - -misc node required properties: - -- compatible Should be "st,spear1340-misc", "syscon". -- reg: Address range of misc space up to 8K diff --git a/Documentation/devicetree/bindings/clock/ti-keystone-pllctrl.txt b/Documentation/devicetree/bindings/clock/ti-keystone-pllctrl.txt deleted file mode 100644 index c35cb6c4af4d..000000000000 --- a/Documentation/devicetree/bindings/clock/ti-keystone-pllctrl.txt +++ /dev/null @@ -1,20 +0,0 @@ -* Device tree bindings for Texas Instruments keystone pll controller - -The main pll controller used to drive theC66x CorePacs, the switch fabric, -and a majority of the peripheral clocks (all but the ARM CorePacs, DDR3 and -the NETCP modules) requires a PLL Controller to manage the various clock -divisions, gating, and synchronization. - -Required properties: - -- compatible: "ti,keystone-pllctrl", "syscon" - -- reg: contains offset/length value for pll controller - registers space. - -Example: - -pllctrl: pll-controller@02310000 { - compatible = "ti,keystone-pllctrl", "syscon"; - reg = <0x02310000 0x200>; -}; diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 32195e0d6533..d6fa58c9e4de 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -34,35 +34,58 @@ properties: anyOf: - items: - enum: + - al,alpine-sysfabric-service - allwinner,sun8i-a83t-system-controller - allwinner,sun8i-h3-system-controller - allwinner,sun8i-v3s-system-controller - allwinner,sun50i-a64-system-controller + - altr,l3regs - altr,sdr-ctl - amd,pensando-elba-syscon + - amlogic,meson-mx-assist + - amlogic,meson-mx-bootrom + - amlogic,meson8-analog-top + - amlogic,meson8b-analog-top + - amlogic,meson8-pmu + - amlogic,meson8b-pmu - apm,xgene-csw - apm,xgene-efuse - apm,xgene-mcb - apm,xgene-rb - apm,xgene-scu + - atmel,sama5d2-sfrbu + - atmel,sama5d3-nfc-io + - atmel,sama5d3-sfrbu + - atmel,sama5d4-sfrbu + - axis,artpec6-syscon - brcm,cru-clkset - brcm,sr-cdru - brcm,sr-mhb + - cirrus,ep7209-syscon1 + - cirrus,ep7209-syscon2 + - cirrus,ep7209-syscon3 + - cnxt,cx92755-uc - freecom,fsg-cs2-system-controller - fsl,imx93-aonmix-ns-syscfg - fsl,imx93-wakeupmix-syscfg - fsl,ls1088a-reset + - fsl,vf610-anatop + - fsl,vf610-mscm-cpucfg - hisilicon,dsa-subctrl - hisilicon,hi6220-sramctrl + - hisilicon,hip04-ppe - hisilicon,pcie-sas-subctrl - hisilicon,peri-subctrl - hpe,gxp-sysreg - loongson,ls1b-syscon - loongson,ls1c-syscon + - lsi,axxia-syscon - marvell,armada-3700-cpu-misc - marvell,armada-3700-nb-pm - marvell,armada-3700-avs - marvell,armada-3700-usb2-host-misc + - marvell,dove-global-config + - mediatek,mt2701-pctl-a-syscfg - mediatek,mt2712-pctl-a-syscfg - mediatek,mt6397-pctl-pmic-syscfg - mediatek,mt8135-pctl-a-syscfg @@ -70,6 +93,9 @@ properties: - mediatek,mt8173-pctl-a-syscfg - mediatek,mt8365-syscfg - microchip,lan966x-cpu-syscon + - microchip,sam9x60-sfr + - microchip,sama7g5-ddr3phy + - mscc,ocelot-cpu-syscon - mstar,msc313-pmsleep - nuvoton,ma35d1-sys - nuvoton,wpcm450-shm @@ -84,12 +110,15 @@ properties: - rockchip,rk3568-qos - rockchip,rk3588-qos - rockchip,rv1126-qos + - st,spear1340-misc + - stericsson,nomadik-pmu - starfive,jh7100-sysmain - ti,am62-usb-phy-ctrl - ti,am625-dss-oldi-io-ctrl - ti,am62p-cpsw-mac-efuse - ti,am654-dss-oldi-io-ctrl - ti,j784s4-pcie-ctrl + - ti,keystone-pllctrl - const: syscon diff --git a/Documentation/devicetree/bindings/mips/mscc.txt b/Documentation/devicetree/bindings/mips/mscc.txt index cc916eaeed0a..e74165696b76 100644 --- a/Documentation/devicetree/bindings/mips/mscc.txt +++ b/Documentation/devicetree/bindings/mips/mscc.txt @@ -25,23 +25,6 @@ Example: reg = <0x71070000 0x1c>; }; - -o CPU system control: - -The SoC has a few registers (ICPU_CFG:CPU_SYSTEM_CTRL) handling configuration of -the CPU: 8 general purpose registers, reset control, CPU en/disabling, CPU -endianness, CPU bus control, CPU status. - -Required properties: -- compatible: Should be "mscc,ocelot-cpu-syscon", "syscon" -- reg : Should contain registers location and length - -Example: - syscon@70000000 { - compatible = "mscc,ocelot-cpu-syscon", "syscon"; - reg = <0x70000000 0x2c>; - }; - o HSIO regs: The SoC has a few registers (HSIO) handling miscellaneous functionalities: diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.txt b/Documentation/devicetree/bindings/mtd/atmel-nand.txt index 4598930851d9..e36c35b17873 100644 --- a/Documentation/devicetree/bindings/mtd/atmel-nand.txt +++ b/Documentation/devicetree/bindings/mtd/atmel-nand.txt @@ -60,15 +60,6 @@ Required properties: - reg: should contain 2 register ranges. The first one is pointing to the PMECC block, and the second one to the PMECC_ERRLOC block. -* SAMA5 NFC I/O bindings: - -SAMA5 SoCs embed an advanced NAND controller logic to automate READ/WRITE page -operations. This interface to this logic is placed in a separate I/O range and -should thus have its own DT node. - -- compatible: should be "atmel,sama5d3-nfc-io", "syscon". -- reg: should contain the I/O range used to interact with the NFC logic. - Example: nfc_io: nfc-io@70000000 { diff --git a/Documentation/devicetree/bindings/net/hisilicon-hip04-net.txt b/Documentation/devicetree/bindings/net/hisilicon-hip04-net.txt index 464c0dafc617..c09eec6422ac 100644 --- a/Documentation/devicetree/bindings/net/hisilicon-hip04-net.txt +++ b/Documentation/devicetree/bindings/net/hisilicon-hip04-net.txt @@ -19,16 +19,6 @@ Optional properties: [1] Documentation/devicetree/bindings/net/ethernet.txt -* Ethernet ppe node: -Control rx & tx fifos of all ethernet controllers. -Have 2048 recv channels shared by all ethernet controllers, only if no overlap. -Each controller's recv channel start from channel * number (RX_DESC_NUM). - -Required properties: -- compatible: "hisilicon,hip04-ppe", "syscon". -- reg: address and length of the register set for the device. - - * MDIO bus node: Required properties: From d502645bc839ecff7837efd65928e085225dfce2 Mon Sep 17 00:00:00 2001 From: Jeff Johnson Date: Mon, 3 Jun 2024 17:05:44 -0700 Subject: [PATCH 61/87] mfd: qcom-pm8008: Add missing MODULE_DESCRIPTION() macro make allmodconfig && make W=1 C=1 reports: WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/mfd/qcom-pm8008.o Add the missing invocation of the MODULE_DESCRIPTION() macro. Signed-off-by: Jeff Johnson Link: https://lore.kernel.org/r/20240603-md-drivers-mfd-qcom-v1-1-88e48013eccc@quicinc.com Signed-off-by: Lee Jones --- drivers/mfd/qcom-pm8008.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/qcom-pm8008.c b/drivers/mfd/qcom-pm8008.c index 246b5fe9819d..60204cc9a2dc 100644 --- a/drivers/mfd/qcom-pm8008.c +++ b/drivers/mfd/qcom-pm8008.c @@ -275,4 +275,5 @@ static struct i2c_driver pm8008_mfd_driver = { }; module_i2c_driver(pm8008_mfd_driver); +MODULE_DESCRIPTION("QCOM PM8008 Power Management IC driver"); MODULE_LICENSE("GPL v2"); From 5fed47abb330818534a5a0d969f6634e5bd225d8 Mon Sep 17 00:00:00 2001 From: Jeff Johnson Date: Sun, 9 Jun 2024 19:21:28 -0700 Subject: [PATCH 62/87] mfd: Add missing MODULE_DESCRIPTION() macros On x86, make allmodconfig && make W=1 C=1 reports: WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/mfd/arizona.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/mfd/pcf50633-gpio.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/mfd/timberdale.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/mfd/ssbi.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/mfd/rt4831.o WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/mfd/intel_soc_pmic_bxtwc.o Add the missing invocation of the MODULE_DESCRIPTION() macro to all files which have a MODULE_LICENSE(). This includes mfd-core.c and vexpress-sysreg.c which, although they did not produce a warning with the x86 allmodconfig configuration, may cause this warning with other configurations. Signed-off-by: Jeff Johnson Reviewed-by: Charles Keepax Acked-by: Liviu Dudau Acked-by: Andy Shevchenko # for Intel Broxton PMIC Link: https://lore.kernel.org/r/20240609-md-drivers-mfd-v1-1-47cdd0b394e9@quicinc.com Signed-off-by: Lee Jones --- drivers/mfd/arizona-core.c | 1 + drivers/mfd/intel_soc_pmic_bxtwc.c | 1 + drivers/mfd/mfd-core.c | 1 + drivers/mfd/pcf50633-gpio.c | 1 + drivers/mfd/rt4831.c | 1 + drivers/mfd/ssbi.c | 1 + drivers/mfd/timberdale.c | 1 + drivers/mfd/vexpress-sysreg.c | 1 + 8 files changed, 8 insertions(+) diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 19a0adf8ce3d..85ff8717d850 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -1429,4 +1429,5 @@ int arizona_dev_exit(struct arizona *arizona) } EXPORT_SYMBOL_GPL(arizona_dev_exit); +MODULE_DESCRIPTION("Wolfson Arizona core driver"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/mfd/intel_soc_pmic_bxtwc.c b/drivers/mfd/intel_soc_pmic_bxtwc.c index 8dac0d41f64f..ba32cacfc499 100644 --- a/drivers/mfd/intel_soc_pmic_bxtwc.c +++ b/drivers/mfd/intel_soc_pmic_bxtwc.c @@ -581,5 +581,6 @@ static struct platform_driver bxtwc_driver = { module_platform_driver(bxtwc_driver); +MODULE_DESCRIPTION("Intel Broxton Whiskey Cove PMIC MFD core driver"); MODULE_LICENSE("GPL v2"); MODULE_AUTHOR("Qipeng Zha "); diff --git a/drivers/mfd/mfd-core.c b/drivers/mfd/mfd-core.c index 7ea9a875d8f3..76bd316a50af 100644 --- a/drivers/mfd/mfd-core.c +++ b/drivers/mfd/mfd-core.c @@ -436,5 +436,6 @@ int devm_mfd_add_devices(struct device *dev, int id, } EXPORT_SYMBOL(devm_mfd_add_devices); +MODULE_DESCRIPTION("Core MFD support"); MODULE_LICENSE("GPL"); MODULE_AUTHOR("Ian Molton, Dmitry Baryshkov"); diff --git a/drivers/mfd/pcf50633-gpio.c b/drivers/mfd/pcf50633-gpio.c index 4d2b53b12eeb..3e368219479a 100644 --- a/drivers/mfd/pcf50633-gpio.c +++ b/drivers/mfd/pcf50633-gpio.c @@ -88,4 +88,5 @@ int pcf50633_gpio_power_supply_set(struct pcf50633 *pcf, } EXPORT_SYMBOL_GPL(pcf50633_gpio_power_supply_set); +MODULE_DESCRIPTION("NXP PCF50633 GPIO Driver"); MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/rt4831.c b/drivers/mfd/rt4831.c index f8d6dc55b558..1ab8870e4ebf 100644 --- a/drivers/mfd/rt4831.c +++ b/drivers/mfd/rt4831.c @@ -115,4 +115,5 @@ static struct i2c_driver rt4831_driver = { module_i2c_driver(rt4831_driver); MODULE_AUTHOR("ChiYuan Huang "); +MODULE_DESCRIPTION("Richtek RT4831 core driver"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/mfd/ssbi.c b/drivers/mfd/ssbi.c index f849f2d34ec7..6e7aff6e2746 100644 --- a/drivers/mfd/ssbi.c +++ b/drivers/mfd/ssbi.c @@ -319,6 +319,7 @@ static struct platform_driver ssbi_driver = { }; module_platform_driver(ssbi_driver); +MODULE_DESCRIPTION("Qualcomm Single-wire Serial Bus Interface (SSBI) driver"); MODULE_LICENSE("GPL v2"); MODULE_VERSION("1.0"); MODULE_ALIAS("platform:ssbi"); diff --git a/drivers/mfd/timberdale.c b/drivers/mfd/timberdale.c index a41e9a3e2064..333d5b874de3 100644 --- a/drivers/mfd/timberdale.c +++ b/drivers/mfd/timberdale.c @@ -853,4 +853,5 @@ module_pci_driver(timberdale_pci_driver); MODULE_AUTHOR("Mocean Laboratories "); MODULE_VERSION(DRV_VERSION); +MODULE_DESCRIPTION("Timberdale FPGA MFD driver"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/mfd/vexpress-sysreg.c b/drivers/mfd/vexpress-sysreg.c index eab82619ec31..d34d58ce46db 100644 --- a/drivers/mfd/vexpress-sysreg.c +++ b/drivers/mfd/vexpress-sysreg.c @@ -132,4 +132,5 @@ static struct platform_driver vexpress_sysreg_driver = { }; module_platform_driver(vexpress_sysreg_driver); +MODULE_DESCRIPTION("Versatile Express system registers driver"); MODULE_LICENSE("GPL v2"); From 81c8920d46d449bec93c20b5083365a7cf2561aa Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 6 Jun 2024 16:36:46 +0200 Subject: [PATCH 63/87] mfd: max14577: Fix Wvoid-pointer-to-enum-cast warning (again) 'type' is an enum, thus cast of pointer on 64-bit compile test with clang and W=1 causes: max14577.c:400:23: error: cast to smaller integer type 'enum maxim_device_type' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Year ago this was solved, although LKML discussion suggested warning is not suitable for kernel. Nothing changed in this regard for a year, so assume the warning will stay and we want to have warnings-free builds. Link: https://lore.kernel.org/all/20230814160457.GA2836@dev-arch.thelio-3990X/ Link: https://lore.kernel.org/all/20230810095849.123321-1-krzysztof.kozlowski@linaro.org/ Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240606143648.152668-1-krzysztof.kozlowski@linaro.org Signed-off-by: Lee Jones --- drivers/mfd/max14577.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/max14577.c b/drivers/mfd/max14577.c index 8f7472c76009..67bf4de4c0c1 100644 --- a/drivers/mfd/max14577.c +++ b/drivers/mfd/max14577.c @@ -397,7 +397,7 @@ static int max14577_i2c_probe(struct i2c_client *i2c) return ret; } - max14577->dev_type = (enum maxim_device_type)i2c_get_match_data(i2c); + max14577->dev_type = (kernel_ulong_t)i2c_get_match_data(i2c); max14577_print_dev_type(max14577); From 105d4b4a36d8d5872da77d8c3e0855b86fcc6c8c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 6 Jun 2024 16:36:47 +0200 Subject: [PATCH 64/87] mfd: mxs-lradc: Fix Wvoid-pointer-to-enum-cast warning (again) 'type' is an enum, thus cast of pointer on 64-bit compile test with clang and W=1 causes: mxs-lradc.c:140:15: error: cast to smaller integer type 'enum mxs_lradc_id' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Year ago this was solved, although LKML discussion suggested warning is not suitable for kernel. Nothing changed in this regard for a year, so assume the warning will stay and we want to have warnings-free builds. Link: https://lore.kernel.org/all/20230814160457.GA2836@dev-arch.thelio-3990X/ Link: https://lore.kernel.org/all/20230810095849.123321-1-krzysztof.kozlowski@linaro.org/ Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240606143648.152668-2-krzysztof.kozlowski@linaro.org Signed-off-by: Lee Jones --- drivers/mfd/mxs-lradc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/mxs-lradc.c b/drivers/mfd/mxs-lradc.c index 73893890b50a..b2ebb5433121 100644 --- a/drivers/mfd/mxs-lradc.c +++ b/drivers/mfd/mxs-lradc.c @@ -137,7 +137,7 @@ static int mxs_lradc_probe(struct platform_device *pdev) if (!lradc) return -ENOMEM; - lradc->soc = (enum mxs_lradc_id)device_get_match_data(&pdev->dev); + lradc->soc = (kernel_ulong_t)device_get_match_data(&pdev->dev); lradc->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(lradc->clk)) { From 7b28133dd63681164d87ea2a97e27cd2f9f692fb Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 6 Jun 2024 16:36:48 +0200 Subject: [PATCH 65/87] mfd: wm8994: Fix Wvoid-pointer-to-enum-cast warning (again) 'type' is an enum, thus cast of pointer on 64-bit compile test with clang and W=1 causes: wm8994-core.c:625:17: error: cast to smaller integer type 'enum wm8994_type' from 'const void *' [-Werror,-Wvoid-pointer-to-enum-cast] Year ago this was solved, although LKML discussion suggested warning is not suitable for kernel. Nothing changed in this regard for a year, so assume the warning will stay and we want to have warnings-free builds. Link: https://lore.kernel.org/all/20230814160457.GA2836@dev-arch.thelio-3990X/ Link: https://lore.kernel.org/all/20230810095849.123321-1-krzysztof.kozlowski@linaro.org/ Signed-off-by: Krzysztof Kozlowski Reviewed-by: Charles Keepax Link: https://lore.kernel.org/r/20240606143648.152668-3-krzysztof.kozlowski@linaro.org Signed-off-by: Lee Jones --- drivers/mfd/wm8994-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/wm8994-core.c b/drivers/mfd/wm8994-core.c index d5ac066f9db4..094c0b3dbd97 100644 --- a/drivers/mfd/wm8994-core.c +++ b/drivers/mfd/wm8994-core.c @@ -622,7 +622,7 @@ static int wm8994_i2c_probe(struct i2c_client *i2c) wm8994->dev = &i2c->dev; wm8994->irq = i2c->irq; - wm8994->type = (enum wm8994_type)i2c_get_match_data(i2c); + wm8994->type = (kernel_ulong_t)i2c_get_match_data(i2c); wm8994->regmap = devm_regmap_init_i2c(i2c, &wm8994_base_regmap_config); if (IS_ERR(wm8994->regmap)) { From a49d9bae9cbd650137df9f6ae043389199b47137 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 6 Jun 2024 16:24:56 +0200 Subject: [PATCH 66/87] mfd: arizona: Simplify with spi_get_device_match_data() Use spi_get_device_match_data() helper to simplify a bit the driver. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Charles Keepax Link: https://lore.kernel.org/r/20240606142457.130553-1-krzysztof.kozlowski@linaro.org Signed-off-by: Lee Jones --- drivers/mfd/arizona-spi.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/drivers/mfd/arizona-spi.c b/drivers/mfd/arizona-spi.c index de5d894ac04a..eaa2b2bc5dd0 100644 --- a/drivers/mfd/arizona-spi.c +++ b/drivers/mfd/arizona-spi.c @@ -190,19 +190,12 @@ static int arizona_spi_acpi_probe(struct arizona *arizona) static int arizona_spi_probe(struct spi_device *spi) { - const struct spi_device_id *id = spi_get_device_id(spi); - const void *match_data; struct arizona *arizona; const struct regmap_config *regmap_config = NULL; unsigned long type = 0; int ret; - match_data = device_get_match_data(&spi->dev); - if (match_data) - type = (unsigned long)match_data; - else if (id) - type = id->driver_data; - + type = (unsigned long)spi_get_device_match_data(spi); switch (type) { case WM5102: if (IS_ENABLED(CONFIG_MFD_WM5102)) From 0ddabc8c6e80d06b02794d818a36d7b6c16d4c66 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 6 Jun 2024 16:24:57 +0200 Subject: [PATCH 67/87] mfd: madera: Simplify with spi_get_device_match_data() Use spi_get_device_match_data() helper to simplify a bit the driver. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Charles Keepax Link: https://lore.kernel.org/r/20240606142457.130553-2-krzysztof.kozlowski@linaro.org Signed-off-by: Lee Jones --- drivers/mfd/madera-spi.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/drivers/mfd/madera-spi.c b/drivers/mfd/madera-spi.c index ad07ebe29e59..ce9e90322c9c 100644 --- a/drivers/mfd/madera-spi.c +++ b/drivers/mfd/madera-spi.c @@ -18,21 +18,14 @@ static int madera_spi_probe(struct spi_device *spi) { - const struct spi_device_id *id = spi_get_device_id(spi); struct madera *madera; const struct regmap_config *regmap_16bit_config = NULL; const struct regmap_config *regmap_32bit_config = NULL; - const void *of_data; unsigned long type; const char *name; int ret; - of_data = of_device_get_match_data(&spi->dev); - if (of_data) - type = (unsigned long)of_data; - else - type = id->driver_data; - + type = (unsigned long)spi_get_device_match_data(spi); switch (type) { case CS47L15: if (IS_ENABLED(CONFIG_MFD_CS47L15)) { From 13c151a919a876521c16810756764aa38683eb62 Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Thu, 13 Jun 2024 12:54:30 -0500 Subject: [PATCH 68/87] mfd: tps65912: Use devm helper functions to simplify probe This simplifies probe and also allows us to remove the remove callbacks from the core and interface drivers. Do that here. Signed-off-by: Andrew Davis Link: https://lore.kernel.org/r/20240613175430.57698-1-afd@ti.com Signed-off-by: Lee Jones --- drivers/mfd/tps65912-core.c | 21 +++++++-------------- drivers/mfd/tps65912-i2c.c | 8 -------- drivers/mfd/tps65912-spi.c | 8 -------- include/linux/mfd/tps65912.h | 1 - 4 files changed, 7 insertions(+), 31 deletions(-) diff --git a/drivers/mfd/tps65912-core.c b/drivers/mfd/tps65912-core.c index 2305ea60367a..87ee6aac3763 100644 --- a/drivers/mfd/tps65912-core.c +++ b/drivers/mfd/tps65912-core.c @@ -90,29 +90,22 @@ int tps65912_device_init(struct tps65912 *tps) { int ret; - ret = regmap_add_irq_chip(tps->regmap, tps->irq, IRQF_ONESHOT, 0, - &tps65912_irq_chip, &tps->irq_data); + ret = devm_regmap_add_irq_chip(tps->dev, tps->regmap, tps->irq, + IRQF_ONESHOT, 0, &tps65912_irq_chip, + &tps->irq_data); if (ret) return ret; - ret = mfd_add_devices(tps->dev, PLATFORM_DEVID_AUTO, tps65912_cells, - ARRAY_SIZE(tps65912_cells), NULL, 0, - regmap_irq_get_domain(tps->irq_data)); - if (ret) { - regmap_del_irq_chip(tps->irq, tps->irq_data); + ret = devm_mfd_add_devices(tps->dev, PLATFORM_DEVID_AUTO, tps65912_cells, + ARRAY_SIZE(tps65912_cells), NULL, 0, + regmap_irq_get_domain(tps->irq_data)); + if (ret) return ret; - } return 0; } EXPORT_SYMBOL_GPL(tps65912_device_init); -void tps65912_device_exit(struct tps65912 *tps) -{ - regmap_del_irq_chip(tps->irq, tps->irq_data); -} -EXPORT_SYMBOL_GPL(tps65912_device_exit); - MODULE_AUTHOR("Andrew F. Davis "); MODULE_DESCRIPTION("TPS65912x MFD Driver"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/mfd/tps65912-i2c.c b/drivers/mfd/tps65912-i2c.c index 3cc1bc68be7c..138e50497b51 100644 --- a/drivers/mfd/tps65912-i2c.c +++ b/drivers/mfd/tps65912-i2c.c @@ -42,13 +42,6 @@ static int tps65912_i2c_probe(struct i2c_client *client) return tps65912_device_init(tps); } -static void tps65912_i2c_remove(struct i2c_client *client) -{ - struct tps65912 *tps = i2c_get_clientdata(client); - - tps65912_device_exit(tps); -} - static const struct i2c_device_id tps65912_i2c_id_table[] = { { "tps65912" }, { /* sentinel */ } @@ -61,7 +54,6 @@ static struct i2c_driver tps65912_i2c_driver = { .of_match_table = tps65912_i2c_of_match_table, }, .probe = tps65912_i2c_probe, - .remove = tps65912_i2c_remove, .id_table = tps65912_i2c_id_table, }; module_i2c_driver(tps65912_i2c_driver); diff --git a/drivers/mfd/tps65912-spi.c b/drivers/mfd/tps65912-spi.c index 9e976f9c6bbe..2a77dccd6059 100644 --- a/drivers/mfd/tps65912-spi.c +++ b/drivers/mfd/tps65912-spi.c @@ -42,13 +42,6 @@ static int tps65912_spi_probe(struct spi_device *spi) return tps65912_device_init(tps); } -static void tps65912_spi_remove(struct spi_device *spi) -{ - struct tps65912 *tps = spi_get_drvdata(spi); - - tps65912_device_exit(tps); -} - static const struct spi_device_id tps65912_spi_id_table[] = { { "tps65912", 0 }, { /* sentinel */ } @@ -61,7 +54,6 @@ static struct spi_driver tps65912_spi_driver = { .of_match_table = tps65912_spi_of_match_table, }, .probe = tps65912_spi_probe, - .remove = tps65912_spi_remove, .id_table = tps65912_spi_id_table, }; module_spi_driver(tps65912_spi_driver); diff --git a/include/linux/mfd/tps65912.h b/include/linux/mfd/tps65912.h index 860ec0a16c96..e5373c302722 100644 --- a/include/linux/mfd/tps65912.h +++ b/include/linux/mfd/tps65912.h @@ -314,6 +314,5 @@ struct tps65912 { extern const struct regmap_config tps65912_regmap_config; int tps65912_device_init(struct tps65912 *tps); -void tps65912_device_exit(struct tps65912 *tps); #endif /* __LINUX_MFD_TPS65912_H */ From d7636117ca976e217b6452c082e7f7c041f4019c Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 5 Jun 2024 22:14:16 +0300 Subject: [PATCH 69/87] mfd: lm3533: Move to new GPIO descriptor-based APIs Legacy GPIO APIs are subject to remove. Convert the driver to new APIs. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20240605191458.2536819-1-andriy.shevchenko@linux.intel.com Signed-off-by: Lee Jones --- drivers/mfd/lm3533-core.c | 24 +++++++----------------- include/linux/mfd/lm3533.h | 5 ++--- 2 files changed, 9 insertions(+), 20 deletions(-) diff --git a/drivers/mfd/lm3533-core.c b/drivers/mfd/lm3533-core.c index c1219e608c5f..0a2409d00b2e 100644 --- a/drivers/mfd/lm3533-core.c +++ b/drivers/mfd/lm3533-core.c @@ -11,7 +11,7 @@ #include #include #include -#include +#include #include #include #include @@ -225,14 +225,12 @@ static int lm3533_set_lvled_config(struct lm3533 *lm3533, u8 lvled, u8 led) static void lm3533_enable(struct lm3533 *lm3533) { - if (gpio_is_valid(lm3533->gpio_hwen)) - gpio_set_value(lm3533->gpio_hwen, 1); + gpiod_set_value(lm3533->hwen, 1); } static void lm3533_disable(struct lm3533 *lm3533) { - if (gpio_is_valid(lm3533->gpio_hwen)) - gpio_set_value(lm3533->gpio_hwen, 0); + gpiod_set_value(lm3533->hwen, 0); } enum lm3533_attribute_type { @@ -483,18 +481,10 @@ static int lm3533_device_init(struct lm3533 *lm3533) return -EINVAL; } - lm3533->gpio_hwen = pdata->gpio_hwen; - - if (gpio_is_valid(lm3533->gpio_hwen)) { - ret = devm_gpio_request_one(lm3533->dev, lm3533->gpio_hwen, - GPIOF_OUT_INIT_LOW, "lm3533-hwen"); - if (ret < 0) { - dev_err(lm3533->dev, - "failed to request HWEN GPIO %d\n", - lm3533->gpio_hwen); - return ret; - } - } + lm3533->hwen = devm_gpiod_get(lm3533->dev, NULL, GPIOD_OUT_LOW); + if (IS_ERR(lm3533->hwen)) + return dev_err_probe(lm3533->dev, PTR_ERR(lm3533->hwen), "failed to request HWEN GPIO\n"); + gpiod_set_consumer_name(lm3533->hwen, "lm3533-hwen"); lm3533_enable(lm3533); diff --git a/include/linux/mfd/lm3533.h b/include/linux/mfd/lm3533.h index 77092f6363ad..69059a7a2ce5 100644 --- a/include/linux/mfd/lm3533.h +++ b/include/linux/mfd/lm3533.h @@ -16,6 +16,7 @@ DEVICE_ATTR(_name, S_IRUGO | S_IWUSR , show_##_name, store_##_name) struct device; +struct gpio_desc; struct regmap; struct lm3533 { @@ -23,7 +24,7 @@ struct lm3533 { struct regmap *regmap; - int gpio_hwen; + struct gpio_desc *hwen; int irq; unsigned have_als:1; @@ -69,8 +70,6 @@ enum lm3533_boost_ovp { }; struct lm3533_platform_data { - int gpio_hwen; - enum lm3533_boost_ovp boost_ovp; enum lm3533_boost_freq boost_freq; From 6b10f1c581f302b12bdd77d06038984a0709e0b0 Mon Sep 17 00:00:00 2001 From: Yang Li Date: Tue, 18 Jun 2024 09:18:54 +0800 Subject: [PATCH 70/87] mfd: tps6594-core: Remove unneeded semicolon in tps6594_check_crc_mode() Abaci Robot reports: drivers/mfd/tps6594-core.c:516:2-3: Unneeded semicolon Let's remove it. Reported-by: Abaci Robot Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=9346 Signed-off-by: Yang Li Link: https://lore.kernel.org/r/20240618011854.109426-1-yang.lee@linux.alibaba.com Signed-off-by: Lee Jones --- drivers/mfd/tps6594-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mfd/tps6594-core.c b/drivers/mfd/tps6594-core.c index c59f3d7e32b0..a7223e873cd1 100644 --- a/drivers/mfd/tps6594-core.c +++ b/drivers/mfd/tps6594-core.c @@ -513,7 +513,7 @@ static int tps6594_check_crc_mode(struct tps6594 *tps, bool primary_pmic) } else { regmap_reg = TPS6594_REG_SERIAL_IF_CONFIG; mask_val = TPS6594_BIT_I2C1_SPI_CRC_EN; - }; + } /* * Check if CRC is enabled. From fa0c3667d0bf41442927f79d4453b52a265ab601 Mon Sep 17 00:00:00 2001 From: Javier Carrasco Date: Thu, 20 Jun 2024 23:22:33 +0200 Subject: [PATCH 71/87] mfd: omap-usb-tll: Annotate struct usbtll_omap with __counted_by Use the __counted_by compiler attribute for the "struct clk *ch_clk[]" flexible array member to improve the results of array bound sanitizers. The comments for the variables are no longer needed as it is now clear what is what. Signed-off-by: Javier Carrasco Link: https://lore.kernel.org/r/20240620-omap-usb-tll-counted_by-v1-1-77797834bb9a@gmail.com Signed-off-by: Lee Jones --- drivers/mfd/omap-usb-tll.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mfd/omap-usb-tll.c b/drivers/mfd/omap-usb-tll.c index b6303ddb013b..a091e5b0f21d 100644 --- a/drivers/mfd/omap-usb-tll.c +++ b/drivers/mfd/omap-usb-tll.c @@ -98,8 +98,8 @@ struct usbtll_omap { void __iomem *base; - int nch; /* num. of channels */ - struct clk *ch_clk[]; /* must be the last member */ + int nch; + struct clk *ch_clk[] __counted_by(nch); }; /*-------------------------------------------------------------------------*/ From 1d845319dc819c39e2ee568f1c6bd0cdb2fbc035 Mon Sep 17 00:00:00 2001 From: Etienne Carriere Date: Mon, 17 Jun 2024 11:20:16 +0200 Subject: [PATCH 72/87] dt-bindings: mfd: Dual licensing for st,stpmic1 bindings Change include/dt-bindings/mfd/st,stpmic1.h license model from GPLv2.0 only to dual GPLv2.0 or BSD-2-Clause. I have every legitimacy to request this change on behalf of STMicroelectronics. This change clarifies that this DT binding header file can be shared with software components as bootloaders and OSes that are not published under GPLv2 terms. In CC are all the contributors to this header file. Cc: Pascal Paillet Cc: Lee Jones Cc: Rob Herring Signed-off-by: Etienne Carriere Acked-by: Rob Herring (Arm) Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20240617092016.2958046-1-etienne.carriere@foss.st.com Signed-off-by: Lee Jones --- include/dt-bindings/mfd/st,stpmic1.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/dt-bindings/mfd/st,stpmic1.h b/include/dt-bindings/mfd/st,stpmic1.h index 321cd08797d9..9dd15b9c743e 100644 --- a/include/dt-bindings/mfd/st,stpmic1.h +++ b/include/dt-bindings/mfd/st,stpmic1.h @@ -1,4 +1,4 @@ -/* SPDX-License-Identifier: GPL-2.0 */ +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ /* * Copyright (C) STMicroelectronics 2018 - All Rights Reserved * Author: Philippe Peurichard , From b0a5cde57cf14383205ed147bb51320372b8c113 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 23 Jun 2024 15:46:00 +0200 Subject: [PATCH 73/87] dt-bindings: mfd: Explain lack of child dependency in simple-mfd Common mistake of usage of 'simple-mfd' compatible is a dependency of children on resources acquired and managed by the parent, e.g. clocks. Extend the simple-mfd documentation to cover this case. Cc: Linus Walleij Cc: Arnd Bergmann Signed-off-by: Krzysztof Kozlowski Reviewed-by: Conor Dooley Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20240623134600.115098-1-krzysztof.kozlowski@linaro.org Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/mfd.txt | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/mfd.txt b/Documentation/devicetree/bindings/mfd/mfd.txt index 336c0495c8a3..b938fa26d2ce 100644 --- a/Documentation/devicetree/bindings/mfd/mfd.txt +++ b/Documentation/devicetree/bindings/mfd/mfd.txt @@ -17,13 +17,14 @@ A typical MFD can be: Optional properties: -- compatible : "simple-mfd" - this signifies that the operating system should - consider all subnodes of the MFD device as separate devices akin to how - "simple-bus" indicates when to see subnodes as children for a simple - memory-mapped bus. For more complex devices, when the nexus driver has to - probe registers to figure out what child devices exist etc, this should not - be used. In the latter case the child devices will be determined by the - operating system. +- compatible : "simple-mfd" - this signifies that the operating system + should consider all subnodes of the MFD device as separate and independent + devices, so not needing any resources to be provided by the parent device. + Similarly to how "simple-bus" indicates when to see subnodes as children for + a simple memory-mapped bus. + For more complex devices, when the nexus driver has to probe registers to + figure out what child devices exist etc, this should not be used. In the + latter case the child devices will be determined by the operating system. - ranges: Describes the address mapping relationship to the parent. Should set the child's base address to 0, the physical address within parent's address From 40176714c818b0b6a2ca8213cdb7654fbd49b742 Mon Sep 17 00:00:00 2001 From: Javier Carrasco Date: Wed, 26 Jun 2024 21:37:03 +0200 Subject: [PATCH 74/87] mfd: omap-usb-tll: Use struct_size to allocate tll Commit 16c2004d9e4d ("mfd: omap-usb-tll: Allocate driver data at once") changed the memory allocation of 'tll' to consolidate it into a single allocation, introducing an incorrect size calculation. In particular, the allocation for the array of pointers was converted into a single-pointer allocation. The memory allocation used to occur in two steps: tll = devm_kzalloc(dev, sizeof(struct usbtll_omap), GFP_KERNEL); tll->ch_clk = devm_kzalloc(dev, sizeof(struct clk *) * tll->nch, GFP_KERNEL); And it turned that into the following allocation: tll = devm_kzalloc(dev, sizeof(*tll) + sizeof(tll->ch_clk[nch]), GFP_KERNEL); sizeof(tll->ch_clk[nch]) returns the size of a single pointer instead of the expected nch pointers. This bug went unnoticed because the allocation size was small enough to fit within the minimum size of a memory allocation for this particular case [1]. The complete allocation can still be done at once with the struct_size macro, which comes in handy for structures with a trailing flexible array. Fix the memory allocation to obtain the original size again. Link: https://lore.kernel.org/all/202406261121.2FFD65647@keescook/ [1] Fixes: 16c2004d9e4d ("mfd: omap-usb-tll: Allocate driver data at once") Reviewed-by: Kees Cook Signed-off-by: Javier Carrasco Fixes: commit 16c2004d9e4d ("mfd: omap-usb-tll: Allocate driver data at once") Link: https://lore.kernel.org/r/20240626-omap-usb-tll-counted_by-v2-1-4bedf20d1b51@gmail.com Signed-off-by: Lee Jones --- drivers/mfd/omap-usb-tll.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/mfd/omap-usb-tll.c b/drivers/mfd/omap-usb-tll.c index a091e5b0f21d..5f25ac514ff2 100644 --- a/drivers/mfd/omap-usb-tll.c +++ b/drivers/mfd/omap-usb-tll.c @@ -230,8 +230,7 @@ static int usbtll_omap_probe(struct platform_device *pdev) break; } - tll = devm_kzalloc(dev, sizeof(*tll) + sizeof(tll->ch_clk[nch]), - GFP_KERNEL); + tll = devm_kzalloc(dev, struct_size(tll, ch_clk, nch), GFP_KERNEL); if (!tll) { pm_runtime_put_sync(dev); pm_runtime_disable(dev); From 279322ad683153cbcce27d73aab6031648cbf2a3 Mon Sep 17 00:00:00 2001 From: Bryan Brattlof Date: Fri, 21 Jun 2024 11:39:39 -0500 Subject: [PATCH 75/87] dt-bindings: mfd: syscon: Add TI's opp table compatible The JTAG_USER_ID_USERCODE efuse address, which is located inside the WKUP_CTRL_MMR0 range holds information to identify the speed grades of various components on TI's K3 SoCs. Add a compatible to allow the cpufreq driver to obtain the data to limit the maximum frequency for the CPUs under Linux control. Signed-off-by: Bryan Brattlof Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20240621-ti-opp-updates-v3-3-d857be6dac8b@ti.com Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/syscon.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index d6fa58c9e4de..0f6fd1a41dd8 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -113,6 +113,7 @@ properties: - st,spear1340-misc - stericsson,nomadik-pmu - starfive,jh7100-sysmain + - ti,am62-opp-efuse-table - ti,am62-usb-phy-ctrl - ti,am625-dss-oldi-io-ctrl - ti,am62p-cpsw-mac-efuse From e7865de24e8d83b4f12bbca8be2f9d5de464b5fa Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Sat, 22 Jun 2024 00:57:18 +0300 Subject: [PATCH 76/87] dt-bindings: mfd: rk817: Fixup clocks and reference dai-common Ensure 'clocks' property does not allow more than one item and add the missing reference to dai-common schema. While at it, move 'clocks*' and '#sound-dai-cells' properties to keep the list ordered alphabetically. Additionally, drop all useless/redundant descriptions. Fixes: 6c38ca03406e ("dt-bindings: mfd: rk808: Convert bindings to yaml") Signed-off-by: Cristian Ciocaltea Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20240622-rk809-fixes-v2-1-c0db420d3639@collabora.com Signed-off-by: Lee Jones --- .../bindings/mfd/rockchip,rk817.yaml | 33 +++++++------------ 1 file changed, 11 insertions(+), 22 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/rockchip,rk817.yaml b/Documentation/devicetree/bindings/mfd/rockchip,rk817.yaml index 8c2fd0fabb92..d70b4307ac77 100644 --- a/Documentation/devicetree/bindings/mfd/rockchip,rk817.yaml +++ b/Documentation/devicetree/bindings/mfd/rockchip,rk817.yaml @@ -32,6 +32,13 @@ properties: minimum: 0 maximum: 1 + clocks: + maxItems: 1 + + clock-names: + items: + - const: mclk + clock-output-names: description: From common clock binding to override the default output clock name. @@ -42,6 +49,9 @@ properties: description: Telling whether or not this PMIC is controlling the system power. + '#sound-dai-cells': + const: 0 + system-power-controller: true wakeup-source: @@ -94,26 +104,7 @@ properties: $ref: /schemas/regulator/regulator.yaml# unevaluatedProperties: false - clocks: - description: - The input clock for the audio codec. - - clock-names: - description: - The clock name for the codec clock. - items: - - const: mclk - - '#sound-dai-cells': - description: - Needed for the interpretation of sound dais. - const: 0 - codec: - description: | - The child node for the codec to hold additional properties. If no - additional properties are required for the codec, this node can be - omitted. type: object additionalProperties: false properties: @@ -123,9 +114,6 @@ properties: Describes if the microphone uses differential mode. charger: - description: | - The child node for the charger to hold additional properties. If a - battery is not in use, this node can be omitted. type: object $ref: /schemas/power/supply/power-supply.yaml @@ -168,6 +156,7 @@ properties: additionalProperties: false allOf: + - $ref: /schemas/sound/dai-common.yaml# - if: properties: '#clock-cells': From f11121314a6e4ac505233fb7ae777311fb45a6a3 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Sat, 22 Jun 2024 00:57:19 +0300 Subject: [PATCH 77/87] dt-bindings: mfd: rk817: Merge support for RK809 The Rockchip RK809 PMIC is compatible with RK817 and provides the same capabilities, except for the battery charger manager. There are also minor regulator related differences: BOOST and OTG_SWITCH are specific to RK817, while DCDC_REG5, SWITCH_REG1 and SWITCH_REG2 are provided RK809. The current binding for RK809 doesn't document the audio codec properties, although it has been already in use by several boards: rk3566-quartz64-b, k3566-roc-pc, rk3568-evb1-v10, rk3568-lubancat-2, rk3568-odroid-m1, rk3568-rock-3a. Therefore dtbs_check fails for all of them: DTC_CHK arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dtb rk3568-rock-3a.dtb: pmic@20: '#sound-dai-cells', 'assigned-clock-parents', 'assigned-clocks', 'clock-names', 'clocks', 'codec' do not match any of the regexes: 'pinctrl-[0-9]+' from schema $id: http://devicetree.org/schemas/mfd/rockchip,rk809.yaml# Additionally, the example in rockchip,rk809 binding is not able to actually test the schema since it uses a wrong compatible 'rockchip,rk808' instead of the expected 'rockchip,rk809'. Instead of duplicating even more content, merge the RK809 support into the more inclusive RK817 schema and drop the now obsolete rockchip,rk809 related file. Fixes: 6c38ca03406e ("dt-bindings: mfd: rk808: Convert bindings to yaml") Signed-off-by: Cristian Ciocaltea Reviewed-by: Conor Dooley Link: https://lore.kernel.org/r/20240622-rk809-fixes-v2-2-c0db420d3639@collabora.com Signed-off-by: Lee Jones --- .../bindings/mfd/rockchip,rk809.yaml | 288 ------------------ .../bindings/mfd/rockchip,rk817.yaml | 37 ++- 2 files changed, 27 insertions(+), 298 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mfd/rockchip,rk809.yaml diff --git a/Documentation/devicetree/bindings/mfd/rockchip,rk809.yaml b/Documentation/devicetree/bindings/mfd/rockchip,rk809.yaml deleted file mode 100644 index 839c0521f1e5..000000000000 --- a/Documentation/devicetree/bindings/mfd/rockchip,rk809.yaml +++ /dev/null @@ -1,288 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/mfd/rockchip,rk809.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: RK809 Power Management Integrated Circuit - -maintainers: - - Chris Zhong - - Zhang Qing - -description: | - Rockchip RK809 series PMIC. This device consists of an i2c controlled MFD - that includes regulators, an RTC, and power button. - -properties: - compatible: - enum: - - rockchip,rk809 - - reg: - maxItems: 1 - - interrupts: - maxItems: 1 - - '#clock-cells': - description: | - See for clock IDs. - minimum: 0 - maximum: 1 - - clock-output-names: - description: - From common clock binding to override the default output clock name. - - rockchip,system-power-controller: - type: boolean - deprecated: true - description: - Telling whether or not this PMIC is controlling the system power. - - system-power-controller: true - - wakeup-source: - type: boolean - description: - Device can be used as a wakeup source. - - vcc1-supply: - description: - The input supply for DCDC_REG1. - - vcc2-supply: - description: - The input supply for DCDC_REG2. - - vcc3-supply: - description: - The input supply for DCDC_REG3. - - vcc4-supply: - description: - The input supply for DCDC_REG4. - - vcc5-supply: - description: - The input supply for LDO_REG1, LDO_REG2, and LDO_REG3. - - vcc6-supply: - description: - The input supply for LDO_REG4, LDO_REG5, and LDO_REG6. - - vcc7-supply: - description: - The input supply for LDO_REG7, LDO_REG8, and LDO_REG9. - - vcc8-supply: - description: - The input supply for SWITCH_REG1. - - vcc9-supply: - description: - The input supply for DCDC_REG5 and SWITCH_REG2. - - regulators: - type: object - patternProperties: - "^(LDO_REG[1-9]|DCDC_REG[1-5]|SWITCH_REG[1-2])$": - type: object - $ref: /schemas/regulator/regulator.yaml# - unevaluatedProperties: false - unevaluatedProperties: false - -allOf: - - if: - properties: - '#clock-cells': - const: 0 - - then: - properties: - clock-output-names: - maxItems: 1 - - else: - properties: - clock-output-names: - maxItems: 2 - -required: - - compatible - - reg - - interrupts - - "#clock-cells" - -additionalProperties: false - -examples: - - | - #include - #include - #include - i2c { - #address-cells = <1>; - #size-cells = <0>; - - rk808: pmic@1b { - compatible = "rockchip,rk808"; - reg = <0x1b>; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk808-clkout2"; - interrupt-parent = <&gpio3>; - interrupts = <10 IRQ_TYPE_LEVEL_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l_pin>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc_sysin>; - vcc2-supply = <&vcc_sysin>; - vcc3-supply = <&vcc_sysin>; - vcc4-supply = <&vcc_sysin>; - vcc6-supply = <&vcc_sysin>; - vcc7-supply = <&vcc_sysin>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc_sysin>; - vcc10-supply = <&vcc_sysin>; - vcc11-supply = <&vcc_sysin>; - vcc12-supply = <&vcc3v3_sys>; - - regulators { - vdd_center: DCDC_REG1 { - regulator-name = "vdd_center"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_cpu_l: DCDC_REG2 { - regulator-name = "vdd_cpu_l"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <750000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_1v8: vcc_wl: DCDC_REG4 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc1v8_pmupll: LDO_REG3 { - regulator-name = "vcc1v8_pmupll"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc_sdio: LDO_REG4 { - regulator-name = "vcc_sdio"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3000000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcca3v0_codec: LDO_REG5 { - regulator-name = "vcca3v0_codec"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v5: LDO_REG6 { - regulator-name = "vcc_1v5"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1500000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1500000>; - }; - }; - - vcca1v8_codec: LDO_REG7 { - regulator-name = "vcca1v8_codec"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v0: LDO_REG8 { - regulator-name = "vcc_3v0"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3000000>; - }; - }; - - vcc3v3_s3: SWITCH_REG1 { - regulator-name = "vcc3v3_s3"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_s0: SWITCH_REG2 { - regulator-name = "vcc3v3_s0"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/mfd/rockchip,rk817.yaml b/Documentation/devicetree/bindings/mfd/rockchip,rk817.yaml index d70b4307ac77..2cb6d176a84c 100644 --- a/Documentation/devicetree/bindings/mfd/rockchip,rk817.yaml +++ b/Documentation/devicetree/bindings/mfd/rockchip,rk817.yaml @@ -4,20 +4,21 @@ $id: http://devicetree.org/schemas/mfd/rockchip,rk817.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: RK817 Power Management Integrated Circuit +title: RK809/RK817 Power Management Integrated Circuit maintainers: - Chris Zhong - Zhang Qing description: | - Rockchip RK817 series PMIC. This device consists of an i2c controlled MFD - that includes regulators, an RTC, a power button, an audio codec, and a - battery charger manager. + Rockchip RK809/RK817 series PMIC. This device consists of an i2c controlled + MFD that includes regulators, an RTC, a power button and an audio codec. + The RK817 variant also provides a battery charger manager. properties: compatible: enum: + - rockchip,rk809 - rockchip,rk817 reg: @@ -89,20 +90,20 @@ properties: vcc8-supply: description: - The input supply for BOOST. + The input supply for BOOST on RK817, or for SWITCH_REG2 on RK809. vcc9-supply: description: - The input supply for OTG_SWITCH. + The input supply for OTG_SWITCH on RK817, + or for DCDC_REG5 and SWITCH_REG1 on RK809. regulators: type: object patternProperties: - "^(LDO_REG[1-9]|DCDC_REG[1-4]|BOOST|OTG_SWITCH)$": - type: object + "^(LDO_REG[1-9]|DCDC_REG[1-5]|BOOST|OTG_SWITCH|SWITCH_REG[1-2])$": + $ref: /schemas/regulator/regulator.yaml unevaluatedProperties: false - $ref: /schemas/regulator/regulator.yaml# - unevaluatedProperties: false + additionalProperties: false codec: type: object @@ -172,6 +173,22 @@ allOf: clock-output-names: maxItems: 2 + - if: + properties: + compatible: + contains: + const: rockchip,rk817 + then: + properties: + regulators: + patternProperties: + "^(DCDC_REG5|SWITCH_REG[1-2])$": false + else: + properties: + regulators: + patternProperties: + "^(BOOST|OTG_SWITCH)$": false + required: - compatible - reg From f97b0435c8572b16305d68cfc14ddc901878a9e7 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 27 Jun 2024 12:32:22 +0200 Subject: [PATCH 78/87] dt-bindings: mfd: syscon: Split and enforce documenting MFD children Simple syscon nodes can be documented in common syscon.yaml, however devices with simple-mfd compatible, thus with some children, should have their own schema listing these children. Such listing makes the binding specific, allows better validation (so the incorrect child would not appear in the simple-mfd node) and actually enforces repeated rule for simple-mfd devices: "simple-mfd" is only for simple devices, where the children do not depend on the parent. Currently the syscon+simple-mfd binding is quite broad and allows any child or property, thus above rule cannot be enforced. Split the syscon.yaml binding into: 1. Common syscon properties, used potentially by many bindings. 2. Simple syscon devices (NO simple-mfd!). Signed-off-by: Krzysztof Kozlowski Reviewed-by: Conor Dooley Reviewed-by: Rob Herring (Arm) Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20240627-dt-bindings-mfd-syscon-split-v4-6-dc6699a9f3e4@linaro.org Signed-off-by: Lee Jones --- .../bindings/mfd/syscon-common.yaml | 71 +++++ .../devicetree/bindings/mfd/syscon.yaml | 297 +++++++++++------- 2 files changed, 252 insertions(+), 116 deletions(-) create mode 100644 Documentation/devicetree/bindings/mfd/syscon-common.yaml diff --git a/Documentation/devicetree/bindings/mfd/syscon-common.yaml b/Documentation/devicetree/bindings/mfd/syscon-common.yaml new file mode 100644 index 000000000000..451cbad467a3 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/syscon-common.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/syscon-common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: System Controller Registers R/W Common Properties + +description: + System controller node represents a register region containing a set + of miscellaneous registers. The registers are not cohesive enough to + represent as any specific type of device. The typical use-case is + for some other node's driver, or platform-specific code, to acquire + a reference to the syscon node (e.g. by phandle, node path, or + search using a specific compatible value), interrogate the node (or + associated OS driver) to determine the location of the registers, + and access the registers directly. + +maintainers: + - Lee Jones + +select: + properties: + compatible: + contains: + const: syscon + + required: + - compatible + +properties: + compatible: + contains: + const: syscon + minItems: 2 + maxItems: 5 # Should be enough + + reg: + maxItems: 1 + + reg-io-width: + description: + The size (in bytes) of the IO accesses that should be performed + on the device. + enum: [1, 2, 4, 8] + +required: + - compatible + - reg + +allOf: + - if: + properties: + compatible: + contains: + const: simple-mfd + then: + properties: + compatible: + minItems: 3 + maxItems: 5 + +additionalProperties: true + +examples: + - | + syscon: syscon@1c00000 { + compatible = "allwinner,sun8i-h3-system-controller", "syscon"; + reg = <0x01c00000 0x1000>; + }; +... diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 0f6fd1a41dd8..aa1c2608d326 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/mfd/syscon.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: System Controller Registers R/W +title: System Controller Devices description: | System controller node represents a register region containing a set @@ -19,124 +19,198 @@ description: | maintainers: - Lee Jones +# Need a select with all compatibles listed for compatibility with older +# dtschema (<2024.02), so this will not be selected for other schemas having +# syscon fallback. select: properties: compatible: contains: enum: - - syscon - + - al,alpine-sysfabric-servic + - allwinner,sun8i-a83t-system-controller + - allwinner,sun8i-h3-system-controller + - allwinner,sun8i-v3s-system-controller + - allwinner,sun50i-a64-system-controller + - altr,l3regs + - altr,sdr-ctl + - amd,pensando-elba-syscon + - amlogic,meson-mx-assist + - amlogic,meson-mx-bootrom + - amlogic,meson8-analog-top + - amlogic,meson8b-analog-top + - amlogic,meson8-pmu + - amlogic,meson8b-pmu + - apm,xgene-csw + - apm,xgene-efuse + - apm,xgene-mcb + - apm,xgene-rb + - apm,xgene-scu + - atmel,sama5d2-sfrbu + - atmel,sama5d3-nfc-io + - atmel,sama5d3-sfrbu + - atmel,sama5d4-sfrbu + - axis,artpec6-syscon + - brcm,cru-clkset + - brcm,sr-cdru + - brcm,sr-mhb + - cirrus,ep7209-syscon1 + - cirrus,ep7209-syscon2 + - cirrus,ep7209-syscon3 + - cnxt,cx92755-uc + - freecom,fsg-cs2-system-controller + - fsl,imx93-aonmix-ns-syscfg + - fsl,imx93-wakeupmix-syscfg + - fsl,ls1088a-reset + - fsl,vf610-anatop + - fsl,vf610-mscm-cpucfg + - hisilicon,dsa-subctrl + - hisilicon,hi6220-sramctrl + - hisilicon,hip04-ppe + - hisilicon,pcie-sas-subctrl + - hisilicon,peri-subctrl + - hpe,gxp-sysreg + - loongson,ls1b-syscon + - loongson,ls1c-syscon + - lsi,axxia-syscon + - marvell,armada-3700-cpu-misc + - marvell,armada-3700-nb-pm + - marvell,armada-3700-avs + - marvell,armada-3700-usb2-host-misc + - marvell,dove-global-config + - mediatek,mt2701-pctl-a-syscfg + - mediatek,mt2712-pctl-a-syscfg + - mediatek,mt6397-pctl-pmic-syscfg + - mediatek,mt8135-pctl-a-syscfg + - mediatek,mt8135-pctl-b-syscfg + - mediatek,mt8173-pctl-a-syscfg + - mediatek,mt8365-syscfg + - microchip,lan966x-cpu-syscon + - microchip,sam9x60-sfr + - microchip,sama7g5-ddr3phy + - mscc,ocelot-cpu-syscon + - mstar,msc313-pmsleep + - nuvoton,ma35d1-sys + - nuvoton,wpcm450-shm + - rockchip,px30-qos + - rockchip,rk3036-qos + - rockchip,rk3066-qos + - rockchip,rk3128-qos + - rockchip,rk3228-qos + - rockchip,rk3288-qos + - rockchip,rk3368-qos + - rockchip,rk3399-qos + - rockchip,rk3568-qos + - rockchip,rk3588-qos + - rockchip,rv1126-qos + - st,spear1340-misc + - stericsson,nomadik-pmu + - starfive,jh7100-sysmain + - ti,am62-opp-efuse-table + - ti,am62-usb-phy-ctrl + - ti,am625-dss-oldi-io-ctrl + - ti,am62p-cpsw-mac-efuse + - ti,am654-dss-oldi-io-ctrl + - ti,j784s4-pcie-ctrl + - ti,keystone-pllctrl required: - compatible properties: compatible: - anyOf: - - items: - - enum: - - al,alpine-sysfabric-service - - allwinner,sun8i-a83t-system-controller - - allwinner,sun8i-h3-system-controller - - allwinner,sun8i-v3s-system-controller - - allwinner,sun50i-a64-system-controller - - altr,l3regs - - altr,sdr-ctl - - amd,pensando-elba-syscon - - amlogic,meson-mx-assist - - amlogic,meson-mx-bootrom - - amlogic,meson8-analog-top - - amlogic,meson8b-analog-top - - amlogic,meson8-pmu - - amlogic,meson8b-pmu - - apm,xgene-csw - - apm,xgene-efuse - - apm,xgene-mcb - - apm,xgene-rb - - apm,xgene-scu - - atmel,sama5d2-sfrbu - - atmel,sama5d3-nfc-io - - atmel,sama5d3-sfrbu - - atmel,sama5d4-sfrbu - - axis,artpec6-syscon - - brcm,cru-clkset - - brcm,sr-cdru - - brcm,sr-mhb - - cirrus,ep7209-syscon1 - - cirrus,ep7209-syscon2 - - cirrus,ep7209-syscon3 - - cnxt,cx92755-uc - - freecom,fsg-cs2-system-controller - - fsl,imx93-aonmix-ns-syscfg - - fsl,imx93-wakeupmix-syscfg - - fsl,ls1088a-reset - - fsl,vf610-anatop - - fsl,vf610-mscm-cpucfg - - hisilicon,dsa-subctrl - - hisilicon,hi6220-sramctrl - - hisilicon,hip04-ppe - - hisilicon,pcie-sas-subctrl - - hisilicon,peri-subctrl - - hpe,gxp-sysreg - - loongson,ls1b-syscon - - loongson,ls1c-syscon - - lsi,axxia-syscon - - marvell,armada-3700-cpu-misc - - marvell,armada-3700-nb-pm - - marvell,armada-3700-avs - - marvell,armada-3700-usb2-host-misc - - marvell,dove-global-config - - mediatek,mt2701-pctl-a-syscfg - - mediatek,mt2712-pctl-a-syscfg - - mediatek,mt6397-pctl-pmic-syscfg - - mediatek,mt8135-pctl-a-syscfg - - mediatek,mt8135-pctl-b-syscfg - - mediatek,mt8173-pctl-a-syscfg - - mediatek,mt8365-syscfg - - microchip,lan966x-cpu-syscon - - microchip,sam9x60-sfr - - microchip,sama7g5-ddr3phy - - mscc,ocelot-cpu-syscon - - mstar,msc313-pmsleep - - nuvoton,ma35d1-sys - - nuvoton,wpcm450-shm - - rockchip,px30-qos - - rockchip,rk3036-qos - - rockchip,rk3066-qos - - rockchip,rk3128-qos - - rockchip,rk3228-qos - - rockchip,rk3288-qos - - rockchip,rk3368-qos - - rockchip,rk3399-qos - - rockchip,rk3568-qos - - rockchip,rk3588-qos - - rockchip,rv1126-qos - - st,spear1340-misc - - stericsson,nomadik-pmu - - starfive,jh7100-sysmain - - ti,am62-opp-efuse-table - - ti,am62-usb-phy-ctrl - - ti,am625-dss-oldi-io-ctrl - - ti,am62p-cpsw-mac-efuse - - ti,am654-dss-oldi-io-ctrl - - ti,j784s4-pcie-ctrl - - ti,keystone-pllctrl - - - const: syscon - - - contains: - const: syscon - minItems: 2 - maxItems: 5 # Should be enough + items: + - enum: + - al,alpine-sysfabric-service + - allwinner,sun8i-a83t-system-controller + - allwinner,sun8i-h3-system-controller + - allwinner,sun8i-v3s-system-controller + - allwinner,sun50i-a64-system-controller + - altr,l3regs + - altr,sdr-ctl + - amd,pensando-elba-syscon + - amlogic,meson-mx-assist + - amlogic,meson-mx-bootrom + - amlogic,meson8-analog-top + - amlogic,meson8b-analog-top + - amlogic,meson8-pmu + - amlogic,meson8b-pmu + - apm,xgene-csw + - apm,xgene-efuse + - apm,xgene-mcb + - apm,xgene-rb + - apm,xgene-scu + - atmel,sama5d2-sfrbu + - atmel,sama5d3-nfc-io + - atmel,sama5d3-sfrbu + - atmel,sama5d4-sfrbu + - axis,artpec6-syscon + - brcm,cru-clkset + - brcm,sr-cdru + - brcm,sr-mhb + - cirrus,ep7209-syscon1 + - cirrus,ep7209-syscon2 + - cirrus,ep7209-syscon3 + - cnxt,cx92755-uc + - freecom,fsg-cs2-system-controller + - fsl,imx93-aonmix-ns-syscfg + - fsl,imx93-wakeupmix-syscfg + - fsl,ls1088a-reset + - fsl,vf610-anatop + - fsl,vf610-mscm-cpucfg + - hisilicon,dsa-subctrl + - hisilicon,hi6220-sramctrl + - hisilicon,hip04-ppe + - hisilicon,pcie-sas-subctrl + - hisilicon,peri-subctrl + - hpe,gxp-sysreg + - loongson,ls1b-syscon + - loongson,ls1c-syscon + - lsi,axxia-syscon + - marvell,armada-3700-cpu-misc + - marvell,armada-3700-nb-pm + - marvell,armada-3700-avs + - marvell,armada-3700-usb2-host-misc + - marvell,dove-global-config + - mediatek,mt2701-pctl-a-syscfg + - mediatek,mt2712-pctl-a-syscfg + - mediatek,mt6397-pctl-pmic-syscfg + - mediatek,mt8135-pctl-a-syscfg + - mediatek,mt8135-pctl-b-syscfg + - mediatek,mt8173-pctl-a-syscfg + - mediatek,mt8365-syscfg + - microchip,lan966x-cpu-syscon + - microchip,sam9x60-sfr + - microchip,sama7g5-ddr3phy + - mscc,ocelot-cpu-syscon + - mstar,msc313-pmsleep + - nuvoton,ma35d1-sys + - nuvoton,wpcm450-shm + - rockchip,px30-qos + - rockchip,rk3036-qos + - rockchip,rk3066-qos + - rockchip,rk3128-qos + - rockchip,rk3228-qos + - rockchip,rk3288-qos + - rockchip,rk3368-qos + - rockchip,rk3399-qos + - rockchip,rk3568-qos + - rockchip,rk3588-qos + - rockchip,rv1126-qos + - st,spear1340-misc + - stericsson,nomadik-pmu + - starfive,jh7100-sysmain + - ti,am62-opp-efuse-table + - ti,am62-usb-phy-ctrl + - ti,am625-dss-oldi-io-ctrl + - ti,am62p-cpsw-mac-efuse + - ti,am654-dss-oldi-io-ctrl + - ti,j784s4-pcie-ctrl + - ti,keystone-pllctrl + - const: syscon reg: maxItems: 1 - reg-io-width: - description: | - The size (in bytes) of the IO accesses that should be performed - on the device. - enum: [1, 2, 4, 8] - resets: maxItems: 1 @@ -145,18 +219,9 @@ required: - reg allOf: - - if: - properties: - compatible: - contains: - const: simple-mfd - then: - properties: - compatible: - minItems: 3 - maxItems: 5 + - $ref: syscon-common.yaml# -additionalProperties: true +unevaluatedProperties: false examples: - | From 75c3d85083ff27bcaaa748cc3acf951f14d18ab6 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 27 Jun 2024 12:32:23 +0200 Subject: [PATCH 79/87] dt-bindings: mfd: syscon: Add APM poweroff mailbox Add compatible for an already used syscon poweroff/mailbox block in APM. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20240627-dt-bindings-mfd-syscon-split-v4-7-dc6699a9f3e4@linaro.org Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/syscon.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index aa1c2608d326..9dc594ea3654 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -41,6 +41,8 @@ select: - amlogic,meson8b-analog-top - amlogic,meson8-pmu - amlogic,meson8b-pmu + - apm,merlin-poweroff-mailbox + - apm,mustang-poweroff-mailbox - apm,xgene-csw - apm,xgene-efuse - apm,xgene-mcb @@ -134,6 +136,8 @@ properties: - amlogic,meson8b-analog-top - amlogic,meson8-pmu - amlogic,meson8b-pmu + - apm,merlin-poweroff-mailbox + - apm,mustang-poweroff-mailbox - apm,xgene-csw - apm,xgene-efuse - apm,xgene-mcb From 8b6742e5b31e213412d8a5a1b745ca03c6fd8409 Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Mon, 1 Jul 2024 10:56:49 +0300 Subject: [PATCH 80/87] watchdog: bd96801_wdt: Add missing include for FIELD_*() The FIELD_PREP() and FIELD_GET() macros are defined in the linux/bitfield.h. Include this header to avoid missing the macro definitions. Signed-off-by: Matti Vaittinen Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202406300817.hcJ9VtLf-lkp@intel.com/ Acked-by: Guenter Roeck Link: https://lore.kernel.org/r/ZoJhQVF-U6sSJ_Sg@fedora Signed-off-by: Lee Jones --- drivers/watchdog/bd96801_wdt.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/watchdog/bd96801_wdt.c b/drivers/watchdog/bd96801_wdt.c index ff51f42ced2a..12b74fd2bc05 100644 --- a/drivers/watchdog/bd96801_wdt.c +++ b/drivers/watchdog/bd96801_wdt.c @@ -5,6 +5,7 @@ * ROHM BD96801 watchdog driver */ +#include #include #include #include From ef6dfcbcbbf7d9a414feb44aa093d2d8592a2e20 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Tue, 13 Feb 2024 23:02:20 +0100 Subject: [PATCH 81/87] mfd: tmio: Remove obsolete platform_data With commit 8971bb812e3c ("mfd: remove toshiba tmio drivers"), all users of platform data for NAND and framebuffers are gone. So, remove definitions from the header, too. Signed-off-by: Wolfram Sang Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20240213220221.2380-9-wsa+renesas@sang-engineering.com Signed-off-by: Lee Jones --- include/linux/mfd/tmio.h | 27 --------------------------- 1 file changed, 27 deletions(-) diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h index eace8ea6cda0..bc53323293a3 100644 --- a/include/linux/mfd/tmio.h +++ b/include/linux/mfd/tmio.h @@ -103,31 +103,4 @@ struct tmio_mmc_data { void (*set_pwr)(struct platform_device *host, int state); void (*set_clk_div)(struct platform_device *host, int state); }; - -/* - * data for the NAND controller - */ -struct tmio_nand_data { - struct nand_bbt_descr *badblock_pattern; - struct mtd_partition *partition; - unsigned int num_partitions; - const char *const *part_parsers; -}; - -#define FBIO_TMIO_ACC_WRITE 0x7C639300 -#define FBIO_TMIO_ACC_SYNC 0x7C639301 - -struct tmio_fb_data { - int (*lcd_set_power)(struct platform_device *fb_dev, - bool on); - int (*lcd_mode)(struct platform_device *fb_dev, - const struct fb_videomode *mode); - int num_modes; - struct fb_videomode *modes; - - /* in mm: size of screen */ - int height; - int width; -}; - #endif From 6bec678b9872271ce2e0879c360ad7a1a524c7fa Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Tue, 13 Feb 2024 23:02:21 +0100 Subject: [PATCH 82/87] mfd: tmio: Remove obsolete io accessors Since commit 568494db6809 ("mtd: remove tmio_nand driver") and commit aceae7848624 ("fbdev: remove tmiofb driver"), these accessors have no users anymore. Remove them. Signed-off-by: Wolfram Sang Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20240213220221.2380-10-wsa+renesas@sang-engineering.com Signed-off-by: Lee Jones --- include/linux/mfd/tmio.h | 25 ------------------------- 1 file changed, 25 deletions(-) diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h index bc53323293a3..4223315d2b2a 100644 --- a/include/linux/mfd/tmio.h +++ b/include/linux/mfd/tmio.h @@ -10,31 +10,6 @@ #include #include -#define tmio_ioread8(addr) readb(addr) -#define tmio_ioread16(addr) readw(addr) -#define tmio_ioread16_rep(r, b, l) readsw(r, b, l) -#define tmio_ioread32(addr) \ - (((u32)readw((addr))) | (((u32)readw((addr) + 2)) << 16)) - -#define tmio_iowrite8(val, addr) writeb((val), (addr)) -#define tmio_iowrite16(val, addr) writew((val), (addr)) -#define tmio_iowrite16_rep(r, b, l) writesw(r, b, l) -#define tmio_iowrite32(val, addr) \ - do { \ - writew((val), (addr)); \ - writew((val) >> 16, (addr) + 2); \ - } while (0) - -#define sd_config_write8(base, shift, reg, val) \ - tmio_iowrite8((val), (base) + ((reg) << (shift))) -#define sd_config_write16(base, shift, reg, val) \ - tmio_iowrite16((val), (base) + ((reg) << (shift))) -#define sd_config_write32(base, shift, reg, val) \ - do { \ - tmio_iowrite16((val), (base) + ((reg) << (shift))); \ - tmio_iowrite16((val) >> 16, (base) + ((reg + 2) << (shift))); \ - } while (0) - /* tmio MMC platform flags */ /* * Some controllers can support a 2-byte block size when the bus width From 4377aef83d0db25efc928a633ee80698b8520c8e Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Tue, 13 Feb 2024 23:02:22 +0100 Subject: [PATCH 83/87] mmc: tmio/sdhi: Fix includes TMIO uses an of_* function, and SDHI uses pm_runtime functions. Add the includes directly, so we can clean up another header properly. Sort the pagemap include while we are here. Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202402070323.JpYfFtkQ-lkp@intel.com/ Signed-off-by: Wolfram Sang Acked-by: Ulf Hansson Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20240213220221.2380-11-wsa+renesas@sang-engineering.com Signed-off-by: Lee Jones --- drivers/mmc/host/renesas_sdhi_internal_dmac.c | 3 ++- drivers/mmc/host/renesas_sdhi_sys_dmac.c | 3 ++- drivers/mmc/host/tmio_mmc_core.c | 1 + 3 files changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c b/drivers/mmc/host/renesas_sdhi_internal_dmac.c index 422fa63a2e99..e8c3fb0fb5c2 100644 --- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c +++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c @@ -16,8 +16,9 @@ #include #include #include -#include #include +#include +#include #include #include diff --git a/drivers/mmc/host/renesas_sdhi_sys_dmac.c b/drivers/mmc/host/renesas_sdhi_sys_dmac.c index 9cf7f9feab72..c18581897f8a 100644 --- a/drivers/mmc/host/renesas_sdhi_sys_dmac.c +++ b/drivers/mmc/host/renesas_sdhi_sys_dmac.c @@ -16,8 +16,9 @@ #include #include #include -#include #include +#include +#include #include #include diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c index 93e912afd3ae..73b0bd692fe0 100644 --- a/drivers/mmc/host/tmio_mmc_core.c +++ b/drivers/mmc/host/tmio_mmc_core.c @@ -37,6 +37,7 @@ #include #include #include +#include #include #include #include From d411ccbe103d665a31861987e2f1b36944ab63f2 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Tue, 13 Feb 2024 23:02:23 +0100 Subject: [PATCH 84/87] mfd: tmio: Update include files Remove meanwhile unneeded includes, only add types.h for dma_addr_t. Also, remove an obsolete forward declaration while here. Signed-off-by: Wolfram Sang Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20240213220221.2380-12-wsa+renesas@sang-engineering.com Signed-off-by: Lee Jones --- include/linux/mfd/tmio.h | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h index 4223315d2b2a..f71d4e507dcb 100644 --- a/include/linux/mfd/tmio.h +++ b/include/linux/mfd/tmio.h @@ -2,13 +2,8 @@ #ifndef MFD_TMIO_H #define MFD_TMIO_H -#include -#include -#include -#include -#include #include -#include +#include /* tmio MMC platform flags */ /* @@ -59,8 +54,6 @@ /* Some controllers have a CBSY bit */ #define TMIO_MMC_HAVE_CBSY BIT(11) -struct dma_chan; - /* * data for the MMC controller */ From 763135b819ad3e3e0301b66094d50923e64092a7 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Tue, 13 Feb 2024 23:02:24 +0100 Subject: [PATCH 85/87] mfd: tmio: Sanitize comments Reformat the comments to utilize the maximum line length and use single line comments where appropriate. Remove superfluous comments, too. Signed-off-by: Wolfram Sang Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20240213220221.2380-13-wsa+renesas@sang-engineering.com Signed-off-by: Lee Jones --- include/linux/mfd/tmio.h | 32 +++++++++++--------------------- 1 file changed, 11 insertions(+), 21 deletions(-) diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h index f71d4e507dcb..1cf418643da9 100644 --- a/include/linux/mfd/tmio.h +++ b/include/linux/mfd/tmio.h @@ -5,23 +5,23 @@ #include #include -/* tmio MMC platform flags */ +/* TMIO MMC platform flags */ + /* - * Some controllers can support a 2-byte block size when the bus width - * is configured in 4-bit mode. + * Some controllers can support a 2-byte block size when the bus width is + * configured in 4-bit mode. */ #define TMIO_MMC_BLKSZ_2BYTES BIT(1) -/* - * Some controllers can support SDIO IRQ signalling. - */ + +/* Some controllers can support SDIO IRQ signalling */ #define TMIO_MMC_SDIO_IRQ BIT(2) /* Some features are only available or tested on R-Car Gen2 or later */ #define TMIO_MMC_MIN_RCAR2 BIT(3) /* - * Some controllers require waiting for the SD bus to become - * idle before writing to some registers. + * Some controllers require waiting for the SD bus to become idle before + * writing to some registers. */ #define TMIO_MMC_HAS_IDLE_WAIT BIT(4) @@ -32,31 +32,21 @@ */ #define TMIO_MMC_USE_BUSY_TIMEOUT BIT(5) -/* - * Some controllers have CMD12 automatically - * issue/non-issue register - */ +/* Some controllers have CMD12 automatically issue/non-issue register */ #define TMIO_MMC_HAVE_CMD12_CTRL BIT(7) /* Controller has some SDIO status bits which must be 1 */ #define TMIO_MMC_SDIO_STATUS_SETBITS BIT(8) -/* - * Some controllers have a 32-bit wide data port register - */ +/* Some controllers have a 32-bit wide data port register */ #define TMIO_MMC_32BIT_DATA_PORT BIT(9) -/* - * Some controllers allows to set SDx actual clock - */ +/* Some controllers allows to set SDx actual clock */ #define TMIO_MMC_CLK_ACTUAL BIT(10) /* Some controllers have a CBSY bit */ #define TMIO_MMC_HAVE_CBSY BIT(11) -/* - * data for the MMC controller - */ struct tmio_mmc_data { void *chan_priv_tx; void *chan_priv_rx; From 70b46487b1558eb25ea6e533c905131b10596dc0 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Tue, 13 Feb 2024 23:02:25 +0100 Subject: [PATCH 86/87] mfd: tmio: Move header to platform_data All the MFD components are gone from the header meanwhile. Only the MMC relevant data is left which makes it a platform_data for the MMC controller. Move the header to the now fitting directory. Signed-off-by: Wolfram Sang Acked-by: Ulf Hansson # For MMC Acked-by: John Paul Adrian Glaubitz Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20240213220221.2380-14-wsa+renesas@sang-engineering.com Signed-off-by: Lee Jones --- MAINTAINERS | 2 +- arch/sh/boards/board-sh7757lcr.c | 2 +- arch/sh/boards/mach-ap325rxa/setup.c | 2 +- arch/sh/boards/mach-ecovec24/setup.c | 2 +- arch/sh/boards/mach-kfr2r09/setup.c | 2 +- arch/sh/boards/mach-migor/setup.c | 2 +- arch/sh/boards/mach-se/7724/setup.c | 2 +- drivers/mmc/host/renesas_sdhi_core.c | 2 +- drivers/mmc/host/renesas_sdhi_internal_dmac.c | 2 +- drivers/mmc/host/renesas_sdhi_sys_dmac.c | 2 +- drivers/mmc/host/tmio_mmc_core.c | 2 +- drivers/mmc/host/uniphier-sd.c | 2 +- include/linux/{mfd => platform_data}/tmio.h | 0 13 files changed, 12 insertions(+), 12 deletions(-) rename include/linux/{mfd => platform_data}/tmio.h (100%) diff --git a/MAINTAINERS b/MAINTAINERS index 17af347464d2..5d13fe1a9187 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -22685,7 +22685,7 @@ L: linux-renesas-soc@vger.kernel.org S: Supported F: drivers/mmc/host/renesas_sdhi* F: drivers/mmc/host/tmio_mmc* -F: include/linux/mfd/tmio.h +F: include/linux/platform_data/tmio.h TMP513 HARDWARE MONITOR DRIVER M: Eric Tremblay diff --git a/arch/sh/boards/board-sh7757lcr.c b/arch/sh/boards/board-sh7757lcr.c index 689ea14a6678..bca54e489e11 100644 --- a/arch/sh/boards/board-sh7757lcr.c +++ b/arch/sh/boards/board-sh7757lcr.c @@ -14,9 +14,9 @@ #include #include #include -#include #include #include +#include #include #include #include diff --git a/arch/sh/boards/mach-ap325rxa/setup.c b/arch/sh/boards/mach-ap325rxa/setup.c index 645cccf3da88..bb5004a8ac02 100644 --- a/arch/sh/boards/mach-ap325rxa/setup.c +++ b/arch/sh/boards/mach-ap325rxa/setup.c @@ -24,10 +24,10 @@ #include #include #include -#include #include #include #include +#include #include #include #include diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c index 30d117f9ad7e..6f13557eecd6 100644 --- a/arch/sh/boards/mach-ecovec24/setup.c +++ b/arch/sh/boards/mach-ecovec24/setup.c @@ -17,13 +17,13 @@ #include #include #include -#include #include #include #include #include #include #include +#include #include #include #include diff --git a/arch/sh/boards/mach-kfr2r09/setup.c b/arch/sh/boards/mach-kfr2r09/setup.c index 6b775eae85c0..70236859919d 100644 --- a/arch/sh/boards/mach-kfr2r09/setup.c +++ b/arch/sh/boards/mach-kfr2r09/setup.c @@ -22,10 +22,10 @@ #include #include #include -#include #include #include #include +#include #include #include #include diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c index 773ee767d0c4..1853e6319a66 100644 --- a/arch/sh/boards/mach-migor/setup.c +++ b/arch/sh/boards/mach-migor/setup.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -14,7 +15,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c index 787ddd3c627a..e500feb91053 100644 --- a/arch/sh/boards/mach-se/7724/setup.c +++ b/arch/sh/boards/mach-se/7724/setup.c @@ -21,9 +21,9 @@ #include #include #include -#include #include #include +#include #include #include #include diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c index 12f4faaaf4ee..d9503f9f6e96 100644 --- a/drivers/mmc/host/renesas_sdhi_core.c +++ b/drivers/mmc/host/renesas_sdhi_core.c @@ -22,13 +22,13 @@ #include #include #include -#include #include #include #include #include #include #include +#include #include #include #include diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c b/drivers/mmc/host/renesas_sdhi_internal_dmac.c index e8c3fb0fb5c2..4a02ef7fde4d 100644 --- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c +++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c @@ -11,12 +11,12 @@ #include #include #include -#include #include #include #include #include #include +#include #include #include #include diff --git a/drivers/mmc/host/renesas_sdhi_sys_dmac.c b/drivers/mmc/host/renesas_sdhi_sys_dmac.c index c18581897f8a..68e31c37cce6 100644 --- a/drivers/mmc/host/renesas_sdhi_sys_dmac.c +++ b/drivers/mmc/host/renesas_sdhi_sys_dmac.c @@ -11,12 +11,12 @@ #include #include #include -#include #include #include #include #include #include +#include #include #include #include diff --git a/drivers/mmc/host/tmio_mmc_core.c b/drivers/mmc/host/tmio_mmc_core.c index 73b0bd692fe0..592506d83e2c 100644 --- a/drivers/mmc/host/tmio_mmc_core.c +++ b/drivers/mmc/host/tmio_mmc_core.c @@ -31,7 +31,6 @@ #include #include #include -#include #include #include #include @@ -39,6 +38,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/mmc/host/uniphier-sd.c b/drivers/mmc/host/uniphier-sd.c index 1404989e6151..bd231dbe90ba 100644 --- a/drivers/mmc/host/uniphier-sd.c +++ b/drivers/mmc/host/uniphier-sd.c @@ -9,11 +9,11 @@ #include #include #include -#include #include #include #include #include +#include #include #include #include diff --git a/include/linux/mfd/tmio.h b/include/linux/platform_data/tmio.h similarity index 100% rename from include/linux/mfd/tmio.h rename to include/linux/platform_data/tmio.h From c298391abf6505c4040632b310a14f6bd9b7afff Mon Sep 17 00:00:00 2001 From: Dmitry Torokhov Date: Wed, 3 Jul 2024 12:05:23 -0700 Subject: [PATCH 87/87] mfd: timberdale: Attach device properties to TSC2007 board info Switch over to using software nodes/properties to describe the touchscreen instead of using the legacy platform data. This will allow to drop support for the platform data from TSC2007 driver and rely solely on the generic driver properties. Note: "model" is not part of defined device properties and is not used by the TSC2007 driver, so it can be safely dropped. Signed-off-by: Dmitry Torokhov Link: https://lore.kernel.org/r/ZoWg89A8C4gylTGX@google.com Signed-off-by: Lee Jones --- drivers/mfd/timberdale.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/mfd/timberdale.c b/drivers/mfd/timberdale.c index 333d5b874de3..b059713db875 100644 --- a/drivers/mfd/timberdale.c +++ b/drivers/mfd/timberdale.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include @@ -25,7 +26,6 @@ #include #include -#include #include #include @@ -49,16 +49,21 @@ struct timberdale_device { /*--------------------------------------------------------------------------*/ -static struct tsc2007_platform_data timberdale_tsc2007_platform_data = { - .model = 2003, - .x_plate_ohms = 100 +static const struct property_entry timberdale_tsc2007_properties[] = { + PROPERTY_ENTRY_U32("ti,x-plate-ohms", 100), + { } +}; + +static const struct software_node timberdale_tsc2007_node = { + .name = "tsc2007", + .properties = timberdale_tsc2007_properties, }; static struct i2c_board_info timberdale_i2c_board_info[] = { { I2C_BOARD_INFO("tsc2007", 0x48), - .platform_data = &timberdale_tsc2007_platform_data, - .irq = IRQ_TIMBERDALE_TSC_INT + .irq = IRQ_TIMBERDALE_TSC_INT, + .swnode = &timberdale_tsc2007_node, }, };