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dt-bindings: Fix typo in comment
Fix typo in the comment Signed-off-by: Slark Xiao <slark_xiao@163.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220721011746.19663-1-slark_xiao@163.com
This commit is contained in:
Slark Xiao
Rob Herring
parent
fce43d8f75
commit
12e5bde18d
@ -10,7 +10,7 @@ system, notifying them when a low power state is entered or exited.
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Multiple revisions of the SAW hardware are supported using these Device Nodes.
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SAW2 revisions differ in the register offset and configuration data. Also, the
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same revision of the SAW in different SoCs may have different configuration
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data due the the differences in hardware capabilities. Hence the SoC name, the
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data due the differences in hardware capabilities. Hence the SoC name, the
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version of the SAW hardware in that SoC and the distinction between cpu (big
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or Little) or cache, may be needed to uniquely identify the SAW register
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configuration and initialization data. The compatible string is used to
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@ -15,7 +15,7 @@ Required properties:
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- for "ti,da850-pll1", shall be "clksrc"
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Optional properties:
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- ti,clkmode-square-wave: Indicates that the the board is supplying a square
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- ti,clkmode-square-wave: Indicates that the board is supplying a square
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wave input on the OSCIN pin instead of using a crystal oscillator.
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This property is only valid when compatible = "ti,da850-pll0".
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@ -330,7 +330,7 @@ succeeded.
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The Device Tree Overlay will contain:
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* "target-path" or "target"
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The insertion point where the the contents of the overlay will go into the
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The insertion point where the contents of the overlay will go into the
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live tree. target-path is a full path, while target is a phandle.
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* "ranges"
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The address space mapping from processor to FPGA bus(ses).
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@ -14,7 +14,7 @@ Optional properties:
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- ngpios : Number of used GPIO lines (0..n-1), default is 8.
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- load-gpios : GPIO pin specifier attached to load enable, this
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pin is pulsed before reading from the device to
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load input pin values into the the device.
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load input pin values into the device.
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For other required and optional properties of SPI slave
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nodes please refer to ../spi/spi-bus.txt.
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@ -14,7 +14,7 @@ MAC node:
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- mac-address : The 6-byte MAC address. If present, it is the default
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MAC address.
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- internal-phy : phandle to the internal PHY node
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- phy-handle : phandle the the external PHY node
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- phy-handle : phandle the external PHY node
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Internal PHY node:
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- compatible : Should be "qcom,fsm9900-emac-sgmii" or "qcom,qdf2432-emac-sgmii".
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@ -16,7 +16,7 @@ description: |+
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- compatible: Should be the following:
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"amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon"
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Refer to the the bindings described in
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Refer to the bindings described in
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Documentation/devicetree/bindings/mfd/syscon.yaml
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properties:
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@ -16,7 +16,7 @@ description: |+
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- compatible: Should be one of the following:
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"aspeed,ast2400-scu", "syscon", "simple-mfd"
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Refer to the the bindings described in
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Refer to the bindings described in
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Documentation/devicetree/bindings/mfd/syscon.yaml
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properties:
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@ -17,7 +17,7 @@ description: |+
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"aspeed,ast2500-scu", "syscon", "simple-mfd"
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"aspeed,g5-scu", "syscon", "simple-mfd"
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Refer to the the bindings described in
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Refer to the bindings described in
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Documentation/devicetree/bindings/mfd/syscon.yaml
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properties:
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@ -16,7 +16,7 @@ description: |+
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- compatible: Should be one of the following:
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"aspeed,ast2600-scu", "syscon", "simple-mfd"
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Refer to the the bindings described in
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Refer to the bindings described in
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Documentation/devicetree/bindings/mfd/syscon.yaml
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properties:
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@ -17,7 +17,7 @@ description: |+
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- compatible: Should be the following:
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"amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon"
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Refer to the the bindings described in
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Refer to the bindings described in
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Documentation/devicetree/bindings/mfd/syscon.yaml
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properties:
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@ -5,7 +5,7 @@ Copyright 2013 Freescale Semiconductor Inc.
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Power Architecture CPUs in Freescale SOCs are represented in device trees as
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per the definition in the Devicetree Specification.
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In addition to the the Devicetree Specification definitions, the properties
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In addition to the Devicetree Specification definitions, the properties
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defined below may be present on CPU nodes.
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PROPERTIES
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@ -39,7 +39,7 @@ otherwise. The length of all the property arrays must be the same.
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- ibm,cpu-idle-state-flags:
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Array of unsigned 32-bit values containing the values of the
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flags associated with the the aforementioned idle-states. The
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flags associated with the aforementioned idle-states. The
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flag bits are as follows:
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0x00000001 /* Decrementer would stop */
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0x00000002 /* Needs timebase restore */
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@ -37,7 +37,7 @@ on the Qualcomm Hexagon core.
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- interrupt-names:
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Usage: required
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Value type: <stringlist>
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Definition: The interrupts needed depends on the the compatible
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Definition: The interrupts needed depends on the compatible
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string:
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qcom,q6v5-pil:
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qcom,ipq8074-wcss-pil:
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@ -68,9 +68,9 @@ properties:
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array is defined as <PDMIN1 PDMIN2 PDMIN3 PDMIN4>.
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0 - (default) Odd channel is latched on the negative edge and even
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channel is latched on the the positive edge.
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channel is latched on the positive edge.
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1 - Odd channel is latched on the positive edge and even channel is
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latched on the the negative edge.
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latched on the negative edge.
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PDMIN1 - PDMCLK latching edge used for channel 1 and 2 data
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PDMIN2 - PDMCLK latching edge used for channel 3 and 4 data
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@ -16,7 +16,7 @@ description: |+
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- compatible: Should be one of the following:
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"brcm,bcm2711-avs-monitor", "syscon", "simple-mfd"
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Refer to the the bindings described in
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Refer to the bindings described in
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Documentation/devicetree/bindings/mfd/syscon.yaml
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properties:
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@ -96,7 +96,7 @@ critical trip point is reported back to the thermal framework to implement
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software shutdown.
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- the "hot" type trip points will be set to SOC_THERM hardware as the throttle
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temperature. Once the the temperature of this thermal zone is higher
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temperature. Once the temperature of this thermal zone is higher
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than it, it will trigger the HW throttle event.
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Example :
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@ -42,7 +42,7 @@ properties:
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description:
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Address ranges of the thermal registers. If more then one range is given
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the first one must be the common registers followed by each sensor
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according the the datasheet.
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according the datasheet.
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minItems: 1
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maxItems: 4
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