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dt-bindings: pinctrl: Add thead,th1520-pinctrl bindings
Add bindings for the pin controllers on the T-Head TH1520 RISC-V SoC. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Tested-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com> Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> [dfustini: add thead,pad-group to select the pin controller instance] Signed-off-by: Drew Fustini <dfustini@tenstorrent.com> Link: https://lore.kernel.org/20240930-th1520-pinctrl-v3-1-32cea2bdbecb@tenstorrent.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Emil Renner Berthing
Linus Walleij
parent
9852d85ec9
commit
137ca342ae
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/thead,th1520-pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: T-Head TH1520 SoC pin controller
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maintainers:
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- Emil Renner Berthing <emil.renner.berthing@canonical.com>
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description: |
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Pinmux and pinconf controller in the T-Head TH1520 RISC-V SoC.
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The TH1520 has 3 groups of pads each controlled from different memory ranges.
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Confusingly the memory ranges are named
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PADCTRL_AOSYS -> PAD Group 1
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PADCTRL1_APSYS -> PAD Group 2
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PADCTRL0_APSYS -> PAD Group 3
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Each pad can be muxed individually to up to 6 different functions. For most
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pads only a few of those 6 configurations are valid though, and a few pads in
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group 1 does not support muxing at all.
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Pinconf is fairly regular except for a few pads in group 1 that either can't
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be configured or has some special functions. The rest have configurable drive
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strength, input enable, schmitt trigger, slew rate, pull-up and pull-down in
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addition to a special strong pull up.
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Certain pads in group 1 can be muxed to AUDIO_PA0 - AUDIO_PA30 functions and
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are then meant to be used by the audio co-processor. Each such pad can then
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be further muxed to either audio GPIO or one of 4 functions such as UART, I2C
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and I2S. If the audio pad is muxed to one of the 4 functions then pinconf is
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also configured in different registers. All of this is done from a different
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AUDIO_IOCTRL memory range and is left to the audio co-processor for now.
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properties:
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compatible:
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enum:
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- thead,th1520-pinctrl
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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thead,pad-group:
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description: |
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Select the pad group that is associated with the pin controller instance.
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Base Address Name Group
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0xFF_FFF4_A000 PADCTRL_AOSYS 1
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0xFF_E7F3_C000 PADCTRL1_APSYS 2
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0xFF_EC00_7000 PADCTRL0_APSYS 3
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [1, 2, 3]
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required:
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- compatible
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- reg
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- clocks
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patternProperties:
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'-[0-9]+$':
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type: object
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additionalProperties: false
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patternProperties:
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'-pins$':
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type: object
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allOf:
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- $ref: /schemas/pinctrl/pincfg-node.yaml#
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- $ref: /schemas/pinctrl/pinmux-node.yaml#
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additionalProperties: false
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description:
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A pinctrl node should contain at least one subnode describing one
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or more pads and their associated pinmux and pinconf settings.
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properties:
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pins:
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description: List of pads that properties in the node apply to.
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function:
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enum: [ gpio, pwm, uart, ir, i2c, spi, qspi, sdio, audio, i2s,
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gmac0, gmac1, dpu0, dpu1, isp, hdmi, bootsel, debug,
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clock, jtag, iso7816, efuse, reset ]
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description: The mux function to select for the given pins.
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bias-disable: true
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bias-pull-up:
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oneOf:
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- type: boolean
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description: Enable the regular 48kOhm pull-up
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- enum: [ 2100, 48000 ]
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description: Enable the strong 2.1kOhm pull-up or regular 48kOhm pull-up
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bias-pull-down:
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oneOf:
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- type: boolean
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- const: 44000
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description: Enable the regular 44kOhm pull-down
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drive-strength:
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enum: [ 1, 2, 3, 5, 7, 8, 10, 12, 13, 15, 16, 18, 20, 21, 23, 25 ]
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description: Drive strength in mA
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input-enable: true
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input-disable: true
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input-schmitt-enable: true
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input-schmitt-disable: true
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slew-rate:
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maximum: 1
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required:
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- pins
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additionalProperties: false
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examples:
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- |
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padctrl0_apsys: pinctrl@ec007000 {
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compatible = "thead,th1520-pinctrl";
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reg = <0xec007000 0x1000>;
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clocks = <&apb_clk>;
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thead,pad-group = <3>;
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uart0_pins: uart0-0 {
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tx-pins {
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pins = "UART0_TXD";
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function = "uart";
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bias-disable;
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drive-strength = <3>;
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input-disable;
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input-schmitt-disable;
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slew-rate = <0>;
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};
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rx-pins {
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pins = "UART0_RXD";
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function = "uart";
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bias-disable;
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drive-strength = <1>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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};
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};
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padctrl1_apsys: pinctrl@e7f3c000 {
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compatible = "thead,th1520-pinctrl";
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reg = <0xe7f3c000 0x1000>;
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clocks = <&apb_clk>;
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thead,pad-group = <2>;
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i2c5_pins: i2c5-0 {
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i2c-pins {
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pins = "QSPI1_CSN0", /* I2C5_SCL */
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"QSPI1_D0_MOSI"; /* I2C5_SDA */
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function = "i2c";
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bias-pull-up = <2100>;
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drive-strength = <7>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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};
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};
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@ -19942,6 +19942,7 @@ L: linux-riscv@lists.infradead.org
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S: Maintained
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T: git https://github.com/pdp7/linux.git
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F: Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml
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F: Documentation/devicetree/bindings/pinctrl/thead,th1520-pinctrl.yaml
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F: arch/riscv/boot/dts/thead/
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F: drivers/clk/thead/clk-th1520-ap.c
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F: include/dt-bindings/clock/thead,th1520-clk-ap.h
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