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synced 2025-01-07 21:53:44 +00:00
s390/pci: use lock-free I/O translation updates
I/O translation tables on s390 use 8 byte page table entries and tables which are allocated lazily but only freed when the entire I/O translation table is torn down. Also each IOVA can at any time only translate to one physical address Furthermore I/O table accesses by the IOMMU hardware are cache coherent. With a bit of care we can thus use atomic updates to manipulate the translation table without having to use a global lock at all. This is done analogous to the existing I/O translation table handling code used on Intel and AMD x86 systems. Signed-off-by: Niklas Schnelle <schnelle@linux.ibm.com> Link: https://lore.kernel.org/r/20221109142903.4080275-6-schnelle@linux.ibm.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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08955af060
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21c1f9021f
@ -157,7 +157,6 @@ struct zpci_dev {
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/* DMA stuff */
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unsigned long *dma_table;
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spinlock_t dma_table_lock;
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int tlb_refresh;
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spinlock_t iommu_bitmap_lock;
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@ -63,37 +63,55 @@ static void dma_free_page_table(void *table)
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kmem_cache_free(dma_page_table_cache, table);
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}
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static unsigned long *dma_get_seg_table_origin(unsigned long *entry)
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static unsigned long *dma_get_seg_table_origin(unsigned long *rtep)
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{
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unsigned long old_rte, rte;
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unsigned long *sto;
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if (reg_entry_isvalid(*entry))
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sto = get_rt_sto(*entry);
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else {
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rte = READ_ONCE(*rtep);
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if (reg_entry_isvalid(rte)) {
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sto = get_rt_sto(rte);
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} else {
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sto = dma_alloc_cpu_table();
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if (!sto)
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return NULL;
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set_rt_sto(entry, virt_to_phys(sto));
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validate_rt_entry(entry);
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entry_clr_protected(entry);
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set_rt_sto(&rte, virt_to_phys(sto));
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validate_rt_entry(&rte);
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entry_clr_protected(&rte);
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old_rte = cmpxchg(rtep, ZPCI_TABLE_INVALID, rte);
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if (old_rte != ZPCI_TABLE_INVALID) {
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/* Somone else was faster, use theirs */
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dma_free_cpu_table(sto);
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sto = get_rt_sto(old_rte);
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}
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}
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return sto;
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}
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static unsigned long *dma_get_page_table_origin(unsigned long *entry)
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static unsigned long *dma_get_page_table_origin(unsigned long *step)
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{
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unsigned long old_ste, ste;
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unsigned long *pto;
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if (reg_entry_isvalid(*entry))
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pto = get_st_pto(*entry);
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else {
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ste = READ_ONCE(*step);
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if (reg_entry_isvalid(ste)) {
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pto = get_st_pto(ste);
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} else {
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pto = dma_alloc_page_table();
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if (!pto)
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return NULL;
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set_st_pto(entry, virt_to_phys(pto));
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validate_st_entry(entry);
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entry_clr_protected(entry);
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set_st_pto(&ste, virt_to_phys(pto));
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validate_st_entry(&ste);
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entry_clr_protected(&ste);
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old_ste = cmpxchg(step, ZPCI_TABLE_INVALID, ste);
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if (old_ste != ZPCI_TABLE_INVALID) {
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/* Somone else was faster, use theirs */
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dma_free_page_table(pto);
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pto = get_st_pto(old_ste);
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}
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}
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return pto;
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}
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@ -117,19 +135,24 @@ unsigned long *dma_walk_cpu_trans(unsigned long *rto, dma_addr_t dma_addr)
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return &pto[px];
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}
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void dma_update_cpu_trans(unsigned long *entry, phys_addr_t page_addr, int flags)
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void dma_update_cpu_trans(unsigned long *ptep, phys_addr_t page_addr, int flags)
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{
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unsigned long pte;
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pte = READ_ONCE(*ptep);
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if (flags & ZPCI_PTE_INVALID) {
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invalidate_pt_entry(entry);
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invalidate_pt_entry(&pte);
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} else {
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set_pt_pfaa(entry, page_addr);
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validate_pt_entry(entry);
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set_pt_pfaa(&pte, page_addr);
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validate_pt_entry(&pte);
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}
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if (flags & ZPCI_TABLE_PROTECTED)
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entry_set_protected(entry);
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entry_set_protected(&pte);
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else
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entry_clr_protected(entry);
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entry_clr_protected(&pte);
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xchg(ptep, pte);
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}
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static int __dma_update_trans(struct zpci_dev *zdev, phys_addr_t pa,
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@ -137,18 +160,14 @@ static int __dma_update_trans(struct zpci_dev *zdev, phys_addr_t pa,
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{
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unsigned int nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
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phys_addr_t page_addr = (pa & PAGE_MASK);
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unsigned long irq_flags;
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unsigned long *entry;
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int i, rc = 0;
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if (!nr_pages)
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return -EINVAL;
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spin_lock_irqsave(&zdev->dma_table_lock, irq_flags);
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if (!zdev->dma_table) {
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rc = -EINVAL;
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goto out_unlock;
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}
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if (!zdev->dma_table)
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return -EINVAL;
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for (i = 0; i < nr_pages; i++) {
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entry = dma_walk_cpu_trans(zdev->dma_table, dma_addr);
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@ -173,8 +192,6 @@ static int __dma_update_trans(struct zpci_dev *zdev, phys_addr_t pa,
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dma_update_cpu_trans(entry, page_addr, flags);
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}
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}
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out_unlock:
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spin_unlock_irqrestore(&zdev->dma_table_lock, irq_flags);
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return rc;
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}
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@ -558,7 +575,6 @@ int zpci_dma_init_device(struct zpci_dev *zdev)
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WARN_ON(zdev->s390_domain);
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spin_lock_init(&zdev->iommu_bitmap_lock);
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spin_lock_init(&zdev->dma_table_lock);
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zdev->dma_table = dma_alloc_cpu_table();
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if (!zdev->dma_table) {
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@ -20,7 +20,6 @@ struct s390_domain {
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struct iommu_domain domain;
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struct list_head devices;
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unsigned long *dma_table;
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spinlock_t dma_table_lock;
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spinlock_t list_lock;
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struct rcu_head rcu;
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};
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@ -62,7 +61,6 @@ static struct iommu_domain *s390_domain_alloc(unsigned domain_type)
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s390_domain->domain.geometry.aperture_start = 0;
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s390_domain->domain.geometry.aperture_end = ZPCI_TABLE_SIZE_RT - 1;
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spin_lock_init(&s390_domain->dma_table_lock);
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spin_lock_init(&s390_domain->list_lock);
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INIT_LIST_HEAD_RCU(&s390_domain->devices);
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@ -265,14 +263,10 @@ static int s390_iommu_validate_trans(struct s390_domain *s390_domain,
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unsigned long nr_pages, int flags)
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{
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phys_addr_t page_addr = pa & PAGE_MASK;
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unsigned long irq_flags, i;
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unsigned long *entry;
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unsigned long i;
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int rc;
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if (!nr_pages)
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return 0;
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spin_lock_irqsave(&s390_domain->dma_table_lock, irq_flags);
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for (i = 0; i < nr_pages; i++) {
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entry = dma_walk_cpu_trans(s390_domain->dma_table, dma_addr);
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if (unlikely(!entry)) {
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@ -283,7 +277,6 @@ static int s390_iommu_validate_trans(struct s390_domain *s390_domain,
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page_addr += PAGE_SIZE;
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dma_addr += PAGE_SIZE;
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}
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spin_unlock_irqrestore(&s390_domain->dma_table_lock, irq_flags);
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return 0;
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@ -296,7 +289,6 @@ static int s390_iommu_validate_trans(struct s390_domain *s390_domain,
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break;
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dma_update_cpu_trans(entry, 0, ZPCI_PTE_INVALID);
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}
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spin_unlock_irqrestore(&s390_domain->dma_table_lock, irq_flags);
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return rc;
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}
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@ -304,14 +296,10 @@ static int s390_iommu_validate_trans(struct s390_domain *s390_domain,
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static int s390_iommu_invalidate_trans(struct s390_domain *s390_domain,
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dma_addr_t dma_addr, unsigned long nr_pages)
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{
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unsigned long irq_flags, i;
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unsigned long *entry;
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unsigned long i;
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int rc = 0;
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if (!nr_pages)
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return 0;
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spin_lock_irqsave(&s390_domain->dma_table_lock, irq_flags);
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for (i = 0; i < nr_pages; i++) {
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entry = dma_walk_cpu_trans(s390_domain->dma_table, dma_addr);
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if (unlikely(!entry)) {
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@ -321,7 +309,6 @@ static int s390_iommu_invalidate_trans(struct s390_domain *s390_domain,
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dma_update_cpu_trans(entry, 0, ZPCI_PTE_INVALID);
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dma_addr += PAGE_SIZE;
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}
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spin_unlock_irqrestore(&s390_domain->dma_table_lock, irq_flags);
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return rc;
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}
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@ -363,7 +350,8 @@ static phys_addr_t s390_iommu_iova_to_phys(struct iommu_domain *domain,
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dma_addr_t iova)
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{
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struct s390_domain *s390_domain = to_s390_domain(domain);
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unsigned long *sto, *pto, *rto, flags;
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unsigned long *rto, *sto, *pto;
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unsigned long ste, pte, rte;
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unsigned int rtx, sx, px;
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phys_addr_t phys = 0;
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@ -376,16 +364,17 @@ static phys_addr_t s390_iommu_iova_to_phys(struct iommu_domain *domain,
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px = calc_px(iova);
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rto = s390_domain->dma_table;
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spin_lock_irqsave(&s390_domain->dma_table_lock, flags);
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if (rto && reg_entry_isvalid(rto[rtx])) {
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sto = get_rt_sto(rto[rtx]);
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if (sto && reg_entry_isvalid(sto[sx])) {
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pto = get_st_pto(sto[sx]);
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if (pto && pt_entry_isvalid(pto[px]))
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phys = pto[px] & ZPCI_PTE_ADDR_MASK;
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rte = READ_ONCE(rto[rtx]);
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if (reg_entry_isvalid(rte)) {
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sto = get_rt_sto(rte);
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ste = READ_ONCE(sto[sx]);
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if (reg_entry_isvalid(ste)) {
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pto = get_st_pto(ste);
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pte = READ_ONCE(pto[px]);
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if (pt_entry_isvalid(pte))
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phys = pte & ZPCI_PTE_ADDR_MASK;
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}
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}
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spin_unlock_irqrestore(&s390_domain->dma_table_lock, flags);
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return phys;
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}
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