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Two small hwspinlock changes for better OMAP support, coming
from Suman Anna. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJT6iF2AAoJELLolMlTRIoMRSAQAI7aoIN7heqKqnZHL2AfB6oL umHc/sFksb8jlCm1IArGqgh77lpzwRODjh0k6qua6mMMCX59sFBMaEKiJiccjlne 0vEs4usG9ZXn6so3l1oFz5zedPp15zzssxygIeMpXTynSZbSwabwWiVvW1yneHGa oEuXDC1CuMHVqdZ23a1xokzKRpWVf7taGhy3tqrGyS2J4BgGgdKoBn1hl2F2WRkk zpqZ5+vtrTVVHthZ2zSkR/3PSEA6w/yZLfBDI9i6avq6v2JRnWdU4Hqf7eeZUREq WpqKmHAcx3OAvAlxWDiYi9nBgBuNFKoXg04XhbJnV6q4lo4VXyz/g1DgicHRNyZd kw6rJnMrf1ra7qjAEYwSuzBhqaVxNAItaa8pDk4eaj6oSpOeZEktdV/kKLtZHZib E0mOIcB1gGvl0ZD0pqM4l4EvRnd/XlvxDH447qxvSk2k4RCx1tBpqUVVh9Hr5YXU 7u5xIlktj4EKIt/hN5oZm9FHIds6BDju2iIz6U1kTN+NfcBGlbInJ5U4KKeEfdk6 s/jLnnAarychrVIbxLLhLJlWhQky3b5Pl76Fl75vYKpca7mzZmRv+rGNc6pS/j6f JcjwDUANOUxUwUZLqDQ1UuLeAKxjsvcU4rdkkup+0XEP2s9SM960vOEzaFVePuce 0XC2/BCXvTrsHB2keeKS =PYNx -----END PGP SIGNATURE----- Merge tag 'hwspinlock-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ohad/hwspinlock Pull hwspinlock updates from Ohad Ben-Cohen: "Two small hwspinlock changes for better OMAP support, coming from Suman Anna" * tag 'hwspinlock-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ohad/hwspinlock: hwspinlock: enable OMAP build for AM33xx, AM43xx & DRA7xx hwspinlock/omap: enable module before reading SYSSTATUS register
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@ -10,7 +10,7 @@ menu "Hardware Spinlock drivers"
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config HWSPINLOCK_OMAP
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tristate "OMAP Hardware Spinlock device"
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depends on ARCH_OMAP4 || SOC_OMAP5
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depends on ARCH_OMAP4 || SOC_OMAP5 || SOC_DRA7XX || SOC_AM33XX || SOC_AM43XX
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select HWSPINLOCK
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help
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Say y here to support the OMAP Hardware Spinlock device (firstly
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@ -98,10 +98,29 @@ static int omap_hwspinlock_probe(struct platform_device *pdev)
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if (!io_base)
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return -ENOMEM;
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/*
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* make sure the module is enabled and clocked before reading
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* the module SYSSTATUS register
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*/
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pm_runtime_enable(&pdev->dev);
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ret = pm_runtime_get_sync(&pdev->dev);
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if (ret < 0) {
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pm_runtime_put_noidle(&pdev->dev);
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goto iounmap_base;
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}
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/* Determine number of locks */
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i = readl(io_base + SYSSTATUS_OFFSET);
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i >>= SPINLOCK_NUMLOCKS_BIT_OFFSET;
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/*
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* runtime PM will make sure the clock of this module is
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* enabled again iff at least one lock is requested
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*/
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ret = pm_runtime_put(&pdev->dev);
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if (ret < 0)
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goto iounmap_base;
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/* one of the four lsb's must be set, and nothing else */
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if (hweight_long(i & 0xf) != 1 || i > 8) {
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ret = -EINVAL;
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@ -121,12 +140,6 @@ static int omap_hwspinlock_probe(struct platform_device *pdev)
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for (i = 0, hwlock = &bank->lock[0]; i < num_locks; i++, hwlock++)
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hwlock->priv = io_base + LOCK_BASE_OFFSET + sizeof(u32) * i;
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/*
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* runtime PM will make sure the clock of this module is
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* enabled iff at least one lock is requested
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*/
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pm_runtime_enable(&pdev->dev);
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ret = hwspin_lock_register(bank, &pdev->dev, &omap_hwspinlock_ops,
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pdata->base_id, num_locks);
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if (ret)
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@ -135,9 +148,9 @@ static int omap_hwspinlock_probe(struct platform_device *pdev)
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return 0;
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reg_fail:
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pm_runtime_disable(&pdev->dev);
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kfree(bank);
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iounmap_base:
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pm_runtime_disable(&pdev->dev);
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iounmap(io_base);
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return ret;
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}
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