STM32 DT for v6.13, round 1

Highlights:
 ----------
 
 - MPU:
   - STM32MP13:
     - ST DK board:
       - Add support of WLAN/BT Murata Type 1DX module.
     - DH SOM:
       - Add M24256E EEPROM suport.
 
   - STMP32MP15:
     - Use IWDG2 as wakeup source.
     - Add support of WLAN/BT Murata Type 1DX module on DK2 board.
 
   - STM32MP25:
     - Enable RTC.
     - Add DMA support for U(S)ART, I2C and SPI instances.
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Merge tag 'stm32-dt-for-v6.13-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt

STM32 DT for v6.13, round 1

Highlights:
----------

- MPU:
  - STM32MP13:
    - ST DK board:
      - Add support of WLAN/BT Murata Type 1DX module.
    - DH SOM:
      - Add M24256E EEPROM suport.

  - STMP32MP15:
    - Use IWDG2 as wakeup source.
    - Add support of WLAN/BT Murata Type 1DX module on DK2 board.

  - STM32MP25:
    - Enable RTC.
    - Add DMA support for U(S)ART, I2C and SPI instances.

* tag 'stm32-dt-for-v6.13-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  arm64: dts: st: add DMA support on SPI instances of stm32mp25
  arm64: dts: st: add DMA support on I2C instances of stm32mp25
  arm64: dts: st: add DMA support on U(S)ART instances of stm32mp25
  arm64: dts: st: add RNG node on stm32mp251
  arm64: dts: st: enable RTC on stm32mp257f-ev1 board
  arm64: dts: st: add RTC on stm32mp25x
  ARM: dts: stm32: add support of WLAN/BT on stm32mp135f-dk
  ARM: dts: stm32: add support of WLAN/BT on stm32mp157c-dk2
  ARM: dts: stm32: rtc, add LSCO to WLAN/BT module on stm32mp135f-dk
  ARM: dts: stm32: rtc, add LSCO to WLAN/BT module on stm32mp157c-dk2
  ARM: dts: stm32: rtc, add pin to provide LSCO on stm32mp13
  ARM: dts: stm32: rtc, add pin to provide LSCO on stm32mp15
  ARM: dts: stm32: Describe M24256E write-lockable page in DH STM32MP13xx DHCOR SoM DT
  ARM: dts: stm32: Add IWDG2 EXTI interrupt mapping and mark as wakeup source

Link: https://lore.kernel.org/r/92d2d6df-cc5c-488f-8ebd-550b1903db12@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2024-11-12 22:53:47 +01:00
commit 2f992e7346
8 changed files with 225 additions and 1 deletions

View File

@ -594,6 +594,13 @@ pins {
};
};
/omit-if-no-ref/
rtc_rsvd_pins_a: rtc-rsvd-0 {
pins {
pinmux = <STM32_PINMUX('I', 1, ANALOG)>; /* RTC_OUT2_RMP */
};
};
/omit-if-no-ref/
sai1a_pins_a: sai1a-0 {
pins {

View File

@ -121,6 +121,19 @@ panel_in_rgb: endpoint {
};
};
};
v3v3_ao: v3v3-ao {
compatible = "regulator-fixed";
regulator-name = "v3v3_ao";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
wifi_pwrseq: wifi-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&mcp23017 11 GPIO_ACTIVE_LOW>;
};
};
&adc_1 {
@ -346,7 +359,14 @@ ltdc_out_rgb: endpoint {
};
&rtc {
pinctrl-names = "default";
pinctrl-0 = <&rtc_rsvd_pins_a>;
status = "okay";
rtc_lsco_pins_a: rtc-lsco-0 {
pins = "out2_rmp";
function = "lsco";
};
};
&scmi_regu {
@ -385,6 +405,30 @@ &sdmmc1 {
status = "okay";
};
/* Wifi */
&sdmmc2 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_clk_pins_a>;
pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_clk_pins_a>;
pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>;
non-removable;
cap-sdio-irq;
st,neg-edge;
bus-width = <4>;
vmmc-supply = <&v3v3_ao>;
mmc-pwrseq = <&wifi_pwrseq>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
brcmf: bcrmf@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
pinctrl-names = "default";
pinctrl-0 = <&rtc_lsco_pins_a>;
};
};
&spi5 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&spi5_pins_a>;
@ -491,6 +535,14 @@ &usart2 {
pinctrl-2 = <&usart2_idle_pins_a>;
uart-has-rtscts;
status = "okay";
bluetooth {
shutdown-gpios = <&mcp23017 13 GPIO_ACTIVE_HIGH>;
compatible = "brcm,bcm43438-bt";
max-speed = <3000000>;
vbat-supply = <&v3v3_ao>;
vddio-supply = <&v3v3_ao>;
};
};
&usbh_ehci {

View File

@ -201,6 +201,12 @@ eeprom0: eeprom@50 {
pagesize = <64>;
};
eeprom0wl: eeprom@58 {
compatible = "st,24256e-wl"; /* ST M24256E WL page of 0x50 */
pagesize = <64>;
reg = <0x58>;
};
rv3032: rtc@51 {
compatible = "microcrystal,rv3032";
reg = <0x51>;

View File

@ -1696,6 +1696,13 @@ pins {
};
};
/omit-if-no-ref/
rtc_rsvd_pins_a: rtc-rsvd-0 {
pins {
pinmux = <STM32_PINMUX('I', 8, ANALOG)>; /* RTC_OUT2_RMP */
};
};
/omit-if-no-ref/
sai2a_pins_a: sai2a-0 {
pins {

View File

@ -355,6 +355,8 @@ iwdg2: watchdog@5a002000 {
reg = <0x5a002000 0x400>;
clocks = <&rcc IWDG2>, <&rcc CK_LSI>;
clock-names = "pclk", "lsi";
interrupts-extended = <&exti 46 IRQ_TYPE_LEVEL_HIGH>;
wakeup-source;
status = "disabled";
};

View File

@ -24,6 +24,11 @@ aliases {
chosen {
stdout-path = "serial0:115200n8";
};
wifi_pwrseq: wifi-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpioh 4 GPIO_ACTIVE_LOW>;
};
};
&cryp1 {
@ -84,10 +89,54 @@ ltdc_ep1_out: endpoint@1 {
};
};
&rtc {
pinctrl-names = "default";
pinctrl-0 = <&rtc_rsvd_pins_a>;
rtc_lsco_pins_a: rtc-lsco-0 {
pins = "out2_rmp";
function = "lsco";
};
};
/* Wifi */
&sdmmc2 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc2_b4_pins_a>;
pinctrl-1 = <&sdmmc2_b4_od_pins_a>;
pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>;
non-removable;
cap-sdio-irq;
st,neg-edge;
bus-width = <4>;
vmmc-supply = <&v3v3>;
mmc-pwrseq = <&wifi_pwrseq>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
brcmf: bcrmf@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
pinctrl-names = "default";
pinctrl-0 = <&rtc_lsco_pins_a>;
};
};
/* Bluetooth */
&usart2 {
pinctrl-names = "default", "sleep", "idle";
pinctrl-0 = <&usart2_pins_c>;
pinctrl-1 = <&usart2_sleep_pins_c>;
pinctrl-2 = <&usart2_idle_pins_c>;
status = "disabled";
uart-has-rtscts;
status = "okay";
bluetooth {
shutdown-gpios = <&gpioz 6 GPIO_ACTIVE_HIGH>;
compatible = "brcm,bcm43438-bt";
max-speed = <3000000>;
vbat-supply = <&v3v3>;
vddio-supply = <&v3v3>;
};
};

View File

@ -245,6 +245,9 @@ spi2: spi@400b0000 {
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_SPI2>;
resets = <&rcc SPI2_R>;
dmas = <&hpdma 51 0x20 0x3012>,
<&hpdma 52 0x20 0x3021>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 23>;
status = "disabled";
};
@ -257,6 +260,9 @@ spi3: spi@400c0000 {
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_SPI3>;
resets = <&rcc SPI3_R>;
dmas = <&hpdma 53 0x20 0x3012>,
<&hpdma 54 0x20 0x3021>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 24>;
status = "disabled";
};
@ -266,6 +272,9 @@ usart2: serial@400e0000 {
reg = <0x400e0000 0x400>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_USART2>;
dmas = <&hpdma 11 0x20 0x10012>,
<&hpdma 12 0x20 0x3021>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 32>;
status = "disabled";
};
@ -275,6 +284,9 @@ usart3: serial@400f0000 {
reg = <0x400f0000 0x400>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_USART3>;
dmas = <&hpdma 13 0x20 0x10012>,
<&hpdma 14 0x20 0x3021>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 33>;
status = "disabled";
};
@ -284,6 +296,9 @@ uart4: serial@40100000 {
reg = <0x40100000 0x400>;
interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_UART4>;
dmas = <&hpdma 15 0x20 0x10012>,
<&hpdma 16 0x20 0x3021>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 34>;
status = "disabled";
};
@ -293,6 +308,9 @@ uart5: serial@40110000 {
reg = <0x40110000 0x400>;
interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_UART5>;
dmas = <&hpdma 17 0x20 0x10012>,
<&hpdma 18 0x20 0x3021>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 35>;
status = "disabled";
};
@ -306,6 +324,9 @@ i2c1: i2c@40120000 {
resets = <&rcc I2C1_R>;
#address-cells = <1>;
#size-cells = <0>;
dmas = <&hpdma 27 0x20 0x3012>,
<&hpdma 28 0x20 0x3021>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 41>;
status = "disabled";
};
@ -319,6 +340,9 @@ i2c2: i2c@40130000 {
resets = <&rcc I2C2_R>;
#address-cells = <1>;
#size-cells = <0>;
dmas = <&hpdma 30 0x20 0x3012>,
<&hpdma 31 0x20 0x3021>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 42>;
status = "disabled";
};
@ -332,6 +356,9 @@ i2c3: i2c@40140000 {
resets = <&rcc I2C3_R>;
#address-cells = <1>;
#size-cells = <0>;
dmas = <&hpdma 33 0x20 0x3012>,
<&hpdma 34 0x20 0x3021>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 43>;
status = "disabled";
};
@ -345,6 +372,9 @@ i2c4: i2c@40150000 {
resets = <&rcc I2C4_R>;
#address-cells = <1>;
#size-cells = <0>;
dmas = <&hpdma 36 0x20 0x3012>,
<&hpdma 37 0x20 0x3021>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 44>;
status = "disabled";
};
@ -358,6 +388,9 @@ i2c5: i2c@40160000 {
resets = <&rcc I2C5_R>;
#address-cells = <1>;
#size-cells = <0>;
dmas = <&hpdma 39 0x20 0x3012>,
<&hpdma 40 0x20 0x3021>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 45>;
status = "disabled";
};
@ -371,6 +404,9 @@ i2c6: i2c@40170000 {
resets = <&rcc I2C6_R>;
#address-cells = <1>;
#size-cells = <0>;
dmas = <&hpdma 42 0x20 0x3012>,
<&hpdma 43 0x20 0x3021>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 46>;
status = "disabled";
};
@ -384,6 +420,9 @@ i2c7: i2c@40180000 {
resets = <&rcc I2C7_R>;
#address-cells = <1>;
#size-cells = <0>;
dmas = <&hpdma 45 0x20 0x3012>,
<&hpdma 46 0x20 0x3021>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 47>;
status = "disabled";
};
@ -393,6 +432,9 @@ usart6: serial@40220000 {
reg = <0x40220000 0x400>;
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_USART6>;
dmas = <&hpdma 19 0x20 0x10012>,
<&hpdma 20 0x20 0x3021>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 36>;
status = "disabled";
};
@ -405,6 +447,9 @@ spi1: spi@40230000 {
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_SPI1>;
resets = <&rcc SPI1_R>;
dmas = <&hpdma 49 0x20 0x3012>,
<&hpdma 50 0x20 0x3021>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 22>;
status = "disabled";
};
@ -417,6 +462,9 @@ spi4: spi@40240000 {
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_SPI4>;
resets = <&rcc SPI4_R>;
dmas = <&hpdma 55 0x20 0x3012>,
<&hpdma 56 0x20 0x3021>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 25>;
status = "disabled";
};
@ -429,6 +477,9 @@ spi5: spi@40280000 {
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_SPI5>;
resets = <&rcc SPI5_R>;
dmas = <&hpdma 57 0x20 0x3012>,
<&hpdma 58 0x20 0x3021>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 26>;
status = "disabled";
};
@ -438,6 +489,9 @@ uart9: serial@402c0000 {
reg = <0x402c0000 0x400>;
interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_UART9>;
dmas = <&hpdma 25 0x20 0x10012>,
<&hpdma 26 0x20 0x3021>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 39>;
status = "disabled";
};
@ -447,6 +501,9 @@ usart1: serial@40330000 {
reg = <0x40330000 0x400>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_USART1>;
dmas = <&hpdma 9 0x20 0x10012>,
<&hpdma 10 0x20 0x3021>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 31>;
status = "disabled";
};
@ -459,6 +516,9 @@ spi6: spi@40350000 {
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_SPI6>;
resets = <&rcc SPI6_R>;
dmas = <&hpdma 59 0x20 0x3012>,
<&hpdma 60 0x20 0x3021>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 27>;
status = "disabled";
};
@ -471,6 +531,9 @@ spi7: spi@40360000 {
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_SPI7>;
resets = <&rcc SPI7_R>;
dmas = <&hpdma 61 0x20 0x3012>,
<&hpdma 62 0x20 0x3021>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 28>;
status = "disabled";
};
@ -480,6 +543,9 @@ uart7: serial@40370000 {
reg = <0x40370000 0x400>;
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_UART7>;
dmas = <&hpdma 21 0x20 0x10012>,
<&hpdma 22 0x20 0x3021>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 37>;
status = "disabled";
};
@ -489,10 +555,23 @@ uart8: serial@40380000 {
reg = <0x40380000 0x400>;
interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_UART8>;
dmas = <&hpdma 23 0x20 0x10012>,
<&hpdma 24 0x20 0x3021>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 38>;
status = "disabled";
};
rng: rng@42020000 {
compatible = "st,stm32mp25-rng";
reg = <0x42020000 0x400>;
clocks = <&clk_rcbsec>, <&rcc CK_BUS_RNG>;
clock-names = "core", "bus";
resets = <&rcc RNG_R>;
access-controllers = <&rifsc 92>;
status = "disabled";
};
spi8: spi@46020000 {
#address-cells = <1>;
#size-cells = <0>;
@ -501,6 +580,9 @@ spi8: spi@46020000 {
interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_SPI8>;
resets = <&rcc SPI8_R>;
dmas = <&hpdma 171 0x20 0x3012>,
<&hpdma 172 0x20 0x3021>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 29>;
status = "disabled";
};
@ -514,6 +596,9 @@ i2c8: i2c@46040000 {
resets = <&rcc I2C8_R>;
#address-cells = <1>;
#size-cells = <0>;
dmas = <&hpdma 168 0x20 0x3012>,
<&hpdma 169 0x20 0x3021>;
dma-names = "rx", "tx";
access-controllers = <&rifsc 48>;
status = "disabled";
};
@ -916,6 +1001,16 @@ gpiok: gpio@442e0000 {
};
};
rtc: rtc@46000000 {
compatible = "st,stm32mp25-rtc";
reg = <0x46000000 0x400>;
clocks = <&scmi_clk CK_SCMI_RTC>,
<&scmi_clk CK_SCMI_RTCCK>;
clock-names = "pclk", "rtc_ck";
interrupts-extended = <&exti2 17 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
pinctrl_z: pinctrl@46200000 {
#address-cells = <1>;
#size-cells = <1>;

View File

@ -93,6 +93,10 @@ &i2c8 {
status = "disabled";
};
&rtc {
status = "okay";
};
&scmi_regu {
scmi_vddio1: regulator@0 {
regulator-min-microvolt = <1800000>;
@ -157,6 +161,8 @@ &usart2 {
pinctrl-0 = <&usart2_pins_a>;
pinctrl-1 = <&usart2_idle_pins_a>;
pinctrl-2 = <&usart2_sleep_pins_a>;
/delete-property/dmas;
/delete-property/dma-names;
status = "okay";
};