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KVM: arm64: Save ID registers' sanitized value per guest
Initialize the default ID register values upon the first call to KVM_ARM_VCPU_INIT. The vCPU feature flags are finalized at that point, so it is possible to determine the maximum feature set supported by a particular VM configuration. Do nothing with these values for now, as we need to rework the plumbing of what's already writable to be compatible with the generic infrastructure. Co-developed-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Jing Zhang <jingzhangos@google.com> Link: https://lore.kernel.org/r/20230609190054.1542113-7-oliver.upton@linux.dev [Oliver: Hoist everything into KVM_ARM_VCPU_INIT time, so the features are final] Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
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@ -225,6 +225,8 @@ struct kvm_arch {
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#define KVM_ARCH_FLAG_TIMER_PPIS_IMMUTABLE 6
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/* SMCCC filter initialized for the VM */
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#define KVM_ARCH_FLAG_SMCCC_FILTER_CONFIGURED 7
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/* Initial ID reg values loaded */
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#define KVM_ARCH_FLAG_ID_REGS_INITIALIZED 8
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unsigned long flags;
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/* VM-wide vCPU feature set */
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@ -247,6 +249,19 @@ struct kvm_arch {
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struct kvm_smccc_features smccc_feat;
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struct maple_tree smccc_filter;
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/*
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* Emulated CPU ID registers per VM
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* (Op0, Op1, CRn, CRm, Op2) of the ID registers to be saved in it
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* is (3, 0, 0, crm, op2), where 1<=crm<8, 0<=op2<8.
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*
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* These emulated idregs are VM-wide, but accessed from the context of a vCPU.
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* Atomic access to multiple idregs are guarded by kvm_arch.config_lock.
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*/
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#define IDREG_IDX(id) (((sys_reg_CRm(id) - 1) << 3) | sys_reg_Op2(id))
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#define IDREG(kvm, id) ((kvm)->arch.id_regs[IDREG_IDX(id)])
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#define KVM_ARM_ID_REG_NUM (IDREG_IDX(sys_reg(3, 0, 0, 7, 7)) + 1)
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u64 id_regs[KVM_ARM_ID_REG_NUM];
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/*
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* For an untrusted host VM, 'pkvm.handle' is used to lookup
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* the associated pKVM instance in the hypervisor.
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@ -1311,6 +1311,17 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu, const struct sys_reg_desc *r
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return __kvm_read_sanitised_id_reg(vcpu, r);
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}
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/*
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* Return true if the register's (Op0, Op1, CRn, CRm, Op2) is
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* (3, 0, 0, crm, op2), where 1<=crm<8, 0<=op2<8.
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*/
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static inline bool is_id_reg(u32 id)
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{
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return (sys_reg_Op0(id) == 3 && sys_reg_Op1(id) == 0 &&
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sys_reg_CRn(id) == 0 && sys_reg_CRm(id) >= 1 &&
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sys_reg_CRm(id) < 8);
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}
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static unsigned int id_visibility(const struct kvm_vcpu *vcpu,
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const struct sys_reg_desc *r)
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{
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@ -2303,6 +2314,8 @@ static const struct sys_reg_desc sys_reg_descs[] = {
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EL2_REG(SP_EL2, NULL, reset_unknown, 0),
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};
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static const struct sys_reg_desc *first_idreg;
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static bool trap_dbgdidr(struct kvm_vcpu *vcpu,
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struct sys_reg_params *p,
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const struct sys_reg_desc *r)
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@ -2993,6 +3006,28 @@ static bool emulate_sys_reg(struct kvm_vcpu *vcpu,
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return false;
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}
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static void kvm_reset_id_regs(struct kvm_vcpu *vcpu)
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{
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const struct sys_reg_desc *idreg = first_idreg;
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u32 id = reg_to_encoding(idreg);
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struct kvm *kvm = vcpu->kvm;
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if (test_bit(KVM_ARCH_FLAG_ID_REGS_INITIALIZED, &kvm->arch.flags))
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return;
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lockdep_assert_held(&kvm->arch.config_lock);
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/* Initialize all idregs */
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while (is_id_reg(id)) {
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IDREG(kvm, id) = idreg->reset(vcpu, idreg);
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idreg++;
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id = reg_to_encoding(idreg);
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}
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set_bit(KVM_ARCH_FLAG_ID_REGS_INITIALIZED, &kvm->arch.flags);
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}
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/**
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* kvm_reset_sys_regs - sets system registers to reset value
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* @vcpu: The VCPU pointer
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@ -3004,9 +3039,17 @@ void kvm_reset_sys_regs(struct kvm_vcpu *vcpu)
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{
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unsigned long i;
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for (i = 0; i < ARRAY_SIZE(sys_reg_descs); i++)
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if (sys_reg_descs[i].reset)
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sys_reg_descs[i].reset(vcpu, &sys_reg_descs[i]);
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kvm_reset_id_regs(vcpu);
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for (i = 0; i < ARRAY_SIZE(sys_reg_descs); i++) {
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const struct sys_reg_desc *r = &sys_reg_descs[i];
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if (is_id_reg(reg_to_encoding(r)))
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continue;
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if (r->reset)
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r->reset(vcpu, r);
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}
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}
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/**
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@ -3413,6 +3456,7 @@ int kvm_arm_copy_sys_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
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int __init kvm_sys_reg_table_init(void)
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{
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struct sys_reg_params params;
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bool valid = true;
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unsigned int i;
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@ -3431,5 +3475,11 @@ int __init kvm_sys_reg_table_init(void)
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for (i = 0; i < ARRAY_SIZE(invariant_sys_regs); i++)
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invariant_sys_regs[i].reset(NULL, &invariant_sys_regs[i]);
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/* Find the first idreg (SYS_ID_PFR0_EL1) in sys_reg_descs. */
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params = encoding_to_params(SYS_ID_PFR0_EL1);
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first_idreg = find_reg(¶ms, sys_reg_descs, ARRAY_SIZE(sys_reg_descs));
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if (!first_idreg)
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return -EINVAL;
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return 0;
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}
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@ -27,6 +27,13 @@ struct sys_reg_params {
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bool is_write;
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};
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#define encoding_to_params(reg) \
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((struct sys_reg_params){ .Op0 = sys_reg_Op0(reg), \
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.Op1 = sys_reg_Op1(reg), \
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.CRn = sys_reg_CRn(reg), \
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.CRm = sys_reg_CRm(reg), \
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.Op2 = sys_reg_Op2(reg) })
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#define esr_sys64_to_params(esr) \
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((struct sys_reg_params){ .Op0 = ((esr) >> 20) & 3, \
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.Op1 = ((esr) >> 14) & 0x7, \
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