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microblaze: use generic dma_noncoherent_ops
Switch to the generic noncoherent direct mapping implementation. This removes the direction-based optimizations in sync_{single,sg}_for_{cpu,device} which were marked untestested and do not match the usually very well tested {un,}map_{single,sg} implementations. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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@ -1,6 +1,8 @@
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config MICROBLAZE
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def_bool y
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select ARCH_HAS_GCOV_PROFILE_ALL
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select ARCH_HAS_SYNC_DMA_FOR_CPU
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select ARCH_HAS_SYNC_DMA_FOR_DEVICE
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select ARCH_MIGHT_HAVE_PC_PARPORT
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select ARCH_NO_COHERENT_DMA_MMAP if !MMU
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select ARCH_WANT_IPC_PARSE_VERSION
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@ -8,6 +10,8 @@ config MICROBLAZE
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select TIMER_OF
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select CLONE_BACKWARDS3
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select COMMON_CLK
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select DMA_NONCOHERENT_OPS
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select DMA_NONCOHERENT_MMAP
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select GENERIC_ATOMIC64
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select GENERIC_CLOCKEVENTS
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select GENERIC_CPU_DEVICES
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@ -5,6 +5,7 @@ generic-y += bugs.h
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generic-y += compat.h
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generic-y += device.h
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generic-y += div64.h
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generic-y += dma-mapping.h
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generic-y += emergency-restart.h
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generic-y += exec.h
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generic-y += extable.h
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@ -1,28 +0,0 @@
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/*
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* Implements the generic device dma API for microblaze and the pci
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*
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* Copyright (C) 2009-2010 Michal Simek <monstr@monstr.eu>
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* Copyright (C) 2009-2010 PetaLogix
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file COPYING in the main directory of this
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* archive for more details.
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*
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* This file is base on powerpc and x86 dma-mapping.h versions
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* Copyright (C) 2004 IBM
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*/
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#ifndef _ASM_MICROBLAZE_DMA_MAPPING_H
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#define _ASM_MICROBLAZE_DMA_MAPPING_H
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/*
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* Available generic sets of operations
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*/
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extern const struct dma_map_ops dma_nommu_ops;
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static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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{
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return &dma_nommu_ops;
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}
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#endif /* _ASM_MICROBLAZE_DMA_MAPPING_H */
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@ -553,8 +553,6 @@ void __init *early_get_page(void);
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extern unsigned long ioremap_bot, ioremap_base;
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void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *dma_handle);
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void consistent_free(size_t size, void *vaddr);
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void consistent_sync(void *vaddr, size_t size, int direction);
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void consistent_sync_page(struct page *page, unsigned long offset,
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size_t size, int direction);
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@ -8,29 +8,15 @@
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*/
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#include <linux/device.h>
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#include <linux/dma-mapping.h>
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#include <linux/dma-noncoherent.h>
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#include <linux/gfp.h>
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#include <linux/dma-debug.h>
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#include <linux/export.h>
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#include <linux/bug.h>
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#include <asm/cacheflush.h>
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static void *dma_nommu_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag,
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unsigned long attrs)
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{
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return consistent_alloc(flag, size, dma_handle);
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}
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static void dma_nommu_free_coherent(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle,
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unsigned long attrs)
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{
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consistent_free(size, vaddr);
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}
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static inline void __dma_sync(unsigned long paddr,
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size_t size, enum dma_data_direction direction)
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static void __dma_sync(struct device *dev, phys_addr_t paddr, size_t size,
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enum dma_data_direction direction)
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{
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switch (direction) {
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case DMA_TO_DEVICE:
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@ -45,113 +31,21 @@ static inline void __dma_sync(unsigned long paddr,
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}
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}
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static int dma_nommu_map_sg(struct device *dev, struct scatterlist *sgl,
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int nents, enum dma_data_direction direction,
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unsigned long attrs)
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void arch_sync_dma_for_device(struct device *dev, phys_addr_t paddr,
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size_t size, enum dma_data_direction dir)
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{
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struct scatterlist *sg;
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int i;
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/* FIXME this part of code is untested */
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for_each_sg(sgl, sg, nents, i) {
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sg->dma_address = sg_phys(sg);
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if (attrs & DMA_ATTR_SKIP_CPU_SYNC)
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continue;
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__dma_sync(sg_phys(sg), sg->length, direction);
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}
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return nents;
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__dma_sync(dev, paddr, size, dir);
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}
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static inline dma_addr_t dma_nommu_map_page(struct device *dev,
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struct page *page,
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unsigned long offset,
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size_t size,
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enum dma_data_direction direction,
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unsigned long attrs)
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void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr,
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size_t size, enum dma_data_direction dir)
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{
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if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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__dma_sync(page_to_phys(page) + offset, size, direction);
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return page_to_phys(page) + offset;
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__dma_sync(dev, paddr, size, dir);
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}
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static inline void dma_nommu_unmap_page(struct device *dev,
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dma_addr_t dma_address,
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size_t size,
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enum dma_data_direction direction,
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unsigned long attrs)
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{
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/* There is not necessary to do cache cleanup
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*
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* phys_to_virt is here because in __dma_sync_page is __virt_to_phys and
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* dma_address is physical address
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*/
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if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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__dma_sync(dma_address, size, direction);
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}
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static inline void
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dma_nommu_sync_single_for_cpu(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction direction)
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{
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/*
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* It's pointless to flush the cache as the memory segment
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* is given to the CPU
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*/
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if (direction == DMA_FROM_DEVICE)
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__dma_sync(dma_handle, size, direction);
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}
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static inline void
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dma_nommu_sync_single_for_device(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction direction)
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{
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/*
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* It's pointless to invalidate the cache if the device isn't
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* supposed to write to the relevant region
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*/
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if (direction == DMA_TO_DEVICE)
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__dma_sync(dma_handle, size, direction);
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}
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static inline void
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dma_nommu_sync_sg_for_cpu(struct device *dev,
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struct scatterlist *sgl, int nents,
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enum dma_data_direction direction)
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{
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struct scatterlist *sg;
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int i;
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/* FIXME this part of code is untested */
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if (direction == DMA_FROM_DEVICE)
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for_each_sg(sgl, sg, nents, i)
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__dma_sync(sg->dma_address, sg->length, direction);
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}
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static inline void
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dma_nommu_sync_sg_for_device(struct device *dev,
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struct scatterlist *sgl, int nents,
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enum dma_data_direction direction)
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{
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struct scatterlist *sg;
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int i;
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/* FIXME this part of code is untested */
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if (direction == DMA_TO_DEVICE)
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for_each_sg(sgl, sg, nents, i)
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__dma_sync(sg->dma_address, sg->length, direction);
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}
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static
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int dma_nommu_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t handle, size_t size,
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unsigned long attrs)
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int arch_dma_mmap(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t handle, size_t size,
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unsigned long attrs)
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{
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#ifdef CONFIG_MMU
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unsigned long user_count = vma_pages(vma);
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@ -170,17 +64,3 @@ int dma_nommu_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
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return -ENXIO;
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#endif
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}
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const struct dma_map_ops dma_nommu_ops = {
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.alloc = dma_nommu_alloc_coherent,
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.free = dma_nommu_free_coherent,
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.mmap = dma_nommu_mmap_coherent,
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.map_sg = dma_nommu_map_sg,
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.map_page = dma_nommu_map_page,
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.unmap_page = dma_nommu_unmap_page,
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.sync_single_for_cpu = dma_nommu_sync_single_for_cpu,
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.sync_single_for_device = dma_nommu_sync_single_for_device,
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.sync_sg_for_cpu = dma_nommu_sync_sg_for_cpu,
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.sync_sg_for_device = dma_nommu_sync_sg_for_device,
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};
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EXPORT_SYMBOL(dma_nommu_ops);
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@ -33,6 +33,7 @@
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#include <linux/pci.h>
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#include <linux/interrupt.h>
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#include <linux/gfp.h>
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#include <linux/dma-noncoherent.h>
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#include <asm/pgalloc.h>
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#include <linux/io.h>
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@ -59,7 +60,8 @@
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* uncached region. This will no doubt cause big problems if memory allocated
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* here is not also freed properly. -- JW
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*/
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void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *dma_handle)
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void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
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gfp_t gfp, unsigned long attrs)
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{
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unsigned long order, vaddr;
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void *ret;
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@ -154,7 +156,6 @@ void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *dma_handle)
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return ret;
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}
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EXPORT_SYMBOL(consistent_alloc);
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#ifdef CONFIG_MMU
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static pte_t *consistent_virt_to_pte(void *vaddr)
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@ -178,7 +179,8 @@ unsigned long consistent_virt_to_pfn(void *vaddr)
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/*
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* free page(s) as defined by the above mapping.
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*/
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void consistent_free(size_t size, void *vaddr)
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void arch_dma_free(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_addr, unsigned long attrs)
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{
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struct page *page;
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@ -218,7 +220,6 @@ void consistent_free(size_t size, void *vaddr)
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flush_tlb_all();
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#endif
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}
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EXPORT_SYMBOL(consistent_free);
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/*
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* make an area consistent.
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